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mips: Set io_map_base for several PCI bridges lacking it

PATCH Applied Ben Hutchings 2 participants 2 messages Jun 13, 2010 – Jul 26, 2010 MIPS

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Ben Hutchings

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PATCH 1/1 mips: Set io_map_base for several PCI bridges lacking it

Several MIPS platforms don't set pci_controller::io_map_base for their PCI bridges. This results in a panic in pci_iomap(). (The panic is conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI MIPS systems.)

I have tested the change to Malta in qemu; the other platforms not at all.

Signed-off-by Ben Hutchings <[email protected]>
---
 arch/mips/mti-malta/malta-pci.c  |    2 ++
 arch/mips/pci/ops-pmcmsp.c       |    1 +
 arch/mips/pci/pci-yosemite.c     |    1 +
 arch/mips/pnx8550/common/pci.c   |    1 +
 arch/mips/pnx8550/common/setup.c |    2 +-
 5 files changed, 6 insertions(+), 1 deletions(-)
arch/mips/mti-malta/malta-pci.c +2 -0
index 2fbfa1a..bf80921 100644
@@ -247,6 +247,8 @@ void __init mips_pcibios_init(void)
 	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
 	ioport_resource.end = controller->io_resource->end;
 
+	controller->io_map_base = mips_io_port_base;
+
 	register_pci_controller(controller);
 }
arch/mips/pci/ops-pmcmsp.c +1 -0
index 04b3147..b7c03d8 100644
@@ -944,6 +944,7 @@ static struct pci_controller msp_pci_controller = {
 	.pci_ops	= &msp_pci_ops,
 	.mem_resource	= &pci_mem_resource,
 	.mem_offset	= 0,
+	.io_map_base	= MSP_PCI_IOSPACE_BASE,
 	.io_resource	= &pci_io_resource,
 	.io_offset	= 0
 };
arch/mips/pci/pci-yosemite.c +1 -0
index 0357946..cf5e1a2 100644
@@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(void)
 		panic(ioremap_failed);
 
 	set_io_port_base(io_v_base);
+	py_controller.io_map_base = io_v_base;
 	TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
 
 	ioport_resource.end = TITAN_IO_SIZE - 1;
arch/mips/pnx8550/common/pci.c +1 -0
index eee4f3d..98e86dd 100644
@@ -44,6 +44,7 @@ extern struct pci_ops pnx8550_pci_ops;
 
 static struct pci_controller pnx8550_controller = {
 	.pci_ops	= &pnx8550_pci_ops,
+	.io_map_base	= PNX8550_PORT_BASE,
 	.io_resource	= &pci_io_resource,
 	.mem_resource	= &pci_mem_resource,
 };
arch/mips/pnx8550/common/setup.c +1 -1
index 2aed50f..64246c9 100644
@@ -113,7 +113,7 @@ void __init plat_mem_setup(void)
 	PNX8550_GLB2_ENAB_INTA_O = 0;
 
 	/* IO/MEM resources. */
-	set_io_port_base(KSEG1);
+	set_io_port_base(PNX8550_PORT_BASE);
 	ioport_resource.start = 0;
 	ioport_resource.end = ~0;
 	iomem_resource.start = 0;
Signature · 1 line
1.7.1
Applied
#1 lore raw
Quoted 7 lines · Ben Hutchings

Several MIPS platforms don't set pci_controller::io_map_base for their PCI bridges. This results in a panic in pci_iomap(). (The panic is conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI MIPS systems.)

I have tested the change to Malta in qemu; the other platforms not at all.

Thanks, applied.

Ralf