Update kirkwood egiga to allow dynamic phy addrs
cover Update kirkwood egiga to allow dynamic phy addrs
Today the kirkwood egiga driver assumes that phy addresses are consecutive from a base address.
Our new board design using this cpu unfortunately has a non contiguous addressing of its phys and thus doesn't work with the current implementation.
This patchset updates the implementation to use an array of phy addresses as configuration.
Tor Krill (6):
Allow PHY addresses on kirkwood egiga to be non continuous. Convert Suen3 board to use array of phy addrs Convert Sheevaplug board to use array of phy addrs Convert OpenRD board to use array of phy addrs Convert Guruplug board to use array of phy addrs Convert rd6281a board to use array of phy addrs
board/keymile/km_arm/km_arm.c | 3 ++- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- include/configs/guruplug.h | 2 +- include/configs/km_arm.h | 2 +- include/configs/openrd_base.h | 2 +- include/configs/rd6281a.h | 2 +- include/configs/sheevaplug.h | 2 +- 8 files changed, 13 insertions(+), 11 deletions(-)
PATCH 1/6 Allow PHY addresses on kirkwood egiga to be non continuous.
Changing its configuration from PHY_BASE_ADR single value to use CONFIG_PHY_ADDRS as an array with adresses.
--- drivers/net/kirkwood_egiga.c | 3 ++- drivers/net/kirkwood_egiga.h | 8 ++++---- 2 files changed, 6 insertions(+), 5 deletions(-)
drivers/net/kirkwood_egiga.c +2 -1
@@ -629,6 +629,7 @@ int kirkwood_egiga_initialize(bd_t * bis)int devnum;char *s;u8 used_ports[MAX_KWGBE_DEVS ] =CONFIG_KIRKWOOD_EGIGA_PORTS ; +u8 port_addr[MAX_KWGBE_DEVS ] =PHY_ADDRS ;for (devnum =0 ; devnum <MAX_KWGBE_DEVS ; devnum++) {/*skip if port is configured not to use */
@@ -712,7 +713,7 @@ int kirkwood_egiga_initialize(bd_t * bis)miiphy_register (dev->name, smi_reg_read, smi_reg_write);/* Set phy address of the port */ miiphy_write (dev->name,KIRKWOOD_PHY_ADR_REQUEST , -KIRKWOOD_PHY_ADR_REQUEST ,PHY_BASE_ADR + devnum); +KIRKWOOD_PHY_ADR_REQUEST , port_addr[devnum]);#endif }return 0 ;
drivers/net/kirkwood_egiga.h +4 -4
@@ -30,11 +30,11 @@#define MAX_KWGBE_DEVS 2/*controller has two ports */ -/* PHY_BASE_ADR is board specific and can be configured */ -#if defined (CONFIG_PHY_BASE_ADR ) -#define PHY_BASE_ADR CONFIG_PHY_BASE_ADR +/* PHY addresses is board specific and can be configured */ +#if defined (CONFIG_PHY_ADDRS ) +#define PHY_ADDRS CONFIG_PHY_ADDRS#else -#define PHY_BASE_ADR 0x08/* default phy base addr */ +#define PHY_ADDRS {0x08,0x09}/* default phy base addr */ #endif /* Constants */
Signature · 1 line
1.7.0.4
PATCH 2/6 Convert Suen3 board to use array of phy addrs
In reply to Tor Krill--- board/keymile/km_arm/km_arm.c | 3 ++- include/configs/km_arm.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-)
board/keymile/km_arm/km_arm.c +2 -1
@@ -244,12 +244,13 @@ int dram_init(void)void reset_phy (void ) {char *name ="egiga0" ; +u8 port_addr[] =CONFIG_PHY_ADDRS ;if (miiphy_set_current_dev (name))return ;/* reset the phy */ -miiphy_reset (name,CONFIG_PHY_BASE_ADR ); +miiphy_reset (name, port_addr[0 ]); }#if defined(CONFIG_HUSH_INIT_VAR )
include/configs/km_arm.h +1 -1
@@ -130,7 +130,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
Signature · 1 line
1.7.0.4
PATCH 3/6 Convert Sheevaplug board to use array of phy addrs
In reply to Tor Krill--- include/configs/sheevaplug.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
include/configs/sheevaplug.h +1 -1
@@ -177,7 +177,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #endif /* CONFIG_CMD_NET */
Signature · 1 line
1.7.0.4
PATCH 4/6 Convert OpenRD board to use array of phy addrs
In reply to Tor Krill--- include/configs/openrd_base.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
include/configs/openrd_base.h +1 -1
@@ -186,7 +186,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0}/* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0x8 +#define CONFIG_PHY_ADDRS {0x8,0x9}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #endif /* CONFIG_CMD_NET */
Signature · 1 line
1.7.0.4
PATCH 5/6 Convert Guruplug board to use array of phy addrs
In reply to Tor Krill--- include/configs/guruplug.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
include/configs/guruplug.h +1 -1
@@ -175,7 +175,7 @@#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1}/* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_PHY_ADDRS {0,1}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv88e1121 PHY */ #endif /* CONFIG_CMD_NET */
Signature · 1 line
1.7.0.4
PATCH 6/6 Convert rd6281a board to use array of phy addrs
In reply to Tor Krill--- include/configs/rd6281a.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
include/configs/rd6281a.h +1 -1
@@ -176,7 +176,7 @@#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE #define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */ #define CONFIG_PHY_SPEED _1000BASET/*Force PHYspeed to 1GBPs */ -#define CONFIG_PHY_BASE_ADR 0x0A +#define CONFIG_PHY_ADDRS {0x0A,0x0B}#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init switch and PHY */ #define CONFIG_MV88E61XX_SWITCH /* Enable MV88E61XX switch driver */
Signature · 1 line
1.7.0.4