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tsec: Fix eTSEC2 link problem on P2020RDB

PATCH New Felix Radensky 4 participants 5 messages Jun 27, 2010 – Jun 29, 2010 Network drivers

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#0 lore raw

PATCH 1/1 tsec: Fix eTSEC2 link problem on P2020RDB

On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB.

---
 drivers/net/tsec.c          |    6 +++++-
 include/configs/P1_P2_RDB.h |    9 +++++++++
 2 files changed, 14 insertions(+), 1 deletions(-)
drivers/net/tsec.c +5 -1
index 3e4c3bd..5fa6f61 100644
@@ -281,12 +281,16 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs,
 		| TBIANA_FULL_DUPLEX \
 		)
 
-/* Force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
+/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
+#ifndef CONFIG_TSEC_TBICR_SETTINGS
 #define TBICR_SETTINGS ( \
 		TBICR_PHY_RESET \
 		| TBICR_FULL_DUPLEX \
 		| TBICR_SPEED1_SET \
 		)
+#else
+#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
+#endif /* CONFIG_TSEC_TBICR_SETTINGS */
 
 /* Configure the TBI for SGMII operation */
 static void tsec_configure_serdes(struct tsec_private *priv)
include/configs/P1_P2_RDB.h +9 -0
index a9b4004..4b7e190 100644
@@ -425,6 +425,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_ETHPRIME		"eTSEC1"
 
 #define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
+
+/* TBI PHY configuration for SGMII mode */
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
+		TBICR_PHY_RESET \
+		| TBICR_ANEG_ENABLE \
+		| TBICR_FULL_DUPLEX \
+		| TBICR_SPEED1_SET \
+		)
+
 #endif	/* CONFIG_TSEC_ENET */
 
 /*
Signature · 1 line
1.5.4.3
#1 lore raw

PATCH 1/1 tsec: Fix eTSEC2 link problem on P2020RDB

Quoted 8 lines · Felix Radensky

On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB.

#2 lore raw

PATCH 1/1 tsec: Fix eTSEC2 link problem on P2020RDB

In reply to Felix Radensky

Dear Felix Radensky,

Quoted 4 lines · In message <[email protected]> you wrote:

On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up.

Quoted 8 lines

Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB.

---
 drivers/net/tsec.c          |    6 +++++-
 include/configs/P1_P2_RDB.h |    9 +++++++++
 2 files changed, 14 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Man did not weave the web of life; he  is  merely  a  strand  in  it.
Whatever he does to the web, he does to himself.     - Seattle [1854]
#3 lore raw

PATCH 1/1 tsec: Fix eTSEC2 link problem on P2020RDB

Quoted 10 lines · Wolfgang Denk

Dear Felix Radensky,

Quoted 7 lines · In message <[email protected]> you wrote:

On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII. Current TBI PHY settings for SGMII mode cause link problems on this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working configuration for P2020RDB.

Quoted 7 lines
Quoted 5 lines
---
 drivers/net/tsec.c          |    6 +++++-
 include/configs/P1_P2_RDB.h |    9 +++++++++
 2 files changed, 14 insertions(+), 1 deletions(-)

Applied, thanks.

A little late, but:

Peter

#4 lore raw

PATCH 1/1 tsec: Fix eTSEC2 link problem on P2020RDB

Dear Peter Tyser,

Quoted 6 lines · In message <1277838432.31352.197.camel@petert> you wrote:
Quoted 2 lines

Applied, thanks.

A little late, but:

Not too late. Added, thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The use of COBOL cripples the mind; its teaching  should,  therefore,
be regarded as a criminal offense.                   - E. W. Dijkstra