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tqm85xx: enable PCMCIA bridge on ST85xx baseboards.

PATCH Applied Dmitry Eremin-Solenikov 2 participants 7 messages Jul 21, 2010 – Aug 4, 2010

Subsystems (3)
Device tree bindings PowerPC Linux for PowerPC embedded PPC85XX
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Dmitry Eremin-Solenikov

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#0 lore raw

cover tqm85xx: enable PCMCIA bridge on ST85xx baseboards.

Baseboards for tqm85xx modules (STK85xx) bear TI PCI1520 PCMCIA controllers. These two patches enables one to fully use this controller in Linux.

author
#1 lore raw

PATCH 1/2 tqm85xx: update PCI interrupt-map attribute

Update PCI IRQ mapping on TQM85xx platforms: include INTC and INTD on PCI-X slot and add INTA/INTB mapping for PCMCIA bridge.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>
---
 arch/powerpc/boot/dts/tqm8540.dts          |    9 ++++++++-
 arch/powerpc/boot/dts/tqm8541.dts          |    9 ++++++++-
 arch/powerpc/boot/dts/tqm8548-bigflash.dts |    9 ++++++++-
 arch/powerpc/boot/dts/tqm8548.dts          |    9 ++++++++-
 arch/powerpc/boot/dts/tqm8555.dts          |    9 ++++++++-
 arch/powerpc/boot/dts/tqm8560.dts          |    9 ++++++++-
 6 files changed, 48 insertions(+), 6 deletions(-)
arch/powerpc/boot/dts/tqm8540.dts +8 -1
index 7161b93..b5c0940 100644
@@ -290,7 +290,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
arch/powerpc/boot/dts/tqm8541.dts +8 -1
index b30f637..f49d091 100644
@@ -311,7 +311,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
arch/powerpc/boot/dts/tqm8548-bigflash.dts +8 -1
index 61f25e1..5dbb36e 100644
@@ -442,7 +442,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
arch/powerpc/boot/dts/tqm8548.dts +8 -1
index 025759c..a050ae4 100644
@@ -442,7 +442,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
arch/powerpc/boot/dts/tqm8555.dts +8 -1
index 95e2873..81bad8c 100644
@@ -311,7 +311,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
arch/powerpc/boot/dts/tqm8560.dts +8 -1
index ff70580..22ec39b 100644
@@ -382,7 +382,14 @@
 		interrupt-map = <
 				/* IDSEL 28 */
 				 0xe000 0 0 1 &mpic 2 1
-				 0xe000 0 0 2 &mpic 3 1>;
+				 0xe000 0 0 2 &mpic 3 1
+				 0xe000 0 0 3 &mpic 6 1
+				 0xe000 0 0 4 &mpic 5 1
+
+				/* IDSEL 11 */
+				 0x5800 0 0 1 &mpic 6 1
+				 0x5800 0 0 2 &mpic 5 1
+				 >;
 
 		interrupt-parent = <&mpic>;
 		interrupts = <24 2>;
Signature · 1 line
1.7.1
Applied
#2 lore raw

Re: [PATCH 1/2] tqm85xx: update PCI interrupt-map attribute

Quoted 4 lines · Dmitry Eremin-Solenikov

Update PCI IRQ mapping on TQM85xx platforms: include INTC and INTD on PCI-X slot and add INTA/INTB mapping for PCMCIA bridge.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>
Quoted 8 lines

---

arch/powerpc/boot/dts/tqm8540.dts          |    9 ++++++++-
arch/powerpc/boot/dts/tqm8541.dts          |    9 ++++++++-
arch/powerpc/boot/dts/tqm8548-bigflash.dts |    9 ++++++++-
arch/powerpc/boot/dts/tqm8548.dts          |    9 ++++++++-
arch/powerpc/boot/dts/tqm8555.dts          |    9 ++++++++-
arch/powerpc/boot/dts/tqm8560.dts          |    9 ++++++++-
6 files changed, 48 insertions(+), 6 deletions(-)

applied to next

- k

author
#3 lore raw

PATCH 2/2 tqm85xx: add a quirk for ti1520 PCMCIA bridge

In reply to Dmitry Eremin-Solenikov

By default ti1520 bridge expects an input clock on CLOCK pin (to control power chip). However on this boards CLOCK should be generated by PCI1520 itself. Add a quirk that enables internal 16 KHz clock generation on this pin.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>
---
 arch/powerpc/platforms/85xx/tqm85xx.c |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)
arch/powerpc/platforms/85xx/tqm85xx.c +21 -0
index 5b0ab99..8f29bbc 100644
@@ -151,6 +151,27 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
 	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
+static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
+{
+	unsigned int val;
+
+	/* Do not do the fixup on other platforms! */
+	if (!machine_is(tqm85xx))
+		return;
+
+	dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
+
+	/*
+	 * Enable P2CCLK bit in system control register
+	 * to enable CLOCK output to power chip
+	 */
+	pci_read_config_dword(pdev, 0x80, &val);
+	pci_write_config_dword(pdev, 0x80, val | (1 << 27));
+
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
+		tqm85xx_ti1520_fixup);
+
 static struct of_device_id __initdata of_bus_ids[] = {
 	{ .compatible = "simple-bus", },
 	{ .compatible = "gianfar", },
Signature · 1 line
1.7.1
Applied
#4 lore raw

Re: [PATCH 2/2] tqm85xx: add a quirk for ti1520 PCMCIA bridge

Quoted 9 lines · Dmitry Eremin-Solenikov

By default ti1520 bridge expects an input clock on CLOCK pin (to control power chip). However on this boards CLOCK should be generated by PCI1520 itself. Add a quirk that enables internal 16 KHz clock generation on this pin.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>

---
arch/powerpc/platforms/85xx/tqm85xx.c | 21 +++++++++++++++++++++

1 files changed, 21 insertions(+), 0 deletions(-)

applied to next

- k

Applied
#5 lore raw

Re: [PATCH 2/2] tqm85xx: add a quirk for ti1520 PCMCIA bridge

In reply to Dmitry Eremin-Solenikov
Quoted 9 lines · Dmitry Eremin-Solenikov

By default ti1520 bridge expects an input clock on CLOCK pin (to control power chip). However on this boards CLOCK should be generated by PCI1520 itself. Add a quirk that enables internal 16 KHz clock generation on this pin.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>

---
arch/powerpc/platforms/85xx/tqm85xx.c | 21 +++++++++++++++++++++

1 files changed, 21 insertions(+), 0 deletions(-)

applied to next

- k

author
#6 lore raw
In reply to Dmitry Eremin-Solenikov

Hello,

Quoted 2 lines · Dmitry Eremin-Solenikov

Baseboards for tqm85xx modules (STK85xx) bear TI PCI1520 PCMCIA controllers. These two patches enables one to fully use this controller in Linux.

I'm sorry, what about these two patches?

Signature · 2 lines
With best wishes
Dmitry