omap2: i2c: minor cleanup

PATCH New Nishanth Menon 4 participants 11 messages Aug 19, 2010 – Sep 7, 2010 1 message not in the archive

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Arm (32-bit) I2C

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A message that is not in the archive (sent off-list or not yet received): Commit d708395d breaks omap2420h4 board...

Nishanth Menon

author

2010-08-19 00:39 UTC #1 lore raw

cover omap2: i2c: minor cleanup

As reported by wolfgang [1] sdp2420 platform build is broken atm

looking at the same showed some potential cleanups possible in addition to fixing the problem

Warning: i dont have a board around, so only build tested for omap2, tested for omap3

Nishanth Menon (3):
i2c: omap2+: change header guard to be generic
omap2: i2c: add syss offset
omap2: i2c: remove redundant header definitions

 arch/arm/include/asm/arch-omap24xx/i2c.h |  110 +-----------------------------
 drivers/i2c/omap24xx_i2c.h               |    4 +-
 2 files changed, 5 insertions(+), 109 deletions(-)

Cc Steve Sakoman <[email protected]>

Cc Heiko <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Wolfang Denk <[email protected]>

Regards,
Nishanth Menon
Ref:
[1] http://lists.denx.de/pipermail/u-boot/2010-August/075826.html

Steve Sakoman

2010-08-19 03:28 UTC #2 lore raw

cover omap2: i2c: minor cleanup

Quoted 4 lines · Nishanth Menon

As reported by wolfgang [1] sdp2420 platform build is broken atm
looking at the same showed some potential cleanups possible in addition to fixing the problem

Thanks Nishanth! You beat me to it.

These look fine to me, I'll add my Ack-ed by to the individual patches.

Steve

Quoted 22 lines

Warning: i dont have a board around, so only build tested for omap2, tested for omap3
Nishanth Menon (3):
i2c: omap2+: change header guard to be generic
omap2: i2c: add syss offset
omap2: i2c: remove redundant header definitions
 arch/arm/include/asm/arch-omap24xx/i2c.h |  110 +-----------------------------
 drivers/i2c/omap24xx_i2c.h               |    4 +-
 2 files changed, 5 insertions(+), 109 deletions(-)
Cc Steve Sakoman <[email protected]>
Cc Heiko <[email protected]>
Cc Sandeep Paulraj <[email protected]>
Cc Wolfang Denk <[email protected]>
Regards,
Nishanth Menon
Ref:
[1] http://lists.denx.de/pipermail/u-boot/2010-August/075826.html

Heiko Schocher

2010-08-23 06:29 UTC #3 lore raw

[U-Boot] Pull request: u-boot-i2c

Hello Wolfgang,

The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

are available in the git repository at:

git://git.denx.de/u-boot-i2c.git master

Nishanth Menon (3):
i2c: omap2+: change header guard to be generic
omap2: i2c: add syss offset
omap2: i2c: remove redundant header definitions

 arch/arm/include/asm/arch-omap24xx/i2c.h |  110 +-----------------------------
 drivers/i2c/omap24xx_i2c.h               |    4 +-
 2 files changed, 5 insertions(+), 109 deletions(-)

bye
Heiko

Signature · 2 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Heiko Schocher

2010-08-26 06:37 UTC #4 lore raw

[U-Boot] Pull request v2: u-boot-i2c

Hello Wolfgang,

The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

are available in the git repository at:

git://git.denx.de/u-boot-i2c.git master

Nishanth Menon (3):
i2c: omap2+: change header guard to be generic
omap2: i2c: add syss offset
omap2: i2c: remove redundant header definitions

Reinhard Meyer (1):
CMD_I2C: make alen=0 work

 arch/arm/include/asm/arch-omap24xx/i2c.h |  110 +-----------------------------
 common/cmd_i2c.c                         |   17 ++---
 drivers/i2c/omap24xx_i2c.h               |    4 +-
 3 files changed, 12 insertions(+), 119 deletions(-)

bye
Heiko

Signature · 2 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Wolfgang Denk

Applied

2010-09-07 19:39 UTC #5 lore raw

[U-Boot] Pull request v2: u-boot-i2c

Dear Heiko Schocher,

Quoted 15 lines · In message <[email protected]> you wrote:

Hello Wolfgang,
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
are available in the git repository at:
git://git.denx.de/u-boot-i2c.git master
Nishanth Menon (3):
i2c: omap2+: change header guard to be generic
omap2: i2c: add syss offset
omap2: i2c: remove redundant header definitions

Quoted 7 lines

Reinhard Meyer (1):
CMD_I2C: make alen=0 work

 arch/arm/include/asm/arch-omap24xx/i2c.h |  110 +-----------------------------
 common/cmd_i2c.c                         |   17 ++---
 drivers/i2c/omap24xx_i2c.h               |    4 +-
 3 files changed, 12 insertions(+), 119 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
For every complex problem, there is a solution that is simple,  neat,
and wrong.                                           -- H. L. Mencken

Nishanth Menon

author

2010-08-19 00:39 UTC #6 lore raw

PATCH 1/3 i2c: omap2+: change header guard to be generic

In reply to a message not in the archive

Make the header guard to be generic to stop conflicting with omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h

Cc Steve Sakoman <[email protected]>

Cc Heiko <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Wolfang Denk <[email protected]>

Signed-off-by Nishanth Menon <[email protected]>

---
 drivers/i2c/omap24xx_i2c.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

drivers/i2c/omap24xx_i2c.h +2 -2

index 650e33a..1f38c23 100644
@@ -20,8 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef _OMAP24XX_I2C_H_
-#define _OMAP24XX_I2C_H_
+#ifndef _OMAP2PLUS_I2C_H_
+#define _OMAP2PLUS_I2C_H_
 
 /* I2C masks */

Signature · 1 line

1.6.3.3

Steve Sakoman

2010-08-19 03:29 UTC #7 lore raw

PATCH 1/3 i2c: omap2+: change header guard to be generic

Quoted 9 lines · Nishanth Menon

Make the header guard to be generic to stop conflicting with omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h
Cc Steve Sakoman <[email protected]>
Cc Heiko <[email protected]>
Cc Sandeep Paulraj <[email protected]>
Cc Wolfang Denk <[email protected]>
Signed-off-by Nishanth Menon <[email protected]>

Acked-by Steve Sakoman <[email protected]>

Steve

Quoted 19 lines

---
 drivers/i2c/omap24xx_i2c.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

drivers/i2c/omap24xx_i2c.h +2 -2

index 650e33a..1f38c23 100644
@@ -20,8 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef _OMAP24XX_I2C_H_
-#define _OMAP24XX_I2C_H_
+#ifndef _OMAP2PLUS_I2C_H_
+#define _OMAP2PLUS_I2C_H_
 
 /* I2C masks */

Nishanth Menon

author

2010-08-19 00:39 UTC #8 lore raw

PATCH 2/3 omap2: i2c: add syss offset

In reply to a message not in the archive

OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it.

Cc Steve Sakoman <[email protected]>

Cc Heiko <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Wolfang Denk <[email protected]>

Signed-off-by Nishanth Menon <[email protected]>

---
 arch/arm/include/asm/arch-omap24xx/i2c.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

arch/arm/include/asm/arch-omap24xx/i2c.h +3 -1

index 19046aa..418a432 100644
@@ -36,7 +36,9 @@ struct i2c {
 	unsigned short stat;	/* 0x08 */
 	unsigned short res3;
 	unsigned short iv;	/* 0x0C */
-	unsigned short res4[3];
+	unsigned short res4;
+	unsigned short syss;	/* 0x10 */
+	unsigned short res4p1;
 	unsigned short buf;	/* 0x14 */
 	unsigned short res5;
 	unsigned short cnt;	/* 0x18 */

Signature · 1 line

1.6.3.3

Steve Sakoman

2010-08-19 03:28 UTC #9 lore raw

PATCH 2/3 omap2: i2c: add syss offset

Quoted 8 lines · Nishanth Menon

OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it.
Cc Steve Sakoman <[email protected]>
Cc Heiko <[email protected]>
Cc Sandeep Paulraj <[email protected]>
Cc Wolfang Denk <[email protected]>
Signed-off-by Nishanth Menon <[email protected]>

Acked-by Steve Sakoman <[email protected]>

Steve

Quoted 19 lines

---
 arch/arm/include/asm/arch-omap24xx/i2c.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

arch/arm/include/asm/arch-omap24xx/i2c.h +3 -1

index 19046aa..418a432 100644
@@ -36,7 +36,9 @@ struct i2c {
 	unsigned short stat;	/* 0x08 */
 	unsigned short res3;
 	unsigned short iv;	/* 0x0C */
-	unsigned short res4[3];
+	unsigned short res4;
+	unsigned short syss;	/* 0x10 */
+	unsigned short res4p1;
 	unsigned short buf;	/* 0x14 */
 	unsigned short res5;
 	unsigned short cnt;	/* 0x18 */

Nishanth Menon

author

2010-08-19 00:39 UTC #10 lore raw

PATCH 3/3 omap2: i2c: remove redundant header definitions

In reply to a message not in the archive

Remove the register offset and common defines which are already present in drivers/i2c/omap24xx.h. All of these defines carry the same value even.

Cc Steve Sakoman <[email protected]>

Cc Heiko <[email protected]>

Cc Sandeep Paulraj <[email protected]>

Cc Wolfang Denk <[email protected]>

Signed-off-by Nishanth Menon <[email protected]>

---
 arch/arm/include/asm/arch-omap24xx/i2c.h |  106 ------------------------------
 1 files changed, 0 insertions(+), 106 deletions(-)

arch/arm/include/asm/arch-omap24xx/i2c.h +0 ~~-106~~

index 418a432..6f64519 100644
@@ -65,110 +65,4 @@ struct i2c {
 
 #define I2C_BUS_MAX	2
 
-/* I2C masks */
-
-/* I2C Interrupt Enable Register (I2C_IE): */
-#define I2C_IE_GC_IE    (1 << 5)
-#define I2C_IE_XRDY_IE  (1 << 4)        /* Transmit data ready interrupt enable */
-#define I2C_IE_RRDY_IE  (1 << 3)        /* Receive data ready interrupt enable */
-#define I2C_IE_ARDY_IE  (1 << 2)        /* Register access ready interrupt enable */
-#define I2C_IE_NACK_IE  (1 << 1)        /* No acknowledgment interrupt enable */
-#define I2C_IE_AL_IE    (1 << 0)        /* Arbitration lost interrupt enable */
-
-/* I2C Status Register (I2C_STAT): */
-
-#define I2C_STAT_SBD    (1 << 15)       /* Single byte data */
-#define I2C_STAT_BB     (1 << 12)       /* Bus busy */
-#define I2C_STAT_ROVR   (1 << 11)       /* Receive overrun */
-#define I2C_STAT_XUDF   (1 << 10)       /* Transmit underflow */
-#define I2C_STAT_AAS    (1 << 9)        /* Address as slave */
-#define I2C_STAT_GC     (1 << 5)
-#define I2C_STAT_XRDY   (1 << 4)        /* Transmit data ready */
-#define I2C_STAT_RRDY   (1 << 3)        /* Receive data ready */
-#define I2C_STAT_ARDY   (1 << 2)        /* Register access ready */
-#define I2C_STAT_NACK   (1 << 1)        /* No acknowledgment interrupt enable */
-#define I2C_STAT_AL     (1 << 0)        /* Arbitration lost interrupt enable */
-
-
-/* I2C Interrupt Code Register (I2C_INTCODE): */
-
-#define I2C_INTCODE_MASK        7
-#define I2C_INTCODE_NONE        0
-#define I2C_INTCODE_AL          1       /* Arbitration lost */
-#define I2C_INTCODE_NAK         2       /* No acknowledgement/general call */
-#define I2C_INTCODE_ARDY        3       /* Register access ready */
-#define I2C_INTCODE_RRDY        4       /* Rcv data ready */
-#define I2C_INTCODE_XRDY        5       /* Xmit data ready */
-
-/* I2C Buffer Configuration Register (I2C_BUF): */
-
-#define I2C_BUF_RDMA_EN         (1 << 15)       /* Receive DMA channel enable */
-#define I2C_BUF_XDMA_EN         (1 << 7)        /* Transmit DMA channel enable */
-
-/* I2C Configuration Register (I2C_CON): */
-
-#define I2C_CON_EN      (1 << 15)       /* I2C module enable */
-#define I2C_CON_BE      (1 << 14)       /* Big endian mode */
-#define I2C_CON_STB     (1 << 11)       /* Start byte mode (master mode only) */
-#define I2C_CON_MST     (1 << 10)       /* Master/slave mode */
-#define I2C_CON_TRX     (1 << 9)        /* Transmitter/receiver mode (master mode only) */
-#define I2C_CON_XA      (1 << 8)        /* Expand address */
-#define I2C_CON_STP     (1 << 1)        /* Stop condition (master mode only) */
-#define I2C_CON_STT     (1 << 0)        /* Start condition (master mode only) */
-
-/* I2C System Test Register (I2C_SYSTEST): */
-
-#define I2C_SYSTEST_ST_EN       (1 << 15)       /* System test enable */
-#define I2C_SYSTEST_FREE        (1 << 14)       /* Free running mode (on breakpoint) */
-#define I2C_SYSTEST_TMODE_MASK  (3 << 12)       /* Test mode select */
-#define I2C_SYSTEST_TMODE_SHIFT (12)            /* Test mode select */
-#define I2C_SYSTEST_SCL_I       (1 << 3)        /* SCL line sense input value */
-#define I2C_SYSTEST_SCL_O       (1 << 2)        /* SCL line drive output value */
-#define I2C_SYSTEST_SDA_I       (1 << 1)        /* SDA line sense input value */
-#define I2C_SYSTEST_SDA_O       (1 << 0)        /* SDA line drive output value */
-
-/* These values were copied from omap3, include/asm-arm/arch-omap3/i2c.h. */
-#define OMAP_I2C_STANDARD		100000
-#define OMAP_I2C_FAST_MODE		400000
-#define OMAP_I2C_HIGH_SPEED		3400000
-
-#define SYSTEM_CLOCK_12			12000000
-#define SYSTEM_CLOCK_13			13000000
-#define SYSTEM_CLOCK_192		19200000
-#define SYSTEM_CLOCK_96			96000000
-
-#ifndef I2C_IP_CLK
-#define I2C_IP_CLK			SYSTEM_CLOCK_96
-#endif
-
-#ifndef I2C_INTERNAL_SAMPLING_CLK
-#define I2C_INTERNAL_SAMPLING_CLK	19200000
-#endif
-
-/* These are the trim values for standard and fast speed */
-#ifndef I2C_FASTSPEED_SCLL_TRIM
-#define I2C_FASTSPEED_SCLL_TRIM		6
-#endif
-#ifndef I2C_FASTSPEED_SCLH_TRIM
-#define I2C_FASTSPEED_SCLH_TRIM		6
-#endif
-
-/* These are the trim values for high speed */
-#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM
-#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM
-#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM
-#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM
-#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
-#endif
-
-#define I2C_PSC_MAX			0x0f
-#define I2C_PSC_MIN			0x00
-
-
 #endif

Signature · 1 line

1.6.3.3

Steve Sakoman

2010-08-19 03:30 UTC #11 lore raw

PATCH 3/3 omap2: i2c: remove redundant header definitions

Quoted 10 lines · Nishanth Menon

Remove the register offset and common defines which are already present in drivers/i2c/omap24xx.h. All of these defines carry the same value even.
Cc Steve Sakoman <[email protected]>
Cc Heiko <[email protected]>
Cc Sandeep Paulraj <[email protected]>
Cc Wolfang Denk <[email protected]>
Signed-off-by Nishanth Menon <[email protected]>

Acked-by Steve Sakoman <[email protected]>

Steve

Quoted 119 lines

---
 arch/arm/include/asm/arch-omap24xx/i2c.h |  106 ------------------------------
 1 files changed, 0 insertions(+), 106 deletions(-)

arch/arm/include/asm/arch-omap24xx/i2c.h +0 ~~-106~~

index 418a432..6f64519 100644
@@ -65,110 +65,4 @@ struct i2c {
 
 #define I2C_BUS_MAX	2
 
-/* I2C masks */
-
-/* I2C Interrupt Enable Register (I2C_IE): */
-#define I2C_IE_GC_IE    (1 << 5)
-#define I2C_IE_XRDY_IE  (1 << 4)        /* Transmit data ready interrupt enable */
-#define I2C_IE_RRDY_IE  (1 << 3)        /* Receive data ready interrupt enable */
-#define I2C_IE_ARDY_IE  (1 << 2)        /* Register access ready interrupt enable */
-#define I2C_IE_NACK_IE  (1 << 1)        /* No acknowledgment interrupt enable */
-#define I2C_IE_AL_IE    (1 << 0)        /* Arbitration lost interrupt enable */
-
-/* I2C Status Register (I2C_STAT): */
-
-#define I2C_STAT_SBD    (1 << 15)       /* Single byte data */
-#define I2C_STAT_BB     (1 << 12)       /* Bus busy */
-#define I2C_STAT_ROVR   (1 << 11)       /* Receive overrun */
-#define I2C_STAT_XUDF   (1 << 10)       /* Transmit underflow */
-#define I2C_STAT_AAS    (1 << 9)        /* Address as slave */
-#define I2C_STAT_GC     (1 << 5)
-#define I2C_STAT_XRDY   (1 << 4)        /* Transmit data ready */
-#define I2C_STAT_RRDY   (1 << 3)        /* Receive data ready */
-#define I2C_STAT_ARDY   (1 << 2)        /* Register access ready */
-#define I2C_STAT_NACK   (1 << 1)        /* No acknowledgment interrupt enable */
-#define I2C_STAT_AL     (1 << 0)        /* Arbitration lost interrupt enable */
-
-
-/* I2C Interrupt Code Register (I2C_INTCODE): */
-
-#define I2C_INTCODE_MASK        7
-#define I2C_INTCODE_NONE        0
-#define I2C_INTCODE_AL          1       /* Arbitration lost */
-#define I2C_INTCODE_NAK         2       /* No acknowledgement/general call */
-#define I2C_INTCODE_ARDY        3       /* Register access ready */
-#define I2C_INTCODE_RRDY        4       /* Rcv data ready */
-#define I2C_INTCODE_XRDY        5       /* Xmit data ready */
-
-/* I2C Buffer Configuration Register (I2C_BUF): */
-
-#define I2C_BUF_RDMA_EN         (1 << 15)       /* Receive DMA channel enable */
-#define I2C_BUF_XDMA_EN         (1 << 7)        /* Transmit DMA channel enable */
-
-/* I2C Configuration Register (I2C_CON): */
-
-#define I2C_CON_EN      (1 << 15)       /* I2C module enable */
-#define I2C_CON_BE      (1 << 14)       /* Big endian mode */
-#define I2C_CON_STB     (1 << 11)       /* Start byte mode (master mode only) */
-#define I2C_CON_MST     (1 << 10)       /* Master/slave mode */
-#define I2C_CON_TRX     (1 << 9)        /* Transmitter/receiver mode (master mode only) */
-#define I2C_CON_XA      (1 << 8)        /* Expand address */
-#define I2C_CON_STP     (1 << 1)        /* Stop condition (master mode only) */
-#define I2C_CON_STT     (1 << 0)        /* Start condition (master mode only) */
-
-/* I2C System Test Register (I2C_SYSTEST): */
-
-#define I2C_SYSTEST_ST_EN       (1 << 15)       /* System test enable */
-#define I2C_SYSTEST_FREE        (1 << 14)       /* Free running mode (on breakpoint) */
-#define I2C_SYSTEST_TMODE_MASK  (3 << 12)       /* Test mode select */
-#define I2C_SYSTEST_TMODE_SHIFT (12)            /* Test mode select */
-#define I2C_SYSTEST_SCL_I       (1 << 3)        /* SCL line sense input value */
-#define I2C_SYSTEST_SCL_O       (1 << 2)        /* SCL line drive output value */
-#define I2C_SYSTEST_SDA_I       (1 << 1)        /* SDA line sense input value */
-#define I2C_SYSTEST_SDA_O       (1 << 0)        /* SDA line drive output value */
-
-/* These values were copied from omap3, include/asm-arm/arch-omap3/i2c.h. */
-#define OMAP_I2C_STANDARD		100000
-#define OMAP_I2C_FAST_MODE		400000
-#define OMAP_I2C_HIGH_SPEED		3400000
-
-#define SYSTEM_CLOCK_12			12000000
-#define SYSTEM_CLOCK_13			13000000
-#define SYSTEM_CLOCK_192		19200000
-#define SYSTEM_CLOCK_96			96000000
-
-#ifndef I2C_IP_CLK
-#define I2C_IP_CLK			SYSTEM_CLOCK_96
-#endif
-
-#ifndef I2C_INTERNAL_SAMPLING_CLK
-#define I2C_INTERNAL_SAMPLING_CLK	19200000
-#endif
-
-/* These are the trim values for standard and fast speed */
-#ifndef I2C_FASTSPEED_SCLL_TRIM
-#define I2C_FASTSPEED_SCLL_TRIM		6
-#endif
-#ifndef I2C_FASTSPEED_SCLH_TRIM
-#define I2C_FASTSPEED_SCLH_TRIM		6
-#endif
-
-/* These are the trim values for high speed */
-#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM
-#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM
-#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM
-#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
-#endif
-#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM
-#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
-#endif
-
-#define I2C_PSC_MAX			0x0f
-#define I2C_PSC_MIN			0x00
-
-
 #endif