ARM: pxa168: fix corrected reset vector

PATCH Applied Mark F. Brown 3 participants 16 messages Aug 26, 2010 – Aug 31, 2010

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Arm (32-bit) Arm sub-architectures Mmp support

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Mark F. Brown

author

2010-08-26 09:07 UTC #0 lore raw

cover ARM: pxa168: fix corrected reset vector

Reset vector for pxa168 is 0xffff_0000 not 0x0
This fix allows reboot to work

Mark F. Brown (1):
ARM: pxa168: fix corrected reset vector

 arch/arm/mach-mmp/include/mach/system.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Mark F. Brown

author

2010-08-26 09:07 UTC #1 lore raw

PATCH 1/1 ARM: pxa168: fix corrected reset vector

Signed-off-by Mark F. Brown <[email protected]>

---
 arch/arm/mach-mmp/include/mach/system.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

arch/arm/mach-mmp/include/mach/system.h +1 -1

index 4f5b0e0..926e9c0 100644
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	cpu_reset(0);
+	cpu_reset(0xffff0000);
 }
 #endif /* __ASM_MACH_SYSTEM_H */

Signature · 1 line

1.7.0.4

Eric Miao

2010-08-31 05:48 UTC #2 lore raw

Quoted 10 lines · Mark F. Brown

Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644

arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19

Quoted 5 lines

arch/arm/mach-mmp/include/mach/system.h +1 -1

@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);

Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?

Quoted 6 lines

arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4

Mark F. Brown

author

2010-08-31 06:02 UTC #3 lore raw

Quoted 12 lines · Eric Miao

Quoted 11 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 

Quoted 15 lines

arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 4 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4

Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.

Regards,
-- Mark

Eric Miao

Applied

2010-08-31 06:04 UTC #4 lore raw

Quoted 29 lines · Mark F. Brown

Quoted 12 lines · Eric Miao
Quoted 11 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
Quoted 15 lines
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 4 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4

Quoted 4 lines

Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.

OK, you are expert on this :-)

Applied to 'fix'.

Eric Miao

2010-08-31 06:08 UTC #5 lore raw

Quoted 30 lines · Eric Miao

Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4

Quoted 9 lines

Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.

One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:

ARM: pxa168: fix corrected reset vector

Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows reboot to work

Signed-off-by Mark F. Brown <[email protected]>

(quoted diff) +0 -0

b/arch/arm/mach-mmp/include/mach/system.h
index 4f5b0e0..1a8a25e 100644

arch/arm/mach-mmp/include/mach/system.h +6 -1

@@ -9,6 +9,8 @@
 #ifndef __ASM_MACH_SYSTEM_H
 #define __ASM_MACH_SYSTEM_H
 
+#include <mach/cputype.h>
+
 static inline void arch_idle(void)
 {
 	cpu_do_idle();

@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-	cpu_reset(0);
+	if (cpu_is_pxa168())
+		cpu_reset(0xffff0000);
+	else
+		cpu_reset(0);
 }
 #endif /* __ASM_MACH_SYSTEM_H */

Haojian Zhuang

2010-08-31 06:26 UTC #6 lore raw

Quoted 75 lines · Eric Miao

Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}

Quoted 7 lines

?#endif /* __ASM_MACH_SYSTEM_H */
--
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More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/

The reset code is in below.

	.align	5
ENTRY(cpu_mohawk_reset)
	mov	ip, #0
	mcr	p15, 0, ip, c7, c7, 0		@ invalidate I,D caches
	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
	mrc	p15, 0, ip, c1, c0, 0		@ ctrl register
	bic	ip, ip, #0x0007			@ .............cam
	bic	ip, ip, #0x1100			@ ...i...s........
	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
	mov	pc, r0

MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.

Correct me if I'm wrong.

Thanks
Haojian

Mark F. Brown

author

2010-08-31 06:48 UTC #7 lore raw

Quoted 103 lines · Haojian Zhuang

Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.

Quoted 5 lines

Correct me if I'm wrong.
Thanks
Haojian

Haojian,

I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.

Eric Miao

2010-08-31 06:54 UTC #8 lore raw

Quoted 107 lines · Mark F. Brown

Quoted 105 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Correct me if I'm wrong.

Quoted 7 lines

Quoted 3 lines
Thanks
Haojian
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction.

It does depend on the prefetch unit for that. So the branch instruction should follow right after the mcr one.

Quoted 5 lines

If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.

Haojian Zhuang

2010-08-31 07:02 UTC #9 lore raw

In reply to Mark F. Brown

Quoted 111 lines · Mark F. Brown

Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian

Quoted 8 lines

Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.

In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.

By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.

Eric Miao

2010-08-31 07:08 UTC #10 lore raw

Quoted 121 lines · Haojian Zhuang

Quoted 111 lines · Mark F. Brown
Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian
Quoted 8 lines
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.

Quoted 8 lines

In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.
By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.

Depends on if pxa168 has a reset signal asserted from internal or from external GPIO, which is controllable from the CPU itself. That's what pxa is doing at this moment.

Haojian Zhuang

2010-08-31 07:21 UTC #11 lore raw

Quoted 127 lines · Eric Miao

Quoted 125 lines · Haojian Zhuang
Quoted 111 lines · Mark F. Brown
Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian
Quoted 8 lines
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.
In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.

Quoted 9 lines

Quoted 4 lines
By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.
Depends on if pxa168 has a reset signal asserted from internal or from external GPIO, which is controllable from the CPU itself. That's what pxa is doing at this moment.

Yes, it depends on reset signal. Watchdog timer is built in pxa168. So I think that watchdog reset could be better.

Eric Miao

2010-08-31 07:27 UTC #12 lore raw

Quoted 133 lines · Haojian Zhuang

Quoted 132 lines · Eric Miao
Quoted 129 lines · Haojian Zhuang
Quoted 111 lines · Mark F. Brown
Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian
Quoted 8 lines
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.
In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.
By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.

Quoted 8 lines

Quoted 4 lines
Depends on if pxa168 has a reset signal asserted from internal or from external GPIO, which is controllable from the CPU itself. That's what pxa is doing at this moment.
Yes, it depends on reset signal. Watchdog timer is built in pxa168. So I think that watchdog reset could be better.

Haojian, note we have a reboot mode, so possibly will have to implement all of them if capable.

Mark F. Brown

author

2010-08-31 07:28 UTC #13 lore raw

In reply to Haojian Zhuang

Quoted 133 lines · Haojian Zhuang

Quoted 132 lines · Eric Miao
Quoted 129 lines · Haojian Zhuang
Quoted 111 lines · Mark F. Brown
Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo at vger.kernel.org
More majordomo info at ?http://vger.kernel.org/majordomo-info.html Please read the FAQ at ?http://www.tux.org/lkml/
The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian
Quoted 8 lines
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.
In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.
By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.

Quoted 8 lines

Quoted 4 lines
Depends on if pxa168 has a reset signal asserted from internal or from external GPIO, which is controllable from the CPU itself. That's what pxa is doing at this moment.
Yes, it depends on reset signal. Watchdog timer is built in pxa168. So I think that watchdog reset could be better.

Haojian,

That is true, I am planning to send an update to support watchdog timer reset soon. The problem is I need to test pxa910 and mmp2 as well and determine if the watchdog reset code is consistent. It was simpler for me to just fix this at the moment.

Eric Miao

2010-08-31 07:28 UTC #14 lore raw

Quoted 144 lines · Mark F. Brown

Quoted 133 lines · Haojian Zhuang
Quoted 132 lines · Eric Miao
Quoted 129 lines · Haojian Zhuang
Quoted 111 lines · Mark F. Brown
Quoted 103 lines · Haojian Zhuang
Quoted 75 lines · Eric Miao
Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
Quoted 9 lines
Quoted 4 lines
Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}
Quoted 7 lines
?#endif /* __ASM_MACH_SYSTEM_H */
--
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The reset code is in below.
? ? ? ?.align ?5
ENTRY(cpu_mohawk_reset)
? ? ? ?mov ? ? ip, #0
? ? ? ?mcr ? ? p15, 0, ip, c7, c7, 0 ? ? ? ? ? @ invalidate I,D caches ? ? ? ?mcr ? ? p15, 0, ip, c7, c10, 4 ? ? ? ? ?@ drain WB
? ? ? ?mcr ? ? p15, 0, ip, c8, c7, 0 ? ? ? ? ? @ invalidate I & D TLBs ? ? ? ?mrc ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?bic ? ? ip, ip, #0x0007 ? ? ? ? ? ? ? ? @ .............cam ? ? ? ?bic ? ? ip, ip, #0x1100 ? ? ? ? ? ? ? ? @ ...i...s........ ? ? ? ?mcr ? ? p15, 0, ip, c1, c0, 0 ? ? ? ? ? @ ctrl register ? ? ? ?mov ? ? pc, r0
MMU is disabled at here and replace PC with r0 value. I doubt code executed correctly at here. While MMU is disabled, the PC should be continue in the range of 0xCxxx_xxxx (kernel space). "mov pc, r0" shouldn't be executed. Instruction fetch failure should occurs since there's no physical address in 0xCxxx_xxxx.
Quoted 5 lines
Correct me if I'm wrong.
Thanks
Haojian
Quoted 8 lines
Haojian,
I think there is a pipeline execution of the mov pc, r0 instruction. If I remember correctly you need to do a similar jump when you turn the MMU on in early boot code. If it makes any difference I did test this code on pxa168 before submitting it. I will double check the mmp2 and the pxa910 reset vectors with the Boot ROM developers.
In early boot code, 1:1 (physical:virtual) mapping is used. It means that physical address is same as virtual address. So you can operature mmu as you wish.
By the way, I don't suggest to reset CPU by this way. Reset is not only make code running from the head, it should also clear registers and RTL logic in CPU.
Quoted 8 lines
Quoted 4 lines
Depends on if pxa168 has a reset signal asserted from internal or from external GPIO, which is controllable from the CPU itself. That's what pxa is doing at this moment.
Yes, it depends on reset signal. Watchdog timer is built in pxa168. So I think that watchdog reset could be better.

Quoted 7 lines

Haojian,
That is true, I am planning to send an update to support watchdog timer reset soon. The problem is I need to test pxa910 and mmp2 as well and determine if the watchdog reset code is consistent. It was simpler for me to just fix this at the moment.

This fix can go ahead in my POV.

Mark F. Brown

author

2010-08-31 07:24 UTC #15 lore raw

In reply to Eric Miao

Quoted 75 lines · Eric Miao

Quoted 30 lines · Eric Miao
Quoted 29 lines · Mark F. Brown
Quoted 27 lines · Eric Miao
Quoted 10 lines · Mark F. Brown
Signed-off-by Mark F. Brown <[email protected]>
---
?arch/arm/mach-mmp/include/mach/system.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..926e9c0 100644
arch/arm/mach-mmp/include/mach/system.h static inline void arch_idle(void) · line 19
Quoted 5 lines
arch/arm/mach-mmp/include/mach/system.h +1 -1
@@ -16,6 +16,6 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? cpu_reset(0xffff0000);
Not sure if this correct. But normally reset jump happens after we turn off the MMU and so on. Ain't the BootROM starts from 0 ?
Quoted 6 lines
arch/arm/mach-mmp/include/mach/system.h +0 -0
 ?}
?#endif /* __ASM_MACH_SYSTEM_H */
--
1.7.0.4
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Eric, the boot-rom for pxa168 starts at 0xffff_0000. I am pretty sure about that! If you set the reset vector to 0x0 it will crash during reboot. I will send you xdb snapshots if you need me to.
OK, you are expert on this :-)
Applied to 'fix'.
One moment. Since this is really global to pxa910 and mmp2, so I suggest this being fixed for pxa168 only first. How about this:
? ?ARM: pxa168: fix corrected reset vector
? ?Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows ? ?reboot to work
? ?Signed-off-by: Mark F. Brown <[email protected]>
arch/arm/mach-mmp/include/mach/system.h +0 -0
index 4f5b0e0..1a8a25e 100644
@@ -9,6 +9,8 @@
?#ifndef __ASM_MACH_SYSTEM_H
?#define __ASM_MACH_SYSTEM_H
arch/arm/mach-mmp/include/mach/system.h +2 -0
+#include <mach/cputype.h>
+
?static inline void arch_idle(void)
?{
? ? ? ?cpu_do_idle();
arch/arm/mach-mmp/include/mach/system.h +4 -1
@@ -16,6 +18,9 @@ static inline void arch_idle(void)
 
 ?static inline void arch_reset(char mode, const char *cmd)
 ?{
- ? ? ? cpu_reset(0);
+ ? ? ? if (cpu_is_pxa168())
+ ? ? ? ? ? ? ? cpu_reset(0xffff0000);
+ ? ? ? else
+ ? ? ? ? ? ? ? cpu_reset(0);
 ?}

Quoted 2 lines

?#endif /* __ASM_MACH_SYSTEM_H */

That will work!

-- Mark