OMAP: MCBSP: hwmod database for 2xxx devices

From: Benoit Cousson<[email protected]>

MCBSP hwmod data values are auto-generated. The order of omap44xx_mcbsp3_slaves contents are changed since the driver uses the base address of omap44xx_l4_abe__mcbsp3_dma.

Signed-off-by Kishon Vijay Abraham I<[email protected]>

Signed-off-by Charulatha V<[email protected]>

Signed-off-by Shubhrajyoti D<[email protected]>

Cc Partha Basak<[email protected]>

---
  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  293 ++++++++++++++++++++++++++++
  1 files changed, 293 insertions(+), 0 deletions(-)

arch/arm/mach-omap2/omap_hwmod_44xx_data.c +293 -0

index 7274db4..1467840 100644
@@ -811,6 +811,294 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
  };
 
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
+	.sysc_offs	= 0x008c,
+	.sysc_flags	= (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
+			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	=&omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
+	.name = "mcbsp",
+	.sysc =&omap44xx_mcbsp_sysc,
+};
+
+/* mcbsp1 */
+static struct omap_hwmod omap44xx_mcbsp1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
+	{ .name = "tx", .irq = 17 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
+	{
+		.pa_start	= 0x40122000,
+		.pa_end		= 0x401220ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp1_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp1_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {
+	{
+		.pa_start	= 0x49022000,
+		.pa_end		= 0x490220ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp1 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp1_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp1_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
+	&omap44xx_l4_abe__mcbsp1_dma,
+	&omap44xx_l4_abe__mcbsp1,
+};
+
+static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
+	.name		= "mcbsp1",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp1_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_irqs),
+	.sdma_reqs	= omap44xx_mcbsp1_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
+	.main_clk	= "mcbsp1_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp1_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod omap44xx_mcbsp2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
+	{ .name = "tx", .irq = 22 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
+	{
+		.pa_start	= 0x40124000,
+		.pa_end		= 0x401240ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp2_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp2_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {
+	{
+		.pa_start	= 0x49024000,
+		.pa_end		= 0x490240ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp2 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp2_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp2_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
+	&omap44xx_l4_abe__mcbsp2_dma,
+	&omap44xx_l4_abe__mcbsp2,
+};
+
+static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
+	.name		= "mcbsp2",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp2_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_irqs),
+	.sdma_reqs	= omap44xx_mcbsp2_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
+	.main_clk	= "mcbsp2_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp2_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp3 */
+static struct omap_hwmod omap44xx_mcbsp3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
+	{ .name = "tx", .irq = 23 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
+	{
+		.pa_start	= 0x40126000,
+		.pa_end		= 0x401260ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp3_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp3_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {
+	{
+		.pa_start	= 0x49026000,
+		.pa_end		= 0x490260ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->  mcbsp3 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp3_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp3_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
+	&omap44xx_l4_abe__mcbsp3_dma,
+	&omap44xx_l4_abe__mcbsp3,
+};
+
+static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
+	.name		= "mcbsp3",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp3_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_irqs),
+	.sdma_reqs	= omap44xx_mcbsp3_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
+	.main_clk	= "mcbsp3_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp3_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp4 */
+static struct omap_hwmod omap44xx_mcbsp4_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
+	{ .name = "tx", .irq = 16 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
+	{
+		.pa_start	= 0x48096000,
+		.pa_end		= 0x480960ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_per ->  mcbsp4 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
+	.master		=&omap44xx_l4_per_hwmod,
+	.slave		=&omap44xx_mcbsp4_hwmod,
+	.clk		= "l4_div_ck",
+	.addr		= omap44xx_mcbsp4_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mcbsp4 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
+	&omap44xx_l4_per__mcbsp4,
+};
+
+static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
+	.name		= "mcbsp4",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp4_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_irqs),
+	.sdma_reqs	= omap44xx_mcbsp4_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
+	.main_clk	= "mcbsp4_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp4_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+
  static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
  	/* dmm class */
  	&omap44xx_dmm_hwmod,

@@ -840,6 +1128,11 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
  	&omap44xx_uart2_hwmod,
  	&omap44xx_uart3_hwmod,
  	&omap44xx_uart4_hwmod,
+	/* mcbsp class */
+	&omap44xx_mcbsp1_hwmod,
+	&omap44xx_mcbsp2_hwmod,
+	&omap44xx_mcbsp3_hwmod,
+	&omap44xx_mcbsp4_hwmod,
  	NULL,
  };
 

Hi Kishon,

Quoted 5 lines · KISHON VIJAY

From: Benoit Cousson<[email protected]>

MCBSP hwmod data values are auto-generated. The order of omap44xx_mcbsp3_slaves contents are changed since the driver uses the base address of omap44xx_l4_abe__mcbsp3_dma.

You should not do that... in theory.
In your case I do understand why, but we should find a better way to handle that. Ideally you should not rely on the order to get the proper resource. For some reason the memory areas are not named today, but this can be fixed if needed.

The other concern or question is don't we have to use direct access whenever possible? The second mapping is only needed for the SDMA access, not for the registers accesses.

So in your case, you will have to use two base address, for previous OMAPs, both will be the same, but in the case of OMAP4, you will use the direct one for all the register settings and the DMA one for DMA access.

Benoit

Quoted 320 lines

Signed-off-by Kishon Vijay Abraham I<[email protected]>

Signed-off-by Charulatha V<[email protected]>

Signed-off-by Shubhrajyoti D<[email protected]>

Cc Partha Basak<[email protected]>

---
   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  293 ++++++++++++++++++++++++++++
   1 files changed, 293 insertions(+), 0 deletions(-)

arch/arm/mach-omap2/omap_hwmod_44xx_data.c +293 -0

index 7274db4..1467840 100644
@@ -811,6 +811,294 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
   	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
   };
 
+/*
+ * 'mcbsp' class
+ * multi channel buffered serial port controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
+	.sysc_offs	= 0x008c,
+	.sysc_flags	= (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
+			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	=&omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
+	.name = "mcbsp",
+	.sysc =&omap44xx_mcbsp_sysc,
+};
+
+/* mcbsp1 */
+static struct omap_hwmod omap44xx_mcbsp1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
+	{ .name = "tx", .irq = 17 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
+	{
+		.pa_start	= 0x40122000,
+		.pa_end		= 0x401220ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp1_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp1_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {
+	{
+		.pa_start	= 0x49022000,
+		.pa_end		= 0x490220ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp1 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp1_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp1_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
+	&omap44xx_l4_abe__mcbsp1_dma,
+	&omap44xx_l4_abe__mcbsp1,
+};
+
+static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
+	.name		= "mcbsp1",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp1_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_irqs),
+	.sdma_reqs	= omap44xx_mcbsp1_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
+	.main_clk	= "mcbsp1_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp1_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp2 */
+static struct omap_hwmod omap44xx_mcbsp2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
+	{ .name = "tx", .irq = 22 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
+	{
+		.pa_start	= 0x40124000,
+		.pa_end		= 0x401240ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp2_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp2_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {
+	{
+		.pa_start	= 0x49024000,
+		.pa_end		= 0x490240ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp2 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp2_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp2_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
+	&omap44xx_l4_abe__mcbsp2_dma,
+	&omap44xx_l4_abe__mcbsp2,
+};
+
+static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
+	.name		= "mcbsp2",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp2_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_irqs),
+	.sdma_reqs	= omap44xx_mcbsp2_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
+	.main_clk	= "mcbsp2_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp2_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp3 */
+static struct omap_hwmod omap44xx_mcbsp3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
+	{ .name = "tx", .irq = 23 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
+	{
+		.pa_start	= 0x40126000,
+		.pa_end		= 0x401260ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp3_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp3_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_addrs),
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {
+	{
+		.pa_start	= 0x49026000,
+		.pa_end		= 0x490260ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_abe ->   mcbsp3 (dma) */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
+	.master		=&omap44xx_l4_abe_hwmod,
+	.slave		=&omap44xx_mcbsp3_hwmod,
+	.clk		= "ocp_abe_iclk",
+	.addr		= omap44xx_mcbsp3_dma_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs),
+	.user		= OCP_USER_SDMA,
+};
+
+/* mcbsp3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
+	&omap44xx_l4_abe__mcbsp3_dma,
+	&omap44xx_l4_abe__mcbsp3,
+};
+
+static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
+	.name		= "mcbsp3",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp3_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_irqs),
+	.sdma_reqs	= omap44xx_mcbsp3_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
+	.main_clk	= "mcbsp3_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp3_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* mcbsp4 */
+static struct omap_hwmod omap44xx_mcbsp4_hwmod;
+static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
+	{ .name = "tx", .irq = 16 + OMAP44XX_IRQ_GIC_START },
+	{ .name = "rx", .irq = 0 },
+};
+
+static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
+	{ .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
+	{ .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
+	{
+		.pa_start	= 0x48096000,
+		.pa_end		= 0x480960ff,
+		.flags		= ADDR_TYPE_RT
+	},
+};
+
+/* l4_per ->   mcbsp4 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
+	.master		=&omap44xx_l4_per_hwmod,
+	.slave		=&omap44xx_mcbsp4_hwmod,
+	.clk		= "l4_div_ck",
+	.addr		= omap44xx_mcbsp4_addrs,
+	.addr_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_addrs),
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mcbsp4 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
+	&omap44xx_l4_per__mcbsp4,
+};
+
+static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
+	.name		= "mcbsp4",
+	.class		=&omap44xx_mcbsp_hwmod_class,
+	.mpu_irqs	= omap44xx_mcbsp4_irqs,
+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_irqs),
+	.sdma_reqs	= omap44xx_mcbsp4_sdma_reqs,
+	.sdma_reqs_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
+	.main_clk	= "mcbsp4_fck",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
+		},
+	},
+	.slaves		= omap44xx_mcbsp4_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_slaves),
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+
   static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
   	/* dmm class */
   	&omap44xx_dmm_hwmod,

@@ -840,6 +1128,11 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
   	&omap44xx_uart2_hwmod,
   	&omap44xx_uart3_hwmod,
   	&omap44xx_uart4_hwmod,
+	/* mcbsp class */
+	&omap44xx_mcbsp1_hwmod,
+	&omap44xx_mcbsp2_hwmod,
+	&omap44xx_mcbsp3_hwmod,
+	&omap44xx_mcbsp4_hwmod,
   	NULL,
   };
 

Signed-off-by Kishon Vijay Abraham I <[email protected]>

Signed-off-by Charulatha V <[email protected]>

Signed-off-by Shubhrajyoti D <[email protected]>

Cc Partha Basak <[email protected]>

---
 arch/arm/mach-omap2/mcbsp.c             |  251
+++++++++---------------------- arch/arm/plat-omap/include/plat/mcbsp.h | 
  6 +-
 arch/arm/plat-omap/mcbsp.c              |  189 +++++++++++-------------
 3 files changed, 159 insertions(+), 287 deletions(-)

-----Original Message-----
From: Peter Ujfalusi [mailto:[email protected]]
Sent: Wednesday, October 06, 2010 11:32 AM
To: ABRAHAM, KISHON VIJAY
Cc: [email protected]; Kamat, Nishant; Varadarajan, Charulatha; Datta, Shubhrajyoti; Basak, Partha
Subject: Re: [PATCH 4/7] [RFC] OMAP: hwmod implementation for MCBSP

Quoted 7 lines · On Tuesday 05 October 2010 19:37:39 ext Kishon Vijay Abraham I wrote:

Signed-off-by Kishon Vijay Abraham I <[email protected]>

Signed-off-by Charulatha V <[email protected]>

Signed-off-by Shubhrajyoti D <[email protected]>

Cc Partha Basak <[email protected]>

---
 arch/arm/mach-omap2/mcbsp.c             |  251

+++++++++----------------------

arch/arm/plat-omap/include/plat/mcbsp.h |

Quoted 2 lines

6 +-

 arch/arm/plat-omap/mcbsp.c              |  189 

+++++++++++-------------

Quoted 1 line

 3 files changed, 159 insertions(+), 287 deletions(-)

So the plan is to kill OMAP1 support in McBSP (audio)? We do have OMAP1 users, so IMHO dropping OMAP1 is not acceptable.

Signature · 3 lines

-- 
Péter
--

This patch series would not break OMAP1 as they do not touch the omap_mcbsp_register_board_cfg() in mach-omap1.

Usage of hwmod is applicable only for OMAP2plus cpus and it modifies the way in which the platform device is built & registered. It makes use of centralised database to fetch the addresses, irq, dma info etc., for OMAP2plus. OMAP1 cpus will still continue to have the old way of doing platform device registeration.

pm_runtime APIs are already inplace to take care of enabling clocks in case of OMAP1.

Hope this clarifies.

-----Original Message-----
From: Peter Ujfalusi [mailto:[email protected]]
Sent: Wednesday, October 06, 2010 12:28 PM
To: Varadarajan, Charulatha
Cc: ABRAHAM, KISHON VIJAY; [email protected]; Kamat, Nishant; Datta, Shubhrajyoti; Basak, Partha
Subject: Re: [PATCH 4/7] [RFC] OMAP: hwmod implementation for MCBSP

Quoted 2 lines · Charulatha

This patch series would not break OMAP1 as they do not touch the omap_mcbsp_register_board_cfg() in mach-omap1.

But the plat-omap/mcbsp will not going to be able to prope on OMAP1, or did I
missed something?

Snip:

arch/arm/plat-omap/mcbsp.c +31 -6

@@ -1775,25 +1685,50 @@ static int __devinit omap_mcbsp_probe(struct 
 platform_device *pdev)
        mcbsp->dma_tx_lch = -1;
        mcbsp->dma_rx_lch = -1;
 
-       mcbsp->phys_base = pdata->phys_base;
-       mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid 
 memory resource\n",
+                                       __func__, pdev->id);
+               ret = -ENOMEM;
+               goto exit;
+       }
+       mcbsp->phys_base = res->start;
+       mcbsp->io_base = ioremap(res->start, resource_size(res));
        if (!mcbsp->io_base) {
                ret = -ENOMEM;
                goto err_ioremap;
        }
 
+       omap_mcbsp_cache_size = resource_size(res);
+
        /* Default I/O is IRQ based */
        mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-       mcbsp->tx_irq = pdata->tx_irq;
-       mcbsp->rx_irq = pdata->rx_irq;
-       mcbsp->dma_rx_sync = pdata->dma_rx_sync;
-       mcbsp->dma_tx_sync = pdata->dma_tx_sync;
+       mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+       mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+       res = platform_get_resource_byname(pdev, 
 IORESOURCE_DMA, "rx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid 
 DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_rx_sync = res->start;
+
+       res = platform_get_resource_byname(pdev, 
 IORESOURCE_DMA, "tx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid 
 DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_tx_sync = res->start;
 

I don't think that on OMAP1 the platform_get_resource_byname function will find
the needed resources...

Quoted 5 lines

Usage of hwmod is applicable only for OMAP2plus cpus and it modifies the way in which the platform device is built & registered. It makes use of centralised database to fetch the addresses, irq,

dma info etc.,

Quoted 4 lines

for OMAP2plus. OMAP1 cpus will still continue to have the old way of doing platform device registeration.

pm_runtime APIs are already inplace to take care of

enabling clocks in

Quoted 3 lines

case of OMAP1.

Hope this clarifies.

Signature · 2 lines

Péter
--

Signed-off-by Kishon Vijay Abraham I<[email protected]>

Signed-off-by Charulatha V<[email protected]>

Signed-off-by Shubhrajyoti D<[email protected]>

Cc Partha Basak<[email protected]>

---
  arch/arm/mach-omap2/mcbsp.c             |  251 +++++++++----------------------
  arch/arm/plat-omap/include/plat/mcbsp.h |    6 +-
  arch/arm/plat-omap/mcbsp.c              |  189 +++++++++++-------------
  3 files changed, 159 insertions(+), 287 deletions(-)

arch/arm/mach-omap2/mcbsp.c +36 -153

index eba9fa1..25c6703 100644
@@ -22,9 +22,13 @@
  #include<plat/dma.h>
  #include<plat/cpu.h>
  #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
  #include "control.h"
 
+static struct omap_hwmod *oh_st_device[] = {NULL, NULL};
+static int no_of_st;
 
  /* McBSP internal signal muxing functions */
 

@@ -101,199 +105,90 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
  }
  EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
 
-
-/* Platform data */
-
-#ifdef CONFIG_ARCH_OMAP2420
-static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
+struct omap_device_pm_latency omap2_mcbsp_latency[] = {
         {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
+               .deactivate_func = omap_device_idle_hwmods,
+               .activate_func   = omap_device_enable_hwmods,
+               .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
         },
  };
-#define OMAP2420_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2420_mcbsp_pdata)
-#define OMAP2420_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2420_mcbsp_pdata           NULL
-#define OMAP2420_MCBSP_PDATA_SZ                0
-#define OMAP2420_MCBSP_REG_NUM         0
-#endif
 
-#ifdef CONFIG_ARCH_OMAP2430
-static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-       },
-};
-#define OMAP2430_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2430_mcbsp_pdata)
-#define OMAP2430_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2430_mcbsp_pdata           NULL
-#define OMAP2430_MCBSP_PDATA_SZ                0
-#define OMAP2430_MCBSP_REG_NUM         0
-#endif
+static int omap_init_mcbsp(struct omap_hwmod *oh, void *user)
+{
+       int id, count = 1, i;
+       char *name = "omap-mcbsp";
+       char dev_name[16];
+       struct omap_hwmod *oh_device[2];
+       struct omap_mcbsp_platform_data *pdata;
+       struct omap_device *od;
+
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
+       }
 
-#ifdef CONFIG_ARCH_OMAP3
-static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP34XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP2_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP2_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .buffer_size    = 0x500, /* The FIFO has 1024 + 256 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP3_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP3_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-};
-#define OMAP34XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap34xx_mcbsp_pdata)
-#define OMAP34XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap34xx_mcbsp_pdata           NULL
-#define OMAP34XX_MCBSP_PDATA_SZ                0
-#define OMAP34XX_MCBSP_REG_NUM         0
-#endif
+       pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
+       if (!pdata) {
+               pr_err("%s: No memory for mcbsp\n", __func__);
+               return -ENOMEM;
+       }
 
-static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP44XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP1_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP1,
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP2_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP2,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP3_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP3,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP4_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP4,
-               /* XXX .ops ? */
-       },
-};
-#define OMAP44XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap44xx_mcbsp_pdata)
-#define OMAP44XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+       if (cpu_is_omap34xx()) {
+               pdata->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
+               if (id == 2)
+                       pdata->buffer_size = 0x500;
+               else
+                       pdata->buffer_size = 0x80;
+       } else {
+               pdata->dma_op_mode = -EINVAL;
+               pdata->buffer_size = 0;
+       }
 
-static int __init omap2_mcbsp_init(void)

arch/arm/mach-omap2/mcbsp.c +27 -25

+
+       od = omap_device_build_ss(name, id, oh_device, count, pdata,
+                               sizeof(*pdata), omap2_mcbsp_latency,
+                               ARRAY_SIZE(omap2_mcbsp_latency), false);
+       if (IS_ERR(od))  {
+               pr_err("%s: Cant build omap_device for %s:%s.\n", __func__,
+                                       name, oh->name);
+               kfree(pdata);
+               return PTR_ERR(od);
+       }
+       omap_mcbsp_count++;
+       return 0;
+}
+
+static int omap_mcbsp_st(struct omap_hwmod *oh, void *user)
  {
-       if (cpu_is_omap2420()) {
-               omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16);
-       } else if (cpu_is_omap2430()) {
-               omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap34xx()) {
-               omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap44xx()) {
-               omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32);
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
         }
+       oh_st_device[no_of_st++] = oh;
+       return 0;
+}
+
+static int __init omap2_mcbsp_init(void)
+{
+       omap_hwmod_for_each_by_class("mcbsp_sidetone", omap_mcbsp_st,
+                                       NULL);
+       omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 
         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
                                                                 GFP_KERNEL);
         if (!mcbsp_ptr)
                 return -ENOMEM;
 
-       if (cpu_is_omap2420())
-               omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
-                                               OMAP2420_MCBSP_PDATA_SZ);
-       if (cpu_is_omap2430())
-               omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
-                                               OMAP2430_MCBSP_PDATA_SZ);
-       if (cpu_is_omap34xx())
-               omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
-                                               OMAP34XX_MCBSP_PDATA_SZ);
-       if (cpu_is_omap44xx())
-               omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
-                                               OMAP44XX_MCBSP_PDATA_SZ);
-
         return omap_mcbsp_init();
  }
  arch_initcall(omap2_mcbsp_init);

arch/arm/plat-omap/include/plat/mcbsp.h +1 -5

index 4da6f94..1ff283c 100644
@@ -418,11 +418,9 @@ struct omap_mcbsp_platform_data {
         u8 dma_rx_sync, dma_tx_sync;
         u16 rx_irq, tx_irq;
         struct omap_mcbsp_ops *ops;
-#ifdef CONFIG_ARCH_OMAP3
-       /* Sidetone block for McBSP 2 and 3 */
         unsigned long phys_base_st;
         u16 buffer_size;
-#endif
+       int dma_op_mode;
  };
 
  struct omap_mcbsp_st_data {

@@ -466,12 +464,10 @@ struct omap_mcbsp {
         struct omap_mcbsp_platform_data *pdata;
         struct clk *iclk;
         struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
         struct omap_mcbsp_st_data *st_data;
         int dma_op_mode;
         u16 max_tx_thres;
         u16 max_rx_thres;
-#endif
         void *reg_cache;
  };
  extern struct omap_mcbsp **mcbsp_ptr;

arch/arm/plat-omap/mcbsp.c +85 -105

index eac4b97..c7c6a83 100644
@@ -27,6 +27,8 @@
 
  #include<plat/dma.h>
  #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
  #include "../mach-omap2/cm-regbits-34xx.h"
 

@@ -1466,7 +1468,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id,
  }
  EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 
-#ifdef CONFIG_ARCH_OMAP3
  #define max_thres(m)                   (mcbsp->pdata->buffer_size)
  #define valid_threshold(m, val)                ((val)<= max_thres(m))
  #define THRESHOLD_PROP_BUILDER(prop)                                   \

@@ -1645,98 +1646,6 @@ static const struct attribute_group sidetone_attr_group = {
         .attrs = (struct attribute **)sidetone_attrs,
  };
 
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
-       struct omap_mcbsp_st_data *st_data;
-       int err;
-
-       st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
-       if (!st_data) {
-               err = -ENOMEM;
-               goto err1;
-       }
-
-       st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K);
-       if (!st_data->io_base_st) {
-               err = -ENOMEM;
-               goto err2;
-       }
-
-       err = sysfs_create_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-       if (err)
-               goto err3;
-
-       mcbsp->st_data = st_data;
-       return 0;
-
-err3:
-       iounmap(st_data->io_base_st);
-err2:
-       kfree(st_data);
-err1:
-       return err;
-
-}
-
-static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
-
-       if (st_data) {
-               sysfs_remove_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-               iounmap(st_data->io_base_st);
-               kfree(st_data);
-       }
-}
-
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
-{
-       mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
-       if (cpu_is_omap34xx()) {
-               /*
-                * Initially configure the maximum thresholds to a safe value.
-                * The McBSP FIFO usage with these values should not go under
-                * 16 locations.
-                * If the whole FIFO without safety buffer is used, than there
-                * is a possibility that the DMA will be not able to push the
-                * new data on time, causing channel shifts in runtime.
-                */
-               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
-               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
-               /*
-                * REVISIT: Set dmap_op_mode to THRESHOLD as default
-                * for mcbsp2 instances.
-                */
-               if (omap_additional_add(mcbsp->dev))
-                       dev_warn(mcbsp->dev,
-                               "Unable to create additional controls\n");
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       if (omap_st_add(mcbsp))
-                               dev_warn(mcbsp->dev,
-                                "Unable to create sidetone controls\n");
-
-       } else {
-               mcbsp->max_tx_thres = -EINVAL;
-               mcbsp->max_rx_thres = -EINVAL;
-       }
-}
-
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
-{
-       if (cpu_is_omap34xx()) {
-               omap_additional_remove(mcbsp->dev);
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       omap_st_remove(mcbsp);
-       }
-}
-#else
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
-#endif /* CONFIG_ARCH_OMAP3 */
-
  /*
   * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
   * 730 has only 2 McBSP, and both of them are MPU peripherals.

@@ -1746,6 +1655,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
         struct omap_mcbsp *mcbsp;
         int id = pdev->id - 1;
+       struct resource *res;
         int ret = 0;
 
         if (!pdata) {

@@ -1775,25 +1685,50 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         mcbsp->dma_tx_lch = -1;
         mcbsp->dma_rx_lch = -1;
 
-       mcbsp->phys_base = pdata->phys_base;
-       mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n",
+                                       __func__, pdev->id);
+               ret = -ENOMEM;
+               goto exit;
+       }
+       mcbsp->phys_base = res->start;
+       mcbsp->io_base = ioremap(res->start, resource_size(res));
         if (!mcbsp->io_base) {
                 ret = -ENOMEM;
                 goto err_ioremap;
         }
 
+       omap_mcbsp_cache_size = resource_size(res);
+
         /* Default I/O is IRQ based */
         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-       mcbsp->tx_irq = pdata->tx_irq;
-       mcbsp->rx_irq = pdata->rx_irq;
-       mcbsp->dma_rx_sync = pdata->dma_rx_sync;
-       mcbsp->dma_tx_sync = pdata->dma_tx_sync;
+       mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+       mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_rx_sync = res->start;
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_tx_sync = res->start;
 
         mcbsp->iclk = clk_get(&pdev->dev, "ick");
         if (IS_ERR(mcbsp->iclk)) {
                 ret = PTR_ERR(mcbsp->iclk);
                 dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
-               goto err_iclk;
+               goto err_res;
         }
 
         mcbsp->fclk = clk_get(&pdev->dev, "fck");

@@ -1808,14 +1743,53 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         mcbsp_ptr[id] = mcbsp;
         platform_set_drvdata(pdev, mcbsp);
 
-       /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
-       omap34xx_device_init(mcbsp);
+       omap_additional_add(mcbsp->dev);
+       if (pdata->dma_op_mode != -EINVAL) {
+               /*
+                * Initially configure the maximum thresholds to a safe value.
+                * The McBSP FIFO usage with these values should not go under
+                * 16 locations.
+                * If the whole FIFO without safety buffer is used, than there
+                * is a possibility that the DMA will be not able to push the
+                * new data on time, causing channel shifts in runtime.
+                */
+               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10 ;
+               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10 ;
+       }
+
+       if (cpu_is_omap34xx()) {
+               res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+               if (res) {
+                       mcbsp->st_data = kzalloc(sizeof(*mcbsp->st_data),
+                                               GFP_KERNEL);
+                       if (!mcbsp->st_data) {
+                               ret = -ENOMEM;
+                               goto err_st_data;
+                       }
+                       mcbsp->st_data->io_base_st = ioremap(res->start,
+                                               resource_size(res));
+                       if (!mcbsp->st_data->io_base_st) {
+                               ret = -ENOMEM;
+                               goto err_io_st;
+                       }
+                       ret = sysfs_create_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       if (ret)
+                               goto err_sysfs;
+               }
+       }
 
         return 0;
 
+err_sysfs:
+       iounmap(mcbsp->st_data->io_base_st);
+err_io_st:
+       kfree(mcbsp->st_data);
+err_st_data:
+       clk_put(mcbsp->fclk);
  err_fclk:
         clk_put(mcbsp->iclk);
-err_iclk:
+err_res:
         iounmap(mcbsp->io_base);
  err_ioremap:
         kfree(mcbsp);

@@ -1834,7 +1808,14 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
                                 mcbsp->pdata->ops->free)
                         mcbsp->pdata->ops->free(mcbsp->id);
 
-               omap34xx_device_exit(mcbsp);
+               omap_additional_remove(mcbsp->dev);
+
+               if (mcbsp->st_data) {
+                       sysfs_remove_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       iounmap(mcbsp->st_data->io_base_st);
+                       kfree(mcbsp->st_data);
+               }
 
                 clk_disable(mcbsp->fclk);
                 clk_disable(mcbsp->iclk);
--

1.7.0.4

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Quoted 223 lines · Kishon Vijay Abraham I

Signed-off-by Kishon Vijay Abraham I<[email protected]>

Signed-off-by Charulatha V<[email protected]>

Signed-off-by Shubhrajyoti D<[email protected]>

Cc Partha Basak<[email protected]>

---
   arch/arm/mach-omap2/mcbsp.c             |  251 +++++++++----------------------
   arch/arm/plat-omap/include/plat/mcbsp.h |    6 +-
   arch/arm/plat-omap/mcbsp.c              |  189 +++++++++++-------------
   3 files changed, 159 insertions(+), 287 deletions(-)

arch/arm/mach-omap2/mcbsp.c +36 -152

index eba9fa1..25c6703 100644
@@ -22,9 +22,13 @@
   #include<plat/dma.h>
   #include<plat/cpu.h>
   #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
   #include "control.h"
 
+static struct omap_hwmod *oh_st_device[] = {NULL, NULL};
+static int no_of_st;
 
   /* McBSP internal signal muxing functions */
 

@@ -101,199 +105,90 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
   }
   EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
 
-
-/* Platform data */
-
-#ifdef CONFIG_ARCH_OMAP2420
-static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
+struct omap_device_pm_latency omap2_mcbsp_latency[] = {
          {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
+               .deactivate_func = omap_device_idle_hwmods,
+               .activate_func   = omap_device_enable_hwmods,
+               .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
          },
   };
-#define OMAP2420_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2420_mcbsp_pdata)
-#define OMAP2420_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2420_mcbsp_pdata           NULL
-#define OMAP2420_MCBSP_PDATA_SZ                0
-#define OMAP2420_MCBSP_REG_NUM         0
-#endif
 
-#ifdef CONFIG_ARCH_OMAP2430
-static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-       },
-};
-#define OMAP2430_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2430_mcbsp_pdata)
-#define OMAP2430_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2430_mcbsp_pdata           NULL
-#define OMAP2430_MCBSP_PDATA_SZ                0
-#define OMAP2430_MCBSP_REG_NUM         0
-#endif
+static int omap_init_mcbsp(struct omap_hwmod *oh, void *user)
+{
+       int id, count = 1, i;
+       char *name = "omap-mcbsp";
+       char dev_name[16];
+       struct omap_hwmod *oh_device[2];
+       struct omap_mcbsp_platform_data *pdata;
+       struct omap_device *od;
+
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
+       }
 
-#ifdef CONFIG_ARCH_OMAP3
-static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP34XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP2_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP2_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .buffer_size    = 0x500, /* The FIFO has 1024 + 256 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP3_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP3_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-};
-#define OMAP34XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap34xx_mcbsp_pdata)
-#define OMAP34XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap34xx_mcbsp_pdata           NULL
-#define OMAP34XX_MCBSP_PDATA_SZ                0
-#define OMAP34XX_MCBSP_REG_NUM         0
-#endif
+       pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
+       if (!pdata) {
+               pr_err("%s: No memory for mcbsp\n", __func__);
+               return -ENOMEM;
+       }
 
-static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP44XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP1_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP1,
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP2_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP2,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP3_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP3,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP4_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP4,
-               /* XXX .ops ? */
-       },
-};
-#define OMAP44XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap44xx_mcbsp_pdata)
-#define OMAP44XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+       if (cpu_is_omap34xx()) {
+               pdata->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
+               if (id == 2)
+                       pdata->buffer_size = 0x500;
+               else
+                       pdata->buffer_size = 0x80;
+       } else {
+               pdata->dma_op_mode = -EINVAL;
+               pdata->buffer_size = 0;
+       }
 

arch/arm/mach-omap2/mcbsp.c int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) · line 156

Quoted 11 lines

arch/arm/mach-omap2/mcbsp.c +10 -1

-static int __init omap2_mcbsp_init(void)
+       sscanf(oh->name, "mcbsp%d",&id);
+       sprintf(dev_name, "mcbsp%d_sidetone", id);
+       oh_device[0] = oh;
+
+       for (i = 0; i<   no_of_st ; i++) {
+               if (!strcmp(dev_name, oh_st_device[i]->name)) {
+                       oh_device[1] = oh_st_device[i];
+                       count++;
+               }
+       }

Pfuu, it took me a while to follow how all that stuff was working :-)

Since the sidetone block is tightly coupled to the mcbsp, you should simply add this information directly as a attribute of the mcbsp2& 3 hwmod dev_attr.

You will then easily detect which one does have a sidetone connected to it and avoid all this code.

Regards,
Benoit

Quoted 359 lines

arch/arm/mach-omap2/mcbsp.c +27 -25

+
+       od = omap_device_build_ss(name, id, oh_device, count, pdata,
+                               sizeof(*pdata), omap2_mcbsp_latency,
+                               ARRAY_SIZE(omap2_mcbsp_latency), false);
+       if (IS_ERR(od))  {
+               pr_err("%s: Cant build omap_device for %s:%s.\n", __func__,
+                                       name, oh->name);
+               kfree(pdata);
+               return PTR_ERR(od);
+       }
+       omap_mcbsp_count++;
+       return 0;
+}
+
+static int omap_mcbsp_st(struct omap_hwmod *oh, void *user)
   {
-       if (cpu_is_omap2420()) {
-               omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16);
-       } else if (cpu_is_omap2430()) {
-               omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap34xx()) {
-               omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap44xx()) {
-               omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32);
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
          }
+       oh_st_device[no_of_st++] = oh;
+       return 0;
+}
+
+static int __init omap2_mcbsp_init(void)
+{
+       omap_hwmod_for_each_by_class("mcbsp_sidetone", omap_mcbsp_st,
+                                       NULL);
+       omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 
          mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
                                                                  GFP_KERNEL);
          if (!mcbsp_ptr)
                  return -ENOMEM;
 
-       if (cpu_is_omap2420())
-               omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
-                                               OMAP2420_MCBSP_PDATA_SZ);
-       if (cpu_is_omap2430())
-               omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
-                                               OMAP2430_MCBSP_PDATA_SZ);
-       if (cpu_is_omap34xx())
-               omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
-                                               OMAP34XX_MCBSP_PDATA_SZ);
-       if (cpu_is_omap44xx())
-               omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
-                                               OMAP44XX_MCBSP_PDATA_SZ);
-
          return omap_mcbsp_init();
   }
   arch_initcall(omap2_mcbsp_init);

arch/arm/plat-omap/include/plat/mcbsp.h +1 -5

index 4da6f94..1ff283c 100644
@@ -418,11 +418,9 @@ struct omap_mcbsp_platform_data {
          u8 dma_rx_sync, dma_tx_sync;
          u16 rx_irq, tx_irq;
          struct omap_mcbsp_ops *ops;
-#ifdef CONFIG_ARCH_OMAP3
-       /* Sidetone block for McBSP 2 and 3 */
          unsigned long phys_base_st;
          u16 buffer_size;
-#endif
+       int dma_op_mode;
   };
 
   struct omap_mcbsp_st_data {

@@ -466,12 +464,10 @@ struct omap_mcbsp {
          struct omap_mcbsp_platform_data *pdata;
          struct clk *iclk;
          struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
          struct omap_mcbsp_st_data *st_data;
          int dma_op_mode;
          u16 max_tx_thres;
          u16 max_rx_thres;
-#endif
          void *reg_cache;
   };
   extern struct omap_mcbsp **mcbsp_ptr;

arch/arm/plat-omap/mcbsp.c +85 -105

index eac4b97..c7c6a83 100644
@@ -27,6 +27,8 @@
 
   #include<plat/dma.h>
   #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
   #include "../mach-omap2/cm-regbits-34xx.h"
 

@@ -1466,7 +1468,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id,
   }
   EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 
-#ifdef CONFIG_ARCH_OMAP3
   #define max_thres(m)                   (mcbsp->pdata->buffer_size)
   #define valid_threshold(m, val)                ((val)<= max_thres(m))
   #define THRESHOLD_PROP_BUILDER(prop)                                   \

@@ -1645,98 +1646,6 @@ static const struct attribute_group sidetone_attr_group = {
          .attrs = (struct attribute **)sidetone_attrs,
   };
 
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
-       struct omap_mcbsp_st_data *st_data;
-       int err;
-
-       st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
-       if (!st_data) {
-               err = -ENOMEM;
-               goto err1;
-       }
-
-       st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K);
-       if (!st_data->io_base_st) {
-               err = -ENOMEM;
-               goto err2;
-       }
-
-       err = sysfs_create_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-       if (err)
-               goto err3;
-
-       mcbsp->st_data = st_data;
-       return 0;
-
-err3:
-       iounmap(st_data->io_base_st);
-err2:
-       kfree(st_data);
-err1:
-       return err;
-
-}
-
-static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
-
-       if (st_data) {
-               sysfs_remove_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-               iounmap(st_data->io_base_st);
-               kfree(st_data);
-       }
-}
-
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
-{
-       mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
-       if (cpu_is_omap34xx()) {
-               /*
-                * Initially configure the maximum thresholds to a safe value.
-                * The McBSP FIFO usage with these values should not go under
-                * 16 locations.
-                * If the whole FIFO without safety buffer is used, than there
-                * is a possibility that the DMA will be not able to push the
-                * new data on time, causing channel shifts in runtime.
-                */
-               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
-               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
-               /*
-                * REVISIT: Set dmap_op_mode to THRESHOLD as default
-                * for mcbsp2 instances.
-                */
-               if (omap_additional_add(mcbsp->dev))
-                       dev_warn(mcbsp->dev,
-                               "Unable to create additional controls\n");
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       if (omap_st_add(mcbsp))
-                               dev_warn(mcbsp->dev,
-                                "Unable to create sidetone controls\n");
-
-       } else {
-               mcbsp->max_tx_thres = -EINVAL;
-               mcbsp->max_rx_thres = -EINVAL;
-       }
-}
-
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
-{
-       if (cpu_is_omap34xx()) {
-               omap_additional_remove(mcbsp->dev);
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       omap_st_remove(mcbsp);
-       }
-}
-#else
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
-#endif /* CONFIG_ARCH_OMAP3 */
-
   /*
    * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
    * 730 has only 2 McBSP, and both of them are MPU peripherals.

@@ -1746,6 +1655,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
          struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
          struct omap_mcbsp *mcbsp;
          int id = pdev->id - 1;
+       struct resource *res;
          int ret = 0;
 
          if (!pdata) {

@@ -1775,25 +1685,50 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
          mcbsp->dma_tx_lch = -1;
          mcbsp->dma_rx_lch = -1;
 
-       mcbsp->phys_base = pdata->phys_base;
-       mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n",
+                                       __func__, pdev->id);
+               ret = -ENOMEM;
+               goto exit;
+       }
+       mcbsp->phys_base = res->start;
+       mcbsp->io_base = ioremap(res->start, resource_size(res));
          if (!mcbsp->io_base) {
                  ret = -ENOMEM;
                  goto err_ioremap;
          }
 
+       omap_mcbsp_cache_size = resource_size(res);
+
          /* Default I/O is IRQ based */
          mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-       mcbsp->tx_irq = pdata->tx_irq;
-       mcbsp->rx_irq = pdata->rx_irq;
-       mcbsp->dma_rx_sync = pdata->dma_rx_sync;
-       mcbsp->dma_tx_sync = pdata->dma_tx_sync;
+       mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+       mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_rx_sync = res->start;
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_tx_sync = res->start;
 
          mcbsp->iclk = clk_get(&pdev->dev, "ick");
          if (IS_ERR(mcbsp->iclk)) {
                  ret = PTR_ERR(mcbsp->iclk);
                  dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
-               goto err_iclk;
+               goto err_res;
          }
 
          mcbsp->fclk = clk_get(&pdev->dev, "fck");

@@ -1808,14 +1743,53 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
          mcbsp_ptr[id] = mcbsp;
          platform_set_drvdata(pdev, mcbsp);
 
-       /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
-       omap34xx_device_init(mcbsp);
+       omap_additional_add(mcbsp->dev);
+       if (pdata->dma_op_mode != -EINVAL) {
+               /*
+                * Initially configure the maximum thresholds to a safe value.
+                * The McBSP FIFO usage with these values should not go under
+                * 16 locations.
+                * If the whole FIFO without safety buffer is used, than there
+                * is a possibility that the DMA will be not able to push the
+                * new data on time, causing channel shifts in runtime.
+                */
+               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10 ;
+               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10 ;
+       }
+
+       if (cpu_is_omap34xx()) {
+               res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+               if (res) {
+                       mcbsp->st_data = kzalloc(sizeof(*mcbsp->st_data),
+                                               GFP_KERNEL);
+                       if (!mcbsp->st_data) {
+                               ret = -ENOMEM;
+                               goto err_st_data;
+                       }
+                       mcbsp->st_data->io_base_st = ioremap(res->start,
+                                               resource_size(res));
+                       if (!mcbsp->st_data->io_base_st) {
+                               ret = -ENOMEM;
+                               goto err_io_st;
+                       }
+                       ret = sysfs_create_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       if (ret)
+                               goto err_sysfs;
+               }
+       }
 
          return 0;
 
+err_sysfs:
+       iounmap(mcbsp->st_data->io_base_st);
+err_io_st:
+       kfree(mcbsp->st_data);
+err_st_data:
+       clk_put(mcbsp->fclk);
   err_fclk:
          clk_put(mcbsp->iclk);
-err_iclk:
+err_res:
          iounmap(mcbsp->io_base);
   err_ioremap:
          kfree(mcbsp);

@@ -1834,7 +1808,14 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
                                  mcbsp->pdata->ops->free)
                          mcbsp->pdata->ops->free(mcbsp->id);
 
-               omap34xx_device_exit(mcbsp);
+               omap_additional_remove(mcbsp->dev);
+
+               if (mcbsp->st_data) {
+                       sysfs_remove_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       iounmap(mcbsp->st_data->io_base_st);
+                       kfree(mcbsp->st_data);
+               }
 
                  clk_disable(mcbsp->fclk);
                  clk_disable(mcbsp->iclk);
--

1.7.0.4

--
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Quoted 224 lines · Benoit

Quoted 223 lines · Kishon Vijay Abraham I

Signed-off-by Kishon Vijay Abraham I<[email protected]>

Signed-off-by Charulatha V<[email protected]>

Signed-off-by Shubhrajyoti D<[email protected]>

Cc Partha Basak<[email protected]>

---
    arch/arm/mach-omap2/mcbsp.c             |  251 +++++++++----------------------
    arch/arm/plat-omap/include/plat/mcbsp.h |    6 +-
    arch/arm/plat-omap/mcbsp.c              |  189 +++++++++++-------------
    3 files changed, 159 insertions(+), 287 deletions(-)

arch/arm/mach-omap2/mcbsp.c +36 -152

index eba9fa1..25c6703 100644
@@ -22,9 +22,13 @@
    #include<plat/dma.h>
    #include<plat/cpu.h>
    #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
    #include "control.h"
 
+static struct omap_hwmod *oh_st_device[] = {NULL, NULL};
+static int no_of_st;
 
    /* McBSP internal signal muxing functions */
 

@@ -101,199 +105,90 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
    }
    EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
 
-
-/* Platform data */
-
-#ifdef CONFIG_ARCH_OMAP2420
-static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
+struct omap_device_pm_latency omap2_mcbsp_latency[] = {
           {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
+               .deactivate_func = omap_device_idle_hwmods,
+               .activate_func   = omap_device_enable_hwmods,
+               .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
           },
    };
-#define OMAP2420_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2420_mcbsp_pdata)
-#define OMAP2420_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2420_mcbsp_pdata           NULL
-#define OMAP2420_MCBSP_PDATA_SZ                0
-#define OMAP2420_MCBSP_REG_NUM         0
-#endif
 
-#ifdef CONFIG_ARCH_OMAP2430
-static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP24XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP24XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-       },
-       {
-               .phys_base      = OMAP2430_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-       },
-};
-#define OMAP2430_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2430_mcbsp_pdata)
-#define OMAP2430_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap2430_mcbsp_pdata           NULL
-#define OMAP2430_MCBSP_PDATA_SZ                0
-#define OMAP2430_MCBSP_REG_NUM         0
-#endif
+static int omap_init_mcbsp(struct omap_hwmod *oh, void *user)
+{
+       int id, count = 1, i;
+       char *name = "omap-mcbsp";
+       char dev_name[16];
+       struct omap_hwmod *oh_device[2];
+       struct omap_mcbsp_platform_data *pdata;
+       struct omap_device *od;
+
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
+       }
 
-#ifdef CONFIG_ARCH_OMAP3
-static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP34XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
-               .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP2_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP2_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
-               .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .buffer_size    = 0x500, /* The FIFO has 1024 + 256 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP3_BASE,
-               .phys_base_st   = OMAP34XX_MCBSP3_ST_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
-               .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
-               .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-       {
-               .phys_base      = OMAP34XX_MCBSP5_BASE,
-               .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
-               .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
-               .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
-               .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-               .buffer_size    = 0x80, /* The FIFO has 128 locations */
-       },
-};
-#define OMAP34XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap34xx_mcbsp_pdata)
-#define OMAP34XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
-#else
-#define omap34xx_mcbsp_pdata           NULL
-#define OMAP34XX_MCBSP_PDATA_SZ                0
-#define OMAP34XX_MCBSP_REG_NUM         0
-#endif
+       pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
+       if (!pdata) {
+               pr_err("%s: No memory for mcbsp\n", __func__);
+               return -ENOMEM;
+       }
 
-static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
-       {
-               .phys_base      = OMAP44XX_MCBSP1_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP1_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP1_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP1,
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP2_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP2_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP2_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP2,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP3_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP3_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP3_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP3,
-               /* XXX .ops ? */
-       },
-       {
-               .phys_base      = OMAP44XX_MCBSP4_BASE,
-               .dma_rx_sync    = OMAP44XX_DMA_MCBSP4_RX,
-               .dma_tx_sync    = OMAP44XX_DMA_MCBSP4_TX,
-               .tx_irq         = OMAP44XX_IRQ_MCBSP4,
-               /* XXX .ops ? */
-       },
-};
-#define OMAP44XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap44xx_mcbsp_pdata)
-#define OMAP44XX_MCBSP_REG_NUM         (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
+       if (cpu_is_omap34xx()) {
+               pdata->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
+               if (id == 2)
+                       pdata->buffer_size = 0x500;
+               else
+                       pdata->buffer_size = 0x80;
+       } else {
+               pdata->dma_op_mode = -EINVAL;
+               pdata->buffer_size = 0;
+       }
 

Quoted 13 lines

arch/arm/mach-omap2/mcbsp.c int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) · line 156

Quoted 11 lines

arch/arm/mach-omap2/mcbsp.c +10 -1

-static int __init omap2_mcbsp_init(void)
+       sscanf(oh->name, "mcbsp%d",&id);
+       sprintf(dev_name, "mcbsp%d_sidetone", id);
+       oh_device[0] = oh;
+
+       for (i = 0; i<    no_of_st ; i++) {
+               if (!strcmp(dev_name, oh_st_device[i]->name)) {
+                       oh_device[1] = oh_st_device[i];
+                       count++;
+               }
+       }

Pfuu, it took me a while to follow how all that stuff was working :-)

sorry for that :-)

Quoted 12 lines

Since the sidetone block is tightly coupled to the mcbsp, you should
simply add this information directly as a attribute of the mcbsp2& 3
hwmod dev_attr.

You will then easily detect which one does have a sidetone connected to it and avoid all this code.

(quoted diff) +3 -0

+static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {
+       .sidetone       = "mcbsp2_sidetone",
+};

Review

Quoted 4 lines

(quoted diff) +2 -0

+static struct omap_hwmod omap34xx_mcbsp2_hwmod = {
...
+       .dev_attr       =&omap34xx_mcbsp2_dev_attr,
...

Thats a good suggestion. Thanks.

-Kishon

Quoted 366 lines

Regards,
Benoit

Quoted 359 lines

arch/arm/mach-omap2/mcbsp.c +27 -25

+
+       od = omap_device_build_ss(name, id, oh_device, count, pdata,
+                               sizeof(*pdata), omap2_mcbsp_latency,
+                               ARRAY_SIZE(omap2_mcbsp_latency), false);
+       if (IS_ERR(od))  {
+               pr_err("%s: Cant build omap_device for %s:%s.\n", __func__,
+                                       name, oh->name);
+               kfree(pdata);
+               return PTR_ERR(od);
+       }
+       omap_mcbsp_count++;
+       return 0;
+}
+
+static int omap_mcbsp_st(struct omap_hwmod *oh, void *user)
    {
-       if (cpu_is_omap2420()) {
-               omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16);
-       } else if (cpu_is_omap2430()) {
-               omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap34xx()) {
-               omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32);
-       } else if (cpu_is_omap44xx()) {
-               omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
-               omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32);
+       if (!oh) {
+               pr_err("%s:NULL hwmod pointer (oh)\n", __func__);
+               return -EINVAL;
           }
+       oh_st_device[no_of_st++] = oh;
+       return 0;
+}
+
+static int __init omap2_mcbsp_init(void)
+{
+       omap_hwmod_for_each_by_class("mcbsp_sidetone", omap_mcbsp_st,
+                                       NULL);
+       omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 
           mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
                                                                   GFP_KERNEL);
           if (!mcbsp_ptr)
                   return -ENOMEM;
 
-       if (cpu_is_omap2420())
-               omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
-                                               OMAP2420_MCBSP_PDATA_SZ);
-       if (cpu_is_omap2430())
-               omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
-                                               OMAP2430_MCBSP_PDATA_SZ);
-       if (cpu_is_omap34xx())
-               omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
-                                               OMAP34XX_MCBSP_PDATA_SZ);
-       if (cpu_is_omap44xx())
-               omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
-                                               OMAP44XX_MCBSP_PDATA_SZ);
-
           return omap_mcbsp_init();
    }
    arch_initcall(omap2_mcbsp_init);

arch/arm/plat-omap/include/plat/mcbsp.h +1 -5

index 4da6f94..1ff283c 100644
@@ -418,11 +418,9 @@ struct omap_mcbsp_platform_data {
           u8 dma_rx_sync, dma_tx_sync;
           u16 rx_irq, tx_irq;
           struct omap_mcbsp_ops *ops;
-#ifdef CONFIG_ARCH_OMAP3
-       /* Sidetone block for McBSP 2 and 3 */
           unsigned long phys_base_st;
           u16 buffer_size;
-#endif
+       int dma_op_mode;
    };
 
    struct omap_mcbsp_st_data {

@@ -466,12 +464,10 @@ struct omap_mcbsp {
           struct omap_mcbsp_platform_data *pdata;
           struct clk *iclk;
           struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
           struct omap_mcbsp_st_data *st_data;
           int dma_op_mode;
           u16 max_tx_thres;
           u16 max_rx_thres;
-#endif
           void *reg_cache;
    };
    extern struct omap_mcbsp **mcbsp_ptr;

arch/arm/plat-omap/mcbsp.c +85 -105

index eac4b97..c7c6a83 100644
@@ -27,6 +27,8 @@
 
    #include<plat/dma.h>
    #include<plat/mcbsp.h>
+#include<plat/omap_hwmod.h>
+#include<plat/omap_device.h>
 
    #include "../mach-omap2/cm-regbits-34xx.h"
 

@@ -1466,7 +1468,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id,
    }
    EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 
-#ifdef CONFIG_ARCH_OMAP3
    #define max_thres(m)                   (mcbsp->pdata->buffer_size)
    #define valid_threshold(m, val)                ((val)<= max_thres(m))
    #define THRESHOLD_PROP_BUILDER(prop)                                   \

@@ -1645,98 +1646,6 @@ static const struct attribute_group sidetone_attr_group = {
           .attrs = (struct attribute **)sidetone_attrs,
    };
 
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
-       struct omap_mcbsp_st_data *st_data;
-       int err;
-
-       st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
-       if (!st_data) {
-               err = -ENOMEM;
-               goto err1;
-       }
-
-       st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K);
-       if (!st_data->io_base_st) {
-               err = -ENOMEM;
-               goto err2;
-       }
-
-       err = sysfs_create_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-       if (err)
-               goto err3;
-
-       mcbsp->st_data = st_data;
-       return 0;
-
-err3:
-       iounmap(st_data->io_base_st);
-err2:
-       kfree(st_data);
-err1:
-       return err;
-
-}
-
-static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
-{
-       struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
-
-       if (st_data) {
-               sysfs_remove_group(&mcbsp->dev->kobj,&sidetone_attr_group);
-               iounmap(st_data->io_base_st);
-               kfree(st_data);
-       }
-}
-
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
-{
-       mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
-       if (cpu_is_omap34xx()) {
-               /*
-                * Initially configure the maximum thresholds to a safe value.
-                * The McBSP FIFO usage with these values should not go under
-                * 16 locations.
-                * If the whole FIFO without safety buffer is used, than there
-                * is a possibility that the DMA will be not able to push the
-                * new data on time, causing channel shifts in runtime.
-                */
-               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
-               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
-               /*
-                * REVISIT: Set dmap_op_mode to THRESHOLD as default
-                * for mcbsp2 instances.
-                */
-               if (omap_additional_add(mcbsp->dev))
-                       dev_warn(mcbsp->dev,
-                               "Unable to create additional controls\n");
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       if (omap_st_add(mcbsp))
-                               dev_warn(mcbsp->dev,
-                                "Unable to create sidetone controls\n");
-
-       } else {
-               mcbsp->max_tx_thres = -EINVAL;
-               mcbsp->max_rx_thres = -EINVAL;
-       }
-}
-
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
-{
-       if (cpu_is_omap34xx()) {
-               omap_additional_remove(mcbsp->dev);
-
-               if (mcbsp->id == 2 || mcbsp->id == 3)
-                       omap_st_remove(mcbsp);
-       }
-}
-#else
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
-#endif /* CONFIG_ARCH_OMAP3 */
-
    /*
     * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
     * 730 has only 2 McBSP, and both of them are MPU peripherals.

@@ -1746,6 +1655,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
           struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
           struct omap_mcbsp *mcbsp;
           int id = pdev->id - 1;
+       struct resource *res;
           int ret = 0;
 
           if (!pdata) {

@@ -1775,25 +1685,50 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
           mcbsp->dma_tx_lch = -1;
           mcbsp->dma_rx_lch = -1;
 
-       mcbsp->phys_base = pdata->phys_base;
-       mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n",
+                                       __func__, pdev->id);
+               ret = -ENOMEM;
+               goto exit;
+       }
+       mcbsp->phys_base = res->start;
+       mcbsp->io_base = ioremap(res->start, resource_size(res));
           if (!mcbsp->io_base) {
                   ret = -ENOMEM;
                   goto err_ioremap;
           }
 
+       omap_mcbsp_cache_size = resource_size(res);
+
           /* Default I/O is IRQ based */
           mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-       mcbsp->tx_irq = pdata->tx_irq;
-       mcbsp->rx_irq = pdata->rx_irq;
-       mcbsp->dma_rx_sync = pdata->dma_rx_sync;
-       mcbsp->dma_tx_sync = pdata->dma_tx_sync;
+       mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+       mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_rx_sync = res->start;
+
+       res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
+       if (!res) {
+               dev_err(&pdev->dev, "%s:mcbsp%d has invalid DMA channel\n",
+                                       __func__, pdev->id);
+               ret = -ENODEV;
+               goto err_res;
+       }
+       mcbsp->dma_tx_sync = res->start;
 
           mcbsp->iclk = clk_get(&pdev->dev, "ick");
           if (IS_ERR(mcbsp->iclk)) {
                   ret = PTR_ERR(mcbsp->iclk);
                   dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
-               goto err_iclk;
+               goto err_res;
           }
 
           mcbsp->fclk = clk_get(&pdev->dev, "fck");

@@ -1808,14 +1743,53 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
           mcbsp_ptr[id] = mcbsp;
           platform_set_drvdata(pdev, mcbsp);
 
-       /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
-       omap34xx_device_init(mcbsp);
+       omap_additional_add(mcbsp->dev);
+       if (pdata->dma_op_mode != -EINVAL) {
+               /*
+                * Initially configure the maximum thresholds to a safe value.
+                * The McBSP FIFO usage with these values should not go under
+                * 16 locations.
+                * If the whole FIFO without safety buffer is used, than there
+                * is a possibility that the DMA will be not able to push the
+                * new data on time, causing channel shifts in runtime.
+                */
+               mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10 ;
+               mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10 ;
+       }
+
+       if (cpu_is_omap34xx()) {
+               res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+               if (res) {
+                       mcbsp->st_data = kzalloc(sizeof(*mcbsp->st_data),
+                                               GFP_KERNEL);
+                       if (!mcbsp->st_data) {
+                               ret = -ENOMEM;
+                               goto err_st_data;
+                       }
+                       mcbsp->st_data->io_base_st = ioremap(res->start,
+                                               resource_size(res));
+                       if (!mcbsp->st_data->io_base_st) {
+                               ret = -ENOMEM;
+                               goto err_io_st;
+                       }
+                       ret = sysfs_create_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       if (ret)
+                               goto err_sysfs;
+               }
+       }
 
           return 0;
 
+err_sysfs:
+       iounmap(mcbsp->st_data->io_base_st);
+err_io_st:
+       kfree(mcbsp->st_data);
+err_st_data:
+       clk_put(mcbsp->fclk);
    err_fclk:
           clk_put(mcbsp->iclk);
-err_iclk:
+err_res:
           iounmap(mcbsp->io_base);
    err_ioremap:
           kfree(mcbsp);

@@ -1834,7 +1808,14 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
                                   mcbsp->pdata->ops->free)
                           mcbsp->pdata->ops->free(mcbsp->id);
 
-               omap34xx_device_exit(mcbsp);
+               omap_additional_remove(mcbsp->dev);
+
+               if (mcbsp->st_data) {
+                       sysfs_remove_group(&mcbsp->dev->kobj,
+&sidetone_attr_group);
+                       iounmap(mcbsp->st_data->io_base_st);
+                       kfree(mcbsp->st_data);
+               }
 
                   clk_disable(mcbsp->fclk);
                   clk_disable(mcbsp->iclk);
--

1.7.0.4

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