OMAP3: PM: Fix CLK_SRC mask for IVA2 and MPU

PATCH New Rajendra Nayak 1 participant 1 message Dec 14, 2010

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Arm (32-bit) Arm sub-architectures OMAP2+ support

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Rajendra Nayak

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2010-12-14 13:31 UTC #0 lore raw

PATCH 1/1 OMAP3: PM: Fix CLK_SRC mask for IVA2 and MPU

The IVA2_CLK_SRC and MPU_CLK_SRC for OMAP3 are 3 bit fields and hence the mask should be defined as (0x7 << n).

Signed-off-by Rajendra Nayak <[email protected]>

Cc Kevin Hilman <[email protected]>

Cc Paul Walmsley <[email protected]>

---
 arch/arm/mach-omap2/cm-regbits-34xx.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

arch/arm/mach-omap2/cm-regbits-34xx.h +2 -2

index 4f959a7..d5c8fb6 100644
@@ -81,7 +81,7 @@
 
 /* CM_CLKSEL1_PLL_IVA2 */
 #define OMAP3430_IVA2_CLK_SRC_SHIFT			19
-#define OMAP3430_IVA2_CLK_SRC_MASK			(0x3 << 19)
+#define OMAP3430_IVA2_CLK_SRC_MASK			(0x7 << 19)
 #define OMAP3430_IVA2_DPLL_MULT_SHIFT			8
 #define OMAP3430_IVA2_DPLL_MULT_MASK			(0x7ff << 8)
 #define OMAP3430_IVA2_DPLL_DIV_SHIFT			0

@@ -126,7 +126,7 @@
 
 /* CM_CLKSEL1_PLL_MPU */
 #define OMAP3430_MPU_CLK_SRC_SHIFT			19
-#define OMAP3430_MPU_CLK_SRC_MASK			(0x3 << 19)
+#define OMAP3430_MPU_CLK_SRC_MASK			(0x7 << 19)
 #define OMAP3430_MPU_DPLL_MULT_SHIFT			8
 #define OMAP3430_MPU_DPLL_MULT_MASK			(0x7ff << 8)
 #define OMAP3430_MPU_DPLL_DIV_SHIFT			0

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