POST Problems on MPC8[5/6]xx
Hello all,
I'm seeing issues on our MPC8[5/6]xx products in relation to POST testing. I see that the POST word is stored in a spare, unused register in the PIC, but this register seems to be cleared during interrupt_init() when the PIC is reset. This means that I am seeing the POST_ROM tests run (pre interrupt_init()) but the word then gets blown away and the POST_RAM tests do not run (post interrupt_init()). I browsed through the MPC8572 UM and didn't see any obvious replacements for TFRR that wouldn't be reset. Do others see this issue? Freescale guys, are you aware of some other register we can use?
Thanks,
John
Quoted 12 lines · John Schmoller
Hello all,
I'm seeing issues on our MPC8[5/6]xx products in relation to POST testing. I see that the POST word is stored in a spare, unused register in the PIC, but this register seems to be cleared during
interrupt_init()when the PIC is reset. This means that I am seeing thePOST_ROMtests run (preinterrupt_init()) but the word then gets blown away and thePOST_RAMtests do not run (postinterrupt_init()). I browsed through the MPC8572 UM and didn't see any obvious replacements for TFRR that wouldn't be reset. Do others see this issue? Freescale guys, are you aware of some other register we can use?
Quoted 2 lines
Thanks,
John
Not really, probably best to just have the PIC code save & restore the TFRR if #define CONFIG_POST
- k