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fix XSAVE leaf 0 EBX size calculation

PATCH New Wei Huang 2 participants 3 messages Feb 4, 2011 – Feb 9, 2011

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Wei Huang

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#0 lore raw

PATCH 1/1 fix XSAVE leaf 0 EBX size calculation

Fixes a size calculation bug when enabled bits in XFEATURE_MASK (xcr0) aren't contiguous.

Current for_loop will stop when xcr0 feature bit is 0. But in reality, the bits can be non-contiguous. One example is that LWP is bit 62 on AMD platform. This patch iterates through all bits to calculate the size for enabled features.

Signed-off-by Wei Huang <[email protected]>
xen/arch/x86/hvm/hvm.c +5 -3
diff -r fc84efa61ef1 -r d42732f29bed xen/arch/x86/hvm/hvm.c
@@ -2222,10 +2222,12 @@
         /* EBX value of main leaf 0 depends on enabled xsave features */
         if ( count == 0 && v->arch.xcr0 ) 
         {
-            for ( sub_leaf = 2; 
-                  (sub_leaf < 64) && (v->arch.xcr0 & (1ULL << sub_leaf));
-                  sub_leaf++ ) 
+            /* reset EBX to default value first */
+            *ebx = 576; 
+            for ( sub_leaf = 2; sub_leaf < 64; sub_leaf++ )
             {
+                if ( !(v->arch.xcr0 & (1ULL << sub_leaf)) )
+                    continue;
                 domain_cpuid(v->domain, input, sub_leaf, &_eax, &_ebx, &_ecx, 
                              &_edx);
                 if ( (_eax + _ebx) > *ebx )

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#1 lore raw

PATCH 1/1 x86: reduce magic number usage in XSAVE code (RE: [PATCH][HVM] fix XSAVE leaf 0 EBX size calculation)

Wei Huang wrote on 2011-02-05:

Quoted 8 lines

Fixes a size calculation bug when enabled bits in XFEATURE_MASK (xcr0) aren't contiguous.

Current for_loop will stop when xcr0 feature bit is 0. But in reality,
the bits can be non-contiguous. One example is that LWP is bit 62 on
AMD platform. This patch iterates through all bits to calculate the size for enabled features.

Signed-off-by Wei Huang <[email protected]>

ACK on the patch despite it was checked in already. BTW, I want to add a trivial patch to limit the magic number usage in XSAVE code.

x86: reduce magic number usage in XSAVE code

Signed-off-by Wei Gang <[email protected]>
xen/arch/x86/hvm/hvm.c +1 -1
diff -r aeda4adecaf8 xen/arch/x86/hvm/hvm.c
@@ -2223,7 +2223,7 @@ void hvm_cpuid(unsigned int input, unsig
         if ( count == 0 && v->arch.xcr0 ) 
         {
             /* reset EBX to default value first */
-            *ebx = 576; 
+            *ebx = XSAVE_AREA_MIN_SIZE; 
             for ( sub_leaf = 2; sub_leaf < 64; sub_leaf++ )
             {
                 if ( !(v->arch.xcr0 & (1ULL << sub_leaf)) )
xen/arch/x86/i387.c +0 -1
diff -r aeda4adecaf8 xen/arch/x86/i387.c
@@ -221,7 +221,6 @@ static void restore_fpu(struct vcpu *v)
 }
 
 #define XSTATE_CPUID 0xd
-#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
 
 /*
  * Maximum size (in byte) of the XSAVE/XRSTOR save area required by all
xen/include/asm-x86/i387.h +2 -1
diff -r aeda4adecaf8 xen/include/asm-x86/i387.h
@@ -21,13 +21,14 @@ int xsave_alloc_save_area(struct vcpu *v
 int xsave_alloc_save_area(struct vcpu *v);
 void xsave_free_save_area(struct vcpu *v);
 
+#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
 #define XSTATE_FP       (1ULL << 0)
 #define XSTATE_SSE      (1ULL << 1)
 #define XSTATE_YMM      (1ULL << 2)
 #define XSTATE_LWP      (1ULL << 62) /* AMD lightweight profiling */
 #define XSTATE_FP_SSE   (XSTATE_FP | XSTATE_SSE)
 #define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
-#define XSTATE_YMM_OFFSET  (512 + 64)
+#define XSTATE_YMM_OFFSET  XSAVE_AREA_MIN_SIZE
 #define XSTATE_YMM_SIZE    256
 #define XSAVEOPT        (1 << 0)

Jimmy

x86: reduce magic number usage in XSAVE code

Signed-off-by Wei Gang <[email protected]>
xen/arch/x86/hvm/hvm.c +1 -1
diff -r aeda4adecaf8 xen/arch/x86/hvm/hvm.c
@@ -2223,7 +2223,7 @@ void hvm_cpuid(unsigned int input, unsig
         if ( count == 0 && v->arch.xcr0 ) 
         {
             /* reset EBX to default value first */
-            *ebx = 576; 
+            *ebx = XSAVE_AREA_MIN_SIZE; 
             for ( sub_leaf = 2; sub_leaf < 64; sub_leaf++ )
             {
                 if ( !(v->arch.xcr0 & (1ULL << sub_leaf)) )
xen/arch/x86/i387.c +0 -1
diff -r aeda4adecaf8 xen/arch/x86/i387.c
@@ -221,7 +221,6 @@ static void restore_fpu(struct vcpu *v)
 }
 
 #define XSTATE_CPUID 0xd
-#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
 
 /*
  * Maximum size (in byte) of the XSAVE/XRSTOR save area required by all
xen/include/asm-x86/i387.h +2 -1
diff -r aeda4adecaf8 xen/include/asm-x86/i387.h
@@ -21,13 +21,14 @@ int xsave_alloc_save_area(struct vcpu *v
 int xsave_alloc_save_area(struct vcpu *v);
 void xsave_free_save_area(struct vcpu *v);
 
+#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
 #define XSTATE_FP       (1ULL << 0)
 #define XSTATE_SSE      (1ULL << 1)
 #define XSTATE_YMM      (1ULL << 2)
 #define XSTATE_LWP      (1ULL << 62) /* AMD lightweight profiling */
 #define XSTATE_FP_SSE   (XSTATE_FP | XSTATE_SSE)
 #define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
-#define XSTATE_YMM_OFFSET  (512 + 64)
+#define XSTATE_YMM_OFFSET  XSAVE_AREA_MIN_SIZE
 #define XSTATE_YMM_SIZE    256
 #define XSAVEOPT        (1 << 0)

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author Acked-by on v1 1/1
#2 lore raw

Re: [PATCH] x86: reduce magic number usage in XSAVE code (RE: [PATCH][HVM] fix XSAVE leaf 0 EBX size calculation)

Acked-by Wei Huang <[email protected]>
Quoted 59 lines · Gang

Wei Huang wrote on 2011-02-05:

Quoted 8 lines

Fixes a size calculation bug when enabled bits in XFEATURE_MASK (xcr0) aren't contiguous.

Current for_loop will stop when xcr0 feature bit is 0. But in reality,
the bits can be non-contiguous. One example is that LWP is bit 62 on
AMD platform. This patch iterates through all bits to calculate the size for enabled features.

Signed-off-by Wei Huang<[email protected]>

ACK on the patch despite it was checked in already. BTW, I want to add a trivial patch to limit the magic number usage in XSAVE code.

x86: reduce magic number usage in XSAVE code

Signed-off-by Wei Gang<[email protected]>

diff -r aeda4adecaf8 xen/arch/x86/hvm/hvm.c

xen/arch/x86/hvm/hvm.c +1 -1
@@ -2223,7 +2223,7 @@ void hvm_cpuid(unsigned int input, unsig
          if ( count == 0&&  v->arch.xcr0 )
          {
              /* reset EBX to default value first */
-            *ebx = 576;
+            *ebx = XSAVE_AREA_MIN_SIZE;
              for ( sub_leaf = 2; sub_leaf<  64; sub_leaf++ )
              {
                  if ( !(v->arch.xcr0&  (1ULL<<  sub_leaf)) )

diff -r aeda4adecaf8 xen/arch/x86/i387.c

xen/arch/x86/i387.c +0 -1
@@ -221,7 +221,6 @@ static void restore_fpu(struct vcpu *v)
  }
 
  #define XSTATE_CPUID 0xd
-#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
 
  /*
   * Maximum size (in byte) of the XSAVE/XRSTOR save area required by all

diff -r aeda4adecaf8 xen/include/asm-x86/i387.h

xen/include/asm-x86/i387.h +2 -1
@@ -21,13 +21,14 @@ int xsave_alloc_save_area(struct vcpu *v
  int xsave_alloc_save_area(struct vcpu *v);
  void xsave_free_save_area(struct vcpu *v);
 
+#define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
  #define XSTATE_FP       (1ULL<<  0)
  #define XSTATE_SSE      (1ULL<<  1)
  #define XSTATE_YMM      (1ULL<<  2)
  #define XSTATE_LWP      (1ULL<<  62) /* AMD lightweight profiling */
  #define XSTATE_FP_SSE   (XSTATE_FP | XSTATE_SSE)
  #define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
-#define XSTATE_YMM_OFFSET  (512 + 64)
+#define XSTATE_YMM_OFFSET  XSAVE_AREA_MIN_SIZE
  #define XSTATE_YMM_SIZE    256
  #define XSAVEOPT        (1<<  0)

Jimmy