at91sam9261ek: make operational again

Also removes CONFIG_AT91_LEGACY related stuff.

Signed-off-by Remy Bohmer <[email protected]>

---
?V1: This patch contains everything to make the boards work again on ? ? the current changes in the u-boot-atmel.git tree.
? ? It requires the mainstream fixes to be applied first ? ? ? ? ?([PATCH 1/2 V3] at91sam9261ek: make operational again)

? ? This patch-series can be pulled from:
? ? ? ?git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek

?Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 23 ----
?arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c ?| ? 31 +++--
?arch/arm/cpu/arm926ejs/at91/led.c ? ? ? ? ? ? ? ? ?| ? ?1 -
?arch/arm/include/asm/arch-at91/at91_matrix.h ? ? ? | ? 17 ++-
?arch/arm/include/asm/arch-at91/at91sam9261.h ? ? ? | ? ?1 +
?.../arm/include/asm/arch-at91/at91sam9261_matrix.h | ? 64 ---------
?board/atmel/at91sam9261ek/at91sam9261ek.c ? ? ? ? ?| ?140 +++++++++++---------
?board/atmel/at91sam9261ek/led.c ? ? ? ? ? ? ? ? ? ?| ? ?8 +-
?boards.cfg ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?6 +
?doc/README.at91 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 +-
?include/configs/at91sam9261ek.h ? ? ? ? ? ? ? ? ? ?| ? 27 ++--

?11 files changed, 127 insertions(+), 194 deletions(-) ?delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h

boards.cfg +0 -0

@@ -82,6 +82,12 @@ at91sam9g20ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel

at91sam9xeek_nandflash       arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
at91sam9xeek_dataflash_cs0   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
at91sam9xeek_dataflash_cs1   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1

boards.cfg +6 -0

+at91sam9261ek_dataflash_cs0  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0
+at91sam9261ek_dataflash_cs3  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3
+at91sam9261ek_nandflash      arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH
+at91sam9g10ek_dataflash_cs0  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0
+at91sam9g10ek_dataflash_cs3  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3
+at91sam9g10ek_nandflash      arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH

top9000eval_xe               arm         arm926ejs   top9000             emk            at91        top9000:EVAL9000
top9000su_xe                 arm         arm926ejs   top9000             emk            at91        top9000:SU9000
meesc                        arm         arm926ejs   -                   esd            at91

doc/README.at91 +1 -2

index 84b5595..279c9f3 100644
@@ -42,8 +42,7 @@ Environment variables
 		- Dataflash on SPI chip select 3 (dataflash card)
 		- Nand flash.
 
-	You can choose your storage location at config step (here for at91sam9260ek) :
-		make at91sam9261ek_config		- use data flash (spi cs0) (default)
+	You can choose your storage location at config step (here for at91sam9261ek) :
 		make at91sam9261ek_nandflash_config	- use nand flash
 		make at91sam9261ek_dataflash_cs0_config	- use data flash (spi cs0)
 		make at91sam9261ek_dataflash_cs3_config	- use data flash (spi cs3)

include/configs/at91sam9261ek.h +15 -12

index d601dad..c0d91d0 100644
@@ -27,7 +27,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
 
 /*
 * WARNING:

@@ -45,14 +49,12 @@
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
 #define CONFIG_SYS_HZ			1000
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
 /* Define actual evaluation board type from used processor type */
-#ifdef CONFIG_AT91SAM9G10EK
-#define CONFIG_AT91SAM9G10	1	/* It's an Atmel AT91SAM9G10 SoC*/
+#ifdef CONFIG_AT91SAM9G10
+# define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK */
 #else
-#define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/
+# define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK */
 #endif
-#define CONFIG_AT91FAMILY
 
 /* Misc CPU related */
 #define CONFIG_ARCH_CPU_INIT

@@ -62,8 +64,10 @@
 #define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
 #define CONFIG_AT91_GPIO
 
 /* LCD */

@@ -84,10 +88,8 @@
 
 /* serial console */
 #define CONFIG_ATMEL_USART
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define	CONFIG_USART_ID			ATMEL_ID_SYS
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
 

@@ -129,12 +131,13 @@
 * Initialized before u-boot gets started.
 */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
 #define CONFIG_SYS_SDRAM_SIZE		0x04000000 /* 64 megs */
 
 /* size in bytes reserved for initial data */
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 \
 					- GENERATED_GBL_DATA_SIZE)
+
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1

@@ -150,7 +153,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 22)
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 21)

Signature · 6 lines

1.7.1

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

some more comments on that patchset.

Am 05.02.2011 um 13:43 schrieb Remy Bohmer:

Quoted 18 lines

Also removes CONFIG_AT91_LEGACY related stuff.

Signed-off-by Remy Bohmer<[email protected]>

---
V1: This patch contains everything to make the boards work again on
the current changes in the u-boot-atmel.git tree. It requires the mainstream fixes to be applied first
([PATCH 1/2 V3] at91sam9261ek: make operational again)

This patch-series can be pulled from:
git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek

Makefile                                           |   23 ----
arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c  |   31 +++--
arch/arm/cpu/arm926ejs/at91/led.c                  |    1 -
arch/arm/include/asm/arch-at91/at91_matrix.h       |   17 ++-
arch/arm/include/asm/arch-at91/at91sam9261.h       |    1 +
.../arm/include/asm/arch-at91/at91sam9261_matrix.h |   64 ---------

Quoted 8 lines

board/atmel/at91sam9261ek/at91sam9261ek.c          |  140 +++++++++++---------
board/atmel/at91sam9261ek/led.c                    |    8 +-
boards.cfg                                         |    6 +
doc/README.at91                                    |    3 +-
include/configs/at91sam9261ek.h                    |   27 ++--
11 files changed, 127 insertions(+), 194 deletions(-)

delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h

Makefile

Quoted 2 lines

Makefile +0 -0

index 770fb0d..e934b75 100644

Please merge those changes to Makefile and boards.cfg into Patch 1/2.

Quoted 29 lines

Makefile +0 -22

@@ -759,29 +759,6 @@ CPUAT91_config	:	unconfig
 ## ARM926EJ-S Systems
 #########################################################################
 
-at91sam9261ek_nandflash_config \
-at91sam9261ek_dataflash_cs0_config \
-at91sam9261ek_dataflash_cs3_config \
-at91sam9261ek_config \
-at91sam9g10ek_nandflash_config \
-at91sam9g10ek_dataflash_cs0_config \
-at91sam9g10ek_dataflash_cs3_config \
-at91sam9g10ek_config	:	unconfig
-	@mkdir -p $(obj)include
-	@if [ "$(findstring 9g10,$@)" ] ; then \
-		echo "#define CONFIG_AT91SAM9G10EK 1"	>>$(obj)include/config.h ; \
-	else \
-		echo "#define CONFIG_AT91SAM9261EK 1"	>>$(obj)include/config.h ; \
-	fi;
-	@if [ "$(findstring _nandflash,$@)" ] ; then \
-		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
-	elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
-		echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1"	>>$(obj)include/config.h ; \
-	else \
-		echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"	>>$(obj)include/config.h ; \
-	fi;
-	@$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c

Quoted 6 lines

Makefile +0 -1

-
 at91sam9263ek_norflash_config \
 at91sam9263ek_norflash_boot_config \
 at91sam9263ek_nandflash_config \

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +0 -0

index b4353ef..0e2c196 100644

those changes should go into u-boot-atmel/rework2011xxx branch

Quoted 63 lines

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +11 -10

@@ -23,45 +23,46 @@
  */
 
 #include<common.h>
+#include<asm/io.h>
+#include<asm/arch/at91sam9261.h>
 #include<asm/arch/at91_common.h>
 #include<asm/arch/at91_pmc.h>
 #include<asm/arch/gpio.h>
-#include<asm/arch/io.h>
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 8, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTC, 9, 0);		/* RXD0 */
-	writel(1<<  AT91SAM9261_ID_US0,&pmc->pcer);
+	writel(1<<  ATMEL_ID_USART0,&pmc->pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 12, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTC, 13, 0);		/* RXD1 */
-	writel(1<<  AT91SAM9261_ID_US1,&pmc->pcer);
+	writel(1<<  ATMEL_ID_USART1,&pmc->pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 14, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTC, 15, 0);		/* RXD2 */
-	writel(1<<  AT91SAM9261_ID_US2,&pmc->pcer);
+	writel(1<<  ATMEL_ID_USART2,&pmc->pcer);
 }
 
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTA, 9, 0);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 10, 1);		/* DTXD */
-	writel(1<<  AT91_ID_SYS,&pmc->pcer);
+	writel(1<<  ATMEL_ID_SYS,&pmc->pcer);
 }
 
 void at91_serial_hw_init(void)

@@ -79,21 +80,21 @@ void at91_serial_hw_init(void)
 #endif
 

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c void at91_serial_hw_init(void) · line 85

Quoted 5 lines

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +1 -1

 #ifdef CONFIG_USART3	/* DBGU */
-	at91_serial3_hw_init();
+	at91_seriald_hw_init();
 #endif
 }

Quoted 46 lines

arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +4 -4

 #ifdef CONFIG_HAS_DATAFLASH
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTA, 0, 0);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 2, 0);	/* SPI0_SPCK */
 
 	/* Enable clock */
-	writel(1<<  AT91SAM9261_ID_SPI0,&pmc->pcer);
+	writel(1<<  ATMEL_ID_SPI0,&pmc->pcer);
 
 	if (cs_mask&  (1<<  0)) {
 		at91_set_a_periph(AT91_PIO_PORTA, 3, 1);

@@ -123,14 +124,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 30, 0);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 31, 0);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 29, 0);	/* SPI1_SPCK */
 
 	/* Enable clock */
-	writel(1<<  AT91SAM9261_ID_SPI1,&pmc->pcer);
+	writel(1<<  ATMEL_ID_SPI1,&pmc->pcer);
 
 	if (cs_mask&  (1<<  0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 28, 1);

arch/arm/cpu/arm926ejs/at91/led.c +0 -1

index 6bcfa7f..e5f145a 100644
@@ -24,7 +24,6 @@
 
 #include<common.h>
 #include<asm/io.h>
-#include<asm/arch/at91_pmc.h>
 #include<asm/arch/at91_pio.h>
 #include<asm/arch/gpio.h>
 

arch/arm/include/asm/arch-at91/at91_matrix.h

Quoted 4 lines

arch/arm/include/asm/arch-at91/at91_matrix.h +0 -0

index f99b1d4..4cd7229 100644

Quoted 73 lines

arch/arm/include/asm/arch-at91/at91_matrix.h +9 -8

@@ -27,7 +27,7 @@
 
 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
 #define AT91_ASM_MATRIX_CSA0	(AT91_MATRIX_BASE + 0x11C)
-#elif defined(CONFIG_AT91SAM9261)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 #define AT91_ASM_MATRIX_CSA0	(AT91_MATRIX_BASE + 0x30)
 #elif defined(CONFIG_AT91SAM9263)
 #define AT91_ASM_MATRIX_CSA0	(AT91_MATRIX_BASE + 0x120)

@@ -43,7 +43,7 @@
 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
 #define AT91_MATRIX_MASTERS	6
 #define AT91_MATRIX_SLAVES	5
-#elif defined(CONFIG_AT91SAM9261)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 #define AT91_MATRIX_MASTERS	1
 #define AT91_MATRIX_SLAVES	5
 #elif defined(CONFIG_AT91SAM9263)

@@ -63,7 +63,7 @@ typedef struct at91_priority {
 
 typedef struct at91_matrix {
 	u32		mcfg[AT91_MATRIX_MASTERS];
-#if defined(CONFIG_AT91SAM9261)
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 	u32		scfg[AT91_MATRIX_SLAVES];
 	u32		res61_1[3];
 	u32		tcr;

@@ -113,7 +113,7 @@ typedef struct at91_matrix {
 
 #define AT91_MATRIX_CSA_EBI1_CS2A	0x00000008
 
-#if defined CONFIG_AT91SAM9261
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define	AT91_MATRIX_MCFG_RCB0	(1<<  0)
 /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */

@@ -143,7 +143,8 @@ typedef struct at91_matrix {
 /* Fixed Index of Default Master */
 #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
 #define	AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)	((x&  0xf)<<  18)
-#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) || \
+	defined(CONFIG_AT91SAM9G10)
 #define	AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)	((x&  7)<<  18)
 #endif
 

@@ -151,7 +152,7 @@ typedef struct at91_matrix {
 #if defined(CONFIG_AT91SAM9G45)
 #define	AT91_MATRIX_SCFG_SLOT_CYCLE(x)	((x&  0x1ff)<<  0)
 #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
-	defined(CONFIG_AT91SAM9263)
+	defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G10)
 #define	AT91_MATRIX_SCFG_SLOT_CYCLE(x)	((x&  0xff)<<  0)
 #endif
 

@@ -207,7 +208,7 @@ typedef struct at91_matrix {
 #define	AT91_MATRIX_TCMR_DTCM_16	0x00000050
 #define	AT91_MATRIX_TCMR_DTCM_32	0x00000060
 #endif
-#if defined(CONFIG_AT91SAM9261)
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 /* Size of ITCM enabled memory block */
 #define	AT91_MATRIX_TCMR_ITCM_0		0x00000000
 #define	AT91_MATRIX_TCMR_ITCM_16	0x00000005

@@ -235,7 +236,7 @@ typedef struct at91_matrix {
 #endif
 
 /* USB Pad Pull-Up Control Register */
-#if defined(CONFIG_AT91SAM9261)
+#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
 #define	AT91_MATRIX_USBPUCR_PUON	0x40000000
 #endif
 

arch/arm/include/asm/arch-at91/at91sam9261.h line 128

Quoted 9 lines

arch/arm/include/asm/arch-at91/at91sam9261.h +1 -0

index f8048d5..4bf7d8a 100644
@@ -125,6 +125,7 @@
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS		3		/* theese SoCs have 3 PIO */
+#define ATMEL_PMC_UHP		AT91SAM926x_PMC_UHP

arch/arm/include/asm/arch-at91/at91sam9261_matrix.h

Quoted 5 lines

arch/arm/include/asm/arch-at91/at91sam9261.h +0 -0

 /*
  * SoC specific defines

arch/arm/include/asm/arch-at91/at91sam9261_matrix.h deleted +0 -0

deleted file mode 100644

arch/arm/include/asm/arch-at91/at91sam9261_matrix.h

Quoted 3 lines

index e2bfc4b..0000000

arch/arm/include/asm/arch-at91/at91sam9261_matrix.h deleted +0 -0

Quoted 8 lines

arch/arm/include/asm/arch-at91/at91sam9261_matrix.h deleted +0 -1

-#endif

board/atmel/at91sam9261ek/at91sam9261ek.c +0 -0

index 25c181e..da2c2c6 100644
@@ -23,19 +23,16 @@
  */
 

board/atmel/at91sam9261ek/at91sam9261ek.c line 27

Quoted 5 lines

board/atmel/at91sam9261ek/at91sam9261ek.c +2 -2

 #include<common.h>
-#include<asm/arch/at91sam9261.h>
-#include<asm/arch/at91sam9261_matrix.h>
+#include<asm/io.h>
+#include<asm/arch/at91_matrix.h>

boards.cfg

Quoted 246 lines

board/atmel/at91sam9261ek/at91sam9261ek.c +75 -61

 #include<asm/arch/at91sam9_smc.h>
 #include<asm/arch/at91_common.h>
 #include<asm/arch/at91_pmc.h>
-#include<asm/arch/at91_rstc.h>
 #include<asm/arch/clk.h>
 #include<asm/arch/gpio.h>
-#include<asm/arch/io.h>
 #include<lcd.h>
 #include<atmel_lcdc.h>
 #if defined(CONFIG_RESET_PHY_R)&&  defined(CONFIG_DRIVER_DM9000)
-#include<net.h>
 #include<netdev.h>
 #endif
 

@@ -49,44 +46,43 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_CMD_NAND
 static void at91sam9261ek_nand_hw_init(void)
 {
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 	unsigned long csa;
 
 	/* Enable CS3 */
-	csa = at91_sys_read(AT91_MATRIX_EBICSA);
-	at91_sys_write(AT91_MATRIX_EBICSA,
-		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
+        writel(csa,&matrix->csa);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
 #ifdef CONFIG_AT91SAM9G10EK
-	at91_sys_write(AT91_SMC_SETUP(3),
-		       AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(3),
-		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) |
-		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7));
-	at91_sys_write(AT91_SMC_CYCLE(3),
-		       AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+	writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+	writel(	AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7),
+		&smc->cs[3].pulse);
+	writel(	AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+		&smc->cs[3].cycle);
 #else
-	at91_sys_write(AT91_SMC_SETUP(3),
-		       AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(3),
-		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-	at91_sys_write(AT91_SMC_CYCLE(3),
-		       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
+	writel( AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+	writel(	AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+		&smc->cs[3].pulse);
+	writel(	AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+		&smc->cs[3].cycle);
 #endif
-	at91_sys_write(AT91_SMC_MODE(3),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
+	writel(	AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-		       AT91_SMC_DBW_16 |
+		AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-		       AT91_SMC_DBW_8 |
+		AT91_SMC_MODE_DBW_8 |
 #endif
-		       AT91_SMC_TDF_(2));
-
-	at91_sys_write(AT91_PMC_PCER, 1<<  AT91SAM9261_ID_PIOC);
+		AT91_SMC_MODE_TDF_CYCLE(2),
+		&smc->cs[3].mode);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);

@@ -102,35 +98,37 @@ static void at91sam9261ek_nand_hw_init(void)
 #ifdef CONFIG_DRIVER_DM9000
 static void at91sam9261ek_dm9000_hw_init(void)
 {
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+
 	/* Configure SMC CS2 for DM9000 */
 #ifdef CONFIG_AT91SAM9G10EK
-	at91_sys_write(AT91_SMC_SETUP(2),
-		       AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(2),
-		       AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) |
-		       AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8));
-	at91_sys_write(AT91_SMC_CYCLE(2),
-		       AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20));
-	at91_sys_write(AT91_SMC_MODE(2),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
-		       AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
-		       AT91_SMC_TDF_(1));
+	writel(	AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[2].setup);
+	writel(	AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) |
+		AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8),
+		&smc->cs[2].pulse);
+	writel(	AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20),
+		&smc->cs[2].cycle);
+	writel(	AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
+		AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
+		AT91_SMC_MODE_TDF_CYCLE(1),
+		&smc->cs[2].mode);
 #else
-	at91_sys_write(AT91_SMC_SETUP(2),
-		       AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(2),
-		       AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
-		       AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
-	at91_sys_write(AT91_SMC_CYCLE(2),
-		       AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-	at91_sys_write(AT91_SMC_MODE(2),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
-		       AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
-		       AT91_SMC_TDF_(1));
+	writel(	AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[2].setup);
+	writel(	AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
+		AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
+		&smc->cs[2].pulse);
+	writel(	AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
+		&smc->cs[2].cycle);
+	writel(	AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
+		AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
+		AT91_SMC_MODE_TDF_CYCLE(1),
+		&smc->cs[2].mode);
 #endif
 
 	/* Configure Reset signal as output */

@@ -156,7 +154,7 @@ vidinfo_t panel_info = {
 	vl_vsync_len:	1,
 	vl_upper_margin:1,
 	vl_lower_margin:0,
-	mmio:		AT91SAM9261_LCDC_BASE,
+	mmio:		ATMEL_BASE_LCDC,
 };
 
 void lcd_enable(void)

@@ -171,6 +169,8 @@ void lcd_disable(void)
 
 static void at91sam9261ek_lcd_hw_init(void)
 {
+	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
 	at91_set_A_periph(AT91_PIN_PB1, 0);	/* LCDHSYNC */
 	at91_set_A_periph(AT91_PIN_PB2, 0);	/* LCDDOTCK */
 	at91_set_A_periph(AT91_PIN_PB3, 0);	/* LCDDEN */

@@ -194,12 +194,12 @@ static void at91sam9261ek_lcd_hw_init(void)
 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
 
-	at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
+	writel(AT91_PMC_HCK1,&pmc->scer);
 
 #ifdef CONFIG_AT91SAM9G10EK
 	gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE;
 #else
-	gd->fb_base = AT91SAM9261_SRAM_BASE;
+	gd->fb_base = ATMEL_BASE_SRAM;
 #endif
 }
 

@@ -217,7 +217,7 @@ void lcd_show_board_info(void)
 	lcd_printf ("(C) 2008 ATMEL Corp\n");
 	lcd_printf ("at91support at atmel.com\n");
 	lcd_printf ("%s CPU at %s MHz\n",
-		CONFIG_SYS_AT91_CPU_NAME,
+		ATMEL_CPU_NAME,
 		strmhz(temp, get_cpu_clk_rate()));
 
 	dram_size = 0;

@@ -233,6 +233,21 @@ void lcd_show_board_info(void)
 #endif /* CONFIG_LCD_INFO */
 #endif
 
+int board_early_init_f(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	/* Enable clocks for all PIOs */
+	writel(	(1<<  ATMEL_ID_PIOA) | (1<<  ATMEL_ID_PIOB) |
+		(1<<  ATMEL_ID_PIOC),
+		&pmc->pcer);
+
+	/* Configure DBGU pins, the bootstrap code might skip it */
+	at91_seriald_hw_init();
+
+	return 0;
+}
+
 int board_init(void)
 {
 	/* Enable Ctrlc */

@@ -248,7 +263,6 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9261ek_nand_hw_init();
 #endif

board/atmel/at91sam9261ek/led.c +2 -6

index 5d1c5f2..1c524f3 100644
@@ -23,16 +23,12 @@
  */
 
 #include<common.h>
-#include<asm/arch/at91sam9261.h>
-#include<asm/arch/at91_pmc.h>
+#include<asm/io.h>
 #include<asm/arch/gpio.h>
-#include<asm/arch/io.h>
 
 void coloured_LED_init(void)
 {
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1<<  AT91SAM9261_ID_PIOA);
-
+	/* Clock is enabled in board_early_init_f() */
 	at91_set_gpio_output(CONFIG_RED_LED, 1);
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);

boards.cfg +0 -0

index 0da32ef..488ef80 100644

should go into Patch v1/2

Quoted 23 lines

boards.cfg +0 -0

@@ -82,6 +82,12 @@ at91sam9g20ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel

at91sam9xeek_nandflash       arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
at91sam9xeek_dataflash_cs0   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
at91sam9xeek_dataflash_cs1   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1

boards.cfg +6 -0

+at91sam9261ek_dataflash_cs0  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0
+at91sam9261ek_dataflash_cs3  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3
+at91sam9261ek_nandflash      arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH
+at91sam9g10ek_dataflash_cs0  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0
+at91sam9g10ek_dataflash_cs3  arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3
+at91sam9g10ek_nandflash      arm         arm926ejs   at91sam9261ek       atmel          at91        at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH

top9000eval_xe               arm         arm926ejs   top9000             emk            at91        top9000:EVAL9000
top9000su_xe                 arm         arm926ejs   top9000             emk            at91        top9000:SU9000
meesc                        arm         arm926ejs   -                   esd            at91

doc/README.at91 +0 -0

index 84b5595..279c9f3 100644
@@ -42,8 +42,7 @@ Environment variables
 		- Dataflash on SPI chip select 3 (dataflash card)
 		- Nand flash.
 

include/configs/at91sam9261ek.h

Quoted 10 lines

doc/README.at91 +1 -2

-	You can choose your storage location at config step (here for at91sam9260ek) :
-		make at91sam9261ek_config		- use data flash (spi cs0) (default)
+	You can choose your storage location at config step (here for at91sam9261ek) :
 		make at91sam9261ek_nandflash_config	- use nand flash
 		make at91sam9261ek_dataflash_cs0_config	- use data flash (spi cs0)
 		make at91sam9261ek_dataflash_cs3_config	- use data flash (spi cs3)

include/configs/at91sam9261ek.h +0 -0

index d601dad..c0d91d0 100644

Quoted 83 lines

include/configs/at91sam9261ek.h +8 -6

@@ -27,7 +27,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include<asm/hardware.h>
 
 /*
  * WARNING:

@@ -45,14 +49,12 @@
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
 #define CONFIG_SYS_HZ			1000
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
 /* Define actual evaluation board type from used processor type */
-#ifdef CONFIG_AT91SAM9G10EK
-#define CONFIG_AT91SAM9G10	1	/* It's an Atmel AT91SAM9G10 SoC*/
 
+#ifdef CONFIG_AT91SAM9G10
+# define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK */
 #else
-#define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/
+# define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK */
 #endif
-#define CONFIG_AT91FAMILY
 
 /* Misc CPU related */

#define CONFIG_ARCH_CPU_INIT

include/configs/at91sam9261ek.h +7 -7

@@ -62,8 +64,10 @@
 #define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
 #define CONFIG_AT91_GPIO
 
 /* LCD */

@@ -84,10 +88,8 @@
 
 /* serial console */
 #define CONFIG_ATMEL_USART
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define	CONFIG_USART_ID			ATMEL_ID_SYS
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
 

@@ -129,12 +131,13 @@
  * Initialized before u-boot gets started.
  */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
 #define CONFIG_SYS_SDRAM_SIZE		0x04000000 /* 64 megs */
 
 /* size in bytes reserved for initial data */
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 \
 					- GENERATED_GBL_DATA_SIZE)
+
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1

@@ -150,7 +153,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE	(1<<  22)
 #define CONFIG_SYS_NAND_MASK_CLE	(1<<  21)
--

1.7.1

Quoted 4 lines

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Since U-boot v2010.12 the support for the at91sam9261ek board is broken. This patch solves this issue. This change has been tested on this board.

Note: It requires that the 1st stage bootloader (like Atmel at91-bootstrap) to load U-boot at a different address compared to previous releases of U-boot due to conflicts in the BSS area during relocation. (0x23f00000 -> -0x20a00000)

Signed-off-by Remy Bohmer <[email protected]>

---
?V3: This patch applied to either mainstream or the u-boot-atmel branch ? ? It contains all changes required to make mainstream work again for ? ? this board.

include/configs/at91sam9261ek.h +11 -2

+/*
+ * WARNING:
+ * The initial boot program needs to be adapted such that it loads U-boot
+ * at the provided TEXT_BASE below. Note that the Atmel AT91-bootstrap loader
+ * might be configured such that it loads U-boot at 0x23f00000. But since
+ * U-boot is now being relocated to the end of RAM, this will result in a
+ * lockup during boot due to an overlap in the BSS segment. So, we choose a
+ * safe load adress to begin with, namely 0x20a00000
+ */
+#define CONFIG_SYS_TEXT_BASE		0x20a00000
+
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ		1000

include/configs/at91sam9261ek.h +6 -8

 #endif
+#define CONFIG_AT91FAMILY
+
+/* Misc CPU related */
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
-
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-/*
- * Hardware drivers
- */
-#define CONFIG_AT91_GPIO	1

include/configs/at91sam9261ek.h +1 -2

 #define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
+#define CONFIG_SYS_WHITE_ON_BLACK	1
 #define CONFIG_ATMEL_LCD		1
 #ifdef CONFIG_AT91SAM9261EK
 #define CONFIG_ATMEL_LCD_BGR555		1
 #else
-#define	CONFIG_AT91SAM9G10_LCD_BASE		0x23E00000	/* LCD is no more in SRAM */

include/configs/at91sam9261ek.h +42 -37

+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
-#define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
-#define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
+#define	CONFIG_RED_LED			AT91_PIN_PA23	/* the power led */
+#define	CONFIG_GREEN_LED		AT91_PIN_PA13	/* the user1 led */
+#define	CONFIG_YELLOW_LED		AT91_PIN_PA14	/* the user2 led */
 
-#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTDELAY		3
 
 /*
 * BOOTP options

@@ -101,21 +118,28 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
-#define CONFIG_CMD_PING		1
-#define CONFIG_CMD_DHCP		1
-#define CONFIG_CMD_NAND		1
-#define CONFIG_CMD_USB		1
+#define CONFIG_CMD_PING			1
+#define CONFIG_CMD_DHCP			1
+#define CONFIG_CMD_NAND			1
+#define CONFIG_CMD_USB			1
+#define CONFIG_CMD_CACHE		1
 
-/* SDRAM */
+/*
+ * SDRAM: 1 bank, 64 MB
+ * Initialized before u-boot gets started.
+ */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000 /* 64 megs */
 
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 \
+					- GENERATED_GBL_DATA_SIZE)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
-#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
+#define CONFIG_SYS_SPI_WRITE_TOUT	(5*CONFIG_SYS_HZ)
+#define CONFIG_SYS_MAX_DATAFLASH_BANKS	2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
 #define AT91_SPI_CLK			15000000

@@ -125,20 +149,18 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_BASE			0x40000000
-#define CONFIG_SYS_NAND_DBW_8			1
-/* our ALE is AD22 */
-#define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
-/* our CLE is AD21 */
-#define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
-#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1 << 22)
+#define CONFIG_SYS_NAND_MASK_CLE	(1 << 21)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC15
 
 #endif
 
 /* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH			1
+#define CONFIG_SYS_NO_FLASH		1
 
 /* Ethernet */
 #define CONFIG_NET_MULTI		1

@@ -155,21 +177,21 @@
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
+#define CONFIG_SYS_USB_OHCI_CPU_INIT	1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00500000	/* AT91SAM9261_UHP_BASE */
 #ifdef CONFIG_AT91SAM9G10EK
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9g10"
 #else
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9261"
 #endif
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
 #define CONFIG_CMD_FAT			1
 
-#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
+#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 

@@ -177,7 +199,7 @@
 #define CONFIG_ENV_IS_IN_DATAFLASH	1
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 #define CONFIG_ENV_OFFSET	0x4200
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_ADDR	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE		0x4200
 #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
 #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\

@@ -202,10 +224,10 @@
 #else /* CONFIG_SYS_USE_NANDFLASH */
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND		1
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
-#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
+#define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
 #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
 #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
 				"root=/dev/mtdblock5 "			\

@@ -216,22 +238,19 @@
 
 #endif
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_CMDLINE_EDITING		1
 

I saw your request for review and have some (little) comments which may be pointed out by Reinhard too.

Am 05.02.2011 um 13:43 schrieb Remy Bohmer:

Quoted 7 lines

Since U-boot v2010.12 the support for the at91sam9261ek board is broken. This patch solves this issue. This change has been tested on this board.

Note: It requires that the 1st stage bootloader (like Atmel at91-bootstrap) to load U-boot at a different address compared to previous releases of U-boot due to conflicts in the BSS area during relocation. (0x23f00000 -> -0x20a00000)

board/atmel/at91sam9261ek/Makefile

Quoted 21 lines

Signed-off-by Remy Bohmer<[email protected]>

---
V3: This patch applied to either mainstream or the u-boot-atmel branch
It contains all changes required to make mainstream work again for this board.

This patch can be pulled from:
git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek

board/atmel/at91sam9261ek/Makefile        |    6 +-
board/atmel/at91sam9261ek/at91sam9261ek.c |    7 +-
board/atmel/at91sam9261ek/config.mk       |    1 -
include/configs/at91sam9261ek.h           |  129 ++++++++++++++++------------
4 files changed, 81 insertions(+), 62 deletions(-)

delete mode 100644 board/atmel/at91sam9261ek/config.mk

board/atmel/at91sam9261ek/Makefile +0 -0

index 9d20ba0..3351493 100644

is OK

board/atmel/at91sam9261ek/at91sam9261ek.c

Quoted 4 lines

board/atmel/at91sam9261ek/at91sam9261ek.c +0 -0

index de5cfae..25c181e 100644

is OK

include/configs/at91sam9261ek.h line 30

Quoted 11 lines

board/atmel/at91sam9261ek/config.mk deleted +0 -0

deleted file mode 100644
index e554a45..0000000

include/configs/at91sam9261ek.h +0 -0

index 401478b..d601dad 100644
@@ -29,34 +29,42 @@
 
 #define CONFIG_AT91_LEGACY

will be removed in Patch 2/2, therefore OK

include/configs/at91sam9261ek.h line 41

Quoted 10 lines

include/configs/at91sam9261ek.h +10 -0

+/*
+ * WARNING:
+ * The initial boot program needs to be adapted such that it loads U-boot
+ * at the provided TEXT_BASE below. Note that the Atmel AT91-bootstrap loader
+ * might be configured such that it loads U-boot at 0x23f00000. But since
+ * U-boot is now being relocated to the end of RAM, this will result in a
+ * lockup during boot due to an overlap in the BSS segment. So, we choose a
+ * safe load adress to begin with, namely 0x20a00000
+ */
+#define CONFIG_SYS_TEXT_BASE		0x20a00000

Quoted 8 lines

include/configs/at91sam9261ek.h +4 -2

+
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
+#define CONFIG_SYS_HZ			1000
 

include/configs/at91sam9261ek.h line 53

Quoted 6 lines

include/configs/at91sam9261ek.h +1 -0

 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
+/* Define actual evaluation board type from used processor type */
 #ifdef CONFIG_AT91SAM9G10EK
 #define CONFIG_AT91SAM9G10	1	/* It's an Atmel AT91SAM9G10 SoC*/
 #else
 #define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/

do not define to '1' here

Quoted 20 lines

include/configs/at91sam9261ek.h +6 -8

 #endif
+#define CONFIG_AT91FAMILY
+
+/* Misc CPU related */
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
-
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-/*
- * Hardware drivers
- */
-#define CONFIG_AT91_GPIO	1

include/configs/at91sam9261ek.h line 70

Quoted 10 lines

include/configs/at91sam9261ek.h +2 -5

-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
 
 /* LCD */
 #define CONFIG_LCD			1

no '1' here

include/configs/at91sam9261ek.h line 74

Quoted 3 lines

include/configs/at91sam9261ek.h +0 -0

@@ -65,22 +73,31 @@
 #undef LCD_TEST_PATTERN
 #define CONFIG_LCD_INFO			1

no '1' here ... fix globally, only define to an numerical value if that value is used in code, see Reinhard's mail '[STATUS: AT91/AVR32]' point '1.'

Quoted 12 lines

include/configs/at91sam9261ek.h +2 -2

 #define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
+#define CONFIG_SYS_WHITE_ON_BLACK	1
 #define CONFIG_ATMEL_LCD		1
 #ifdef CONFIG_AT91SAM9261EK
 #define CONFIG_ATMEL_LCD_BGR555		1
 #else
-#define	CONFIG_AT91SAM9G10_LCD_BASE		0x23E00000	/* LCD is no more in SRAM */
+#define	CONFIG_AT91SAM9G10_LCD_BASE	0x23E00000 /* LCD is no more in SRAM */
 #endif
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 

include/configs/at91sam9261ek.h line 90

Quoted 6 lines

include/configs/at91sam9261ek.h +6 -0

+/* serial console */
+#define CONFIG_ATMEL_USART
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+#undef CONFIG_USART2
+#define CONFIG_USART3		1	/* USART 3 is DBGU */

do not undef not defiend values, fix '1'

Quoted 31 lines

include/configs/at91sam9261ek.h +12 -8

+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
-#define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
-#define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
+#define	CONFIG_RED_LED			AT91_PIN_PA23	/* the power led */
+#define	CONFIG_GREEN_LED		AT91_PIN_PA13	/* the user1 led */
+#define	CONFIG_YELLOW_LED		AT91_PIN_PA14	/* the user2 led */
 
-#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTDELAY		3
 
 /*
  * BOOTP options

@@ -101,21 +118,28 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
-#define CONFIG_CMD_PING		1
-#define CONFIG_CMD_DHCP		1
-#define CONFIG_CMD_NAND		1
-#define CONFIG_CMD_USB		1
+#define CONFIG_CMD_PING			1
+#define CONFIG_CMD_DHCP			1
+#define CONFIG_CMD_NAND			1
+#define CONFIG_CMD_USB			1
+#define CONFIG_CMD_CACHE		1
 

include/configs/at91sam9261ek.h line 133

Quoted 10 lines

include/configs/at91sam9261ek.h +6 -3

-/* SDRAM */
+/*
+ * SDRAM: 1 bank, 64 MB
+ * Initialized before u-boot gets started.
+ */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000 /* 64 megs */

include/configs/at91sam9261ek.h line 137

Quoted 4 lines

include/configs/at91sam9261ek.h +3 -0

+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 \
+					- GENERATED_GBL_DATA_SIZE)

Quoted 46 lines

include/configs/at91sam9261ek.h +11 -14

 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
-#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
+#define CONFIG_SYS_SPI_WRITE_TOUT	(5*CONFIG_SYS_HZ)
+#define CONFIG_SYS_MAX_DATAFLASH_BANKS	2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
 #define AT91_SPI_CLK			15000000

@@ -125,20 +149,18 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_BASE			0x40000000
-#define CONFIG_SYS_NAND_DBW_8			1
-/* our ALE is AD22 */
-#define CONFIG_SYS_NAND_MASK_ALE		(1<<  22)
-/* our CLE is AD21 */
-#define CONFIG_SYS_NAND_MASK_CLE		(1<<  21)
-#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1<<  22)
+#define CONFIG_SYS_NAND_MASK_CLE	(1<<  21)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC15
 
 #endif
 
 /* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH			1
+#define CONFIG_SYS_NO_FLASH		1
 
 /* Ethernet */
 #define CONFIG_NET_MULTI		1

@@ -155,21 +177,21 @@
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
+#define CONFIG_SYS_USB_OHCI_CPU_INIT	1

include/configs/at91sam9261ek.h line 186

Quoted 8 lines

include/configs/at91sam9261ek.h +3 -2

+#define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00500000	/* AT91SAM9261_UHP_BASE */
 #ifdef CONFIG_AT91SAM9G10EK
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9g10"
 #else
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9261"
 #endif

Quoted 56 lines

include/configs/at91sam9261ek.h +7 -10

 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
 #define CONFIG_CMD_FAT			1
 
-#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
+#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 

@@ -177,7 +199,7 @@
 #define CONFIG_ENV_IS_IN_DATAFLASH	1
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 #define CONFIG_ENV_OFFSET	0x4200
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_ADDR	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE		0x4200
 #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
 #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\

@@ -202,10 +224,10 @@
 #else /* CONFIG_SYS_USE_NANDFLASH */
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND		1
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
-#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
+#define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
 #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
 #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
 				"root=/dev/mtdblock5 "			\

@@ -216,22 +238,19 @@
 
 #endif
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot>  "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_CMDLINE_EDITING		1
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 

include/configs/at91sam9261ek.h line 256

Quoted 5 lines

include/configs/at91sam9261ek.h +1 -1

-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE		(32*1024) /* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported

please merge move of at91sam9261 to boards.cfg from Patch 2/2 here, this patch could IMHO still go into v2011.03; Patch 2/2 are changes for u-boot-atmel/rework2011xxx branch ... Reinhard do you agree?

Quoted 5 lines

Quoted 5 lines

+ * lockup during boot due to an overlap in the BSS segment. So, we choose a
+ * safe load adress to begin with, namely 0x20a00000
+ */
+#define CONFIG_SYS_TEXT_BASE ? ? ? ? ? 0x20a00000

I'd recommend setting this to the very beginning of SDRAM(0x20000000), note that initial SP and GD would be put into SRAM further down.

Quoted 7 lines

Quoted 7 lines

+/* Define actual evaluation board type from used processor type */ #ifdef CONFIG_AT91SAM9G10EK
#define CONFIG_AT91SAM9G10 ? ? ?1 ? ? ? /* It's an Atmel AT91SAM9G10 SoC*/
#else
#define CONFIG_AT91SAM9261 ? ? ?1 ? ? ? /* It's an Atmel AT91SAM9261 SoC*/

That looks to me the other way: its defining the processor type from the board type. If both boards are identical but for the processor, the processor
should be defined in boards.cfg, like it is for 9260/9xe-ek.

Quoted 6 lines

Review

Quoted 6 lines

#define CONFIG_NR_DRAM_BANKS ? ? ? ? ? ?1

(quoted diff) +0 -2

-#define PHYS_SDRAM ? ? ? ? ? ? ? ? ? ? 0x20000000
-#define PHYS_SDRAM_SIZE ? ? ? ? ? ? ? ? ? ? ? ?0x04000000 ? ? ?/* 64

megs */

(quoted diff) +2 -0

+#define CONFIG_SYS_SDRAM_BASE ? ? ? ? ?0x20000000
+#define CONFIG_SYS_SDRAM_SIZE ? ? ? ? ?0x04000000 /* 64 megs */

It is up to you, but (64 << 20) might look "nicer".

Quoted 5 lines

Quoted 5 lines

(quoted diff) +2 -0

+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_INIT_SP_ADDR ? ? ? ? ? ? ? ?(CONFIG_SYS_SDRAM_BASE +

0x1000 \
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - GENERATED_GBL_DATA_SIZE)

I've put that into SRAM, that facilitates future NOR flash boot variants where SDRAM
would be initialized by low level it...

Quoted 8 lines

Quoted 8 lines

AT91SAM9261_UHP_BASE */
#ifdef CONFIG_AT91SAM9G10EK

(quoted diff) +1 -1

-#define CONFIG_SYS_USB_OHCI_SLOT_NAME ? ? ? ? ?"at91sam9g10"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME ?"at91sam9g10"

#else

(quoted diff) +1 -1

-#define CONFIG_SYS_USB_OHCI_SLOT_NAME ? ? ? ? ?"at91sam9261"
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME ?"at91sam9261"

#endif

Could we not use "ATMEL_CPU_NAME" here? Its capitalized, but I assume that would not matter?

Quoted 4 lines

please merge move of at91sam9261 to boards.cfg from Patch 2/2 here, this patch could IMHO still go into v2011.03; Patch 2/2 are changes for u-boot-atmel/rework2011xxx branch ... Reinhard do you agree?

In theory, yes, it could be considered a "bug fix". But whats the point of this double effort? Its easier when
both patches are merged together and applied to top of rework.

Quoted 3 lines

I'd recommend setting this to the very beginning of SDRAM(0x20000000), note that initial SP and GD would be put into SRAM further down.

The SRAM is used by the LCD controller. So, we cannot use it for the SP and GD.

Quoted 3 lines

Quoted 1 line

Quoted 1 line

+#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs> */

It is up to you, but (64 << 20) might look "nicer".

This is more a matter of taste I think. I will see what I do with it.

Quoted 1 line

The SRAM is used by the LCD controller. So, we cannot use it for the SP and GD.

Why not?

LCD is most probably only initialized and used after relocation, while stack and GD are needed and used only before that...

Quoted 5 lines

Quoted 3 lines

Quoted 1 line

Quoted 1 line

+#define CONFIG_SYS_SDRAM_SIZE ? ? ? 0x04000000 /* 64 megs> ?*/

It is up to you, but (64 << 20) might look "nicer".

This is more a matter of taste I think. I will see what I do with it.

It's not only a matter of taste, but also a matter of readability.

If I see 0x04000000 I cannot really tell immediately if this is a bit mask or anything else, and even if I know from the context that it's a size, I cannot immediately say how much it is. ?On the other hand, a notation like "64 * 1024 * 1024" or (shorter) "64 << 20" makes it immediately clear that 1) it's some number, probably a size, and 2) that it's 64 MiB.

In the interest of maitainability please chose a more readable way to specify such numbers.