mst_fpga: correct irq level settings

PATCH In review Dmitry Eremin-Solenikov 2 participants 2 messages Feb 16, 2011 – Feb 25, 2011

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Dmitry Eremin-Solenikov

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2011-02-16 13:23 UTC #0 lore raw

PATCH 1/1 mst_fpga: correct irq level settings

Final corrections for IRQ levels that are set by mst_fpga:

* Don't retranslate IRQ if previously IRQ was masked.
* After setting or clearing IRQs through register, apply mask before setting parent IRQ level.

Signed-off-by Dmitry Eremin-Solenikov <[email protected]>

---
 hw/mst_fpga.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

hw/mst_fpga.c +2 -2

index afed2ac..407bac9 100644
@@ -50,7 +50,7 @@ static void
 mst_fpga_set_irq(void *opaque, int irq, int level)
 {
 	mst_irq_state *s = (mst_irq_state *)opaque;
-	uint32_t oldint = s->intsetclr;
+	uint32_t oldint = s->intsetclr & s->intmskena;
 
 	if (level)
 		s->prev_level |= 1u << irq;

@@ -139,7 +139,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
 		break;
 	case MST_INTSETCLR:	/* clear or set interrupt */
 		s->intsetclr = (value & 0xFEEFF);
-		qemu_set_irq(s->parent, s->intsetclr);
+		qemu_set_irq(s->parent, s->intsetclr & s->intmskena);
 		break;
 	case MST_PCMCIA0:
 		s->pcmcia0 = value;

Signature · 1 line

1.7.2.3

andrzej zaborowski

2011-02-25 08:30 UTC #1 lore raw

Quoted 5 lines · Dmitry Eremin-Solenikov

Final corrections for IRQ levels that are set by mst_fpga:
* Don't retranslate IRQ if previously IRQ was masked.
* After setting or clearing IRQs through register, apply mask before setting parent IRQ level.

Thanks, applied this change. However now to have a completely correct behaviour, I think we need something like the following, what do you think? (prev_level is now unused, but the main change is not masking 1u << irq)

hw/mst_fpga.c +3 ~~-10~~

index 407bac9..f66de69 100644
@@ -31,7 +31,6 @@ typedef struct mst_irq_state{
 
        qemu_irq parent;
 
-       uint32_t prev_level;
        uint32_t leddat1;
        uint32_t leddat2;
        uint32_t ledctrl;

@@ -53,11 +52,6 @@ mst_fpga_set_irq(void *opaque, int irq, int level)
        uint32_t oldint = s->intsetclr & s->intmskena;
 
        if (level)
-               s->prev_level |= 1u << irq;
-       else
-               s->prev_level &= ~(1u << irq);
-
-       if ((s->intmskena & (1u << irq)) && level)
                s->intsetclr |= 1u << irq;
 
        if (oldint != (s->intsetclr & s->intmskena))

@@ -193,12 +187,11 @@ static int mst_fpga_init(SysBusDevice *dev)
 
 static VMStateDescription vmstate_mst_fpga_regs = {
        .name = "mainstone_fpga",
-       .version_id = 0,
-       .minimum_version_id = 0,
-       .minimum_version_id_old = 0,
+       .version_id = 1,
+       .minimum_version_id = 1,
+       .minimum_version_id_old = 1,
        .post_load = mst_fpga_post_load,
        .fields = (VMStateField []) {
-               VMSTATE_UINT32(prev_level, mst_irq_state),
                VMSTATE_UINT32(leddat1, mst_irq_state),
                VMSTATE_UINT32(leddat2, mst_irq_state),
                VMSTATE_UINT32(ledctrl, mst_irq_state),

Cheers