Tegra EHCI driver
Subsystems (5)
v4 cover Tegra EHCI driver
This patch series adds support for EHCI compliant USB host controllers found in Tegra SoCs. The EHCI driver depends on the Tegra PHY configuration interface that is used by both tegra ehci driver and gadget driver. Tested on 2.6.38rc4.
v2 changes:
* Add ulpi_viewport.c for controllers with a viewport register
* Update tegra usb_phy interface
* Remove tegra_ehci_reset and use ehci_reset or tdi_reset instead
* Select USB_ARCH_HAS_EHCI in tegra/Kconfig instead of usb/Kconfig
v3 changes:
* Remove remaining Change-Id from commit messages
v4 change:
* Fix GPL headers
* Remove CONFIG_ULPI_VIEWPORT prompt, fix ulpi_viewport_wait
Benoit Goby (3):
usb: otg: Add ulpi viewport access ops
ARM: tegra: Add support for Tegra USB PHYs
usb: host: Add EHCI driver for NVIDIA Tegra SoCs
Robert Morell (1):
USB: ehci: tegra: Align DMA transfers to 32 bytes
arch/arm/mach-tegra/Kconfig | 3 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/include/mach/usb_phy.h | 86 +++ arch/arm/mach-tegra/usb_phy.c | 795 ++++++++++++++++++++++++++++ drivers/usb/host/Kconfig | 8 + drivers/usb/host/ehci-hcd.c | 5 + drivers/usb/host/ehci-tegra.c | 717 +++++++++++++++++++++++++ drivers/usb/otg/Kconfig | 7 + drivers/usb/otg/Makefile | 1 + drivers/usb/otg/ulpi_viewport.c | 77 +++ include/linux/tegra_usb.h | 31 ++ include/linux/usb/ulpi.h | 5 + 12 files changed, 1736 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/include/mach/usb_phy.h create mode 100644 arch/arm/mach-tegra/usb_phy.c create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 drivers/usb/otg/ulpi_viewport.c create mode 100644 include/linux/tegra_usb.h
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PATCH v4 1/4 usb: otg: Add ulpi viewport access ops
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
--- drivers/usb/otg/Kconfig | 7 ++++ drivers/usb/otg/Makefile | 1 + drivers/usb/otg/ulpi_viewport.c | 77 +++++++++++++++++++++++++++++++++++++++ include/linux/usb/ulpi.h | 5 +++ 4 files changed, 90 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/otg/ulpi_viewport.c
drivers/usb/otg/Kconfig +7 -0
@@ -49,6 +49,13 @@ config USB_ULPI Enable this to support ULPI connected USB OTG transceivers which are likely found on embedded boards. +config USB_ULPI_VIEWPORT + bool + depends on USB_ULPI + help + Provides read/write operations to the ULPI phy register set for + controllers with a viewport register (e.g. Chipidea/ARC controllers). + config TWL4030_USB tristate "TWL4030 USB Transceiver Driver" depends on TWL4030_CORE && REGULATOR_TWL4030
drivers/usb/otg/Makefile +1 -0
@@ -16,5 +16,6 @@ obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o obj-$(CONFIG_USB_ULPI) += ulpi.o +obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o obj-$(CONFIG_USB_MSM_OTG_72K) += msm72k_otg.o obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
drivers/usb/otg/ulpi_viewport.c new file +77 -0
77 lines not on this page · raw message
include/linux/usb/ulpi.h +5 -0
@@ -184,4 +184,9 @@struct otg_transceiver *otg_ulpi_create (struct otg_io_access_ops *ops,unsigned int flags); +#ifdef CONFIG_USB_ULPI_VIEWPORT +/* access ops for controllers with a viewport register */ +extern struct otg_io_access_ops ulpi_viewport_access_ops; +#endif +#endif /* __LINUX_USB_ULPI_H */
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Hi,
Quoted 2 lines · Benoit Goby
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
I can see mxc, msm and langwell are using the same bits (or at least some of them).
Is there some kind of specification for this ulpi viewport register? Where can we find it?
Or else, why do you call it generic?
Some minor neats below.
Quoted 61 lines
Signed-off-by Benoit Goby <[email protected]>--- drivers/usb/otg/Kconfig | 7 ++++ drivers/usb/otg/Makefile | 1 + drivers/usb/otg/ulpi_viewport.c | 77 +++++++++++++++++++++++++++++++++++++++ include/linux/usb/ulpi.h | 5 +++ 4 files changed, 90 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/otg/ulpi_viewport.cdrivers/usb/otg/Kconfig +7
-0@@ -49,6 +49,13 @@ config USB_ULPI Enable this to support ULPI connected USB OTG transceivers which are likely found on embedded boards. +config USB_ULPI_VIEWPORT + bool + depends on USB_ULPI + help + Provides read/write operations to the ULPI phy register set for + controllers with a viewport register (e.g. Chipidea/ARC controllers). + config TWL4030_USB tristate "TWL4030 USB Transceiver Driver" depends on TWL4030_CORE && REGULATOR_TWL4030drivers/usb/otg/Makefile +1
-0@@ -16,5 +16,6 @@ obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o obj-$(CONFIG_USB_ULPI) += ulpi.o +obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o obj-$(CONFIG_USB_MSM_OTG_72K) += msm72k_otg.o obj-$(CONFIG_AB8500_USB) += ab8500-usb.odrivers/usb/otg/ulpi_viewport.c new file +17
-0@@ -0,0 +1,77 @@ +/* +* Copyright (C) 2011 Google, Inc. +* +* This software is licensed under the terms of the GNU General Public +* License version 2, as published by the Free Software Foundation, and +* may be copied, distributed, and modified under those terms. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +#include <linux/kernel.h> +#include <linux/usb.h> +#include <linux/io.h>
drivers/usb/otg/ulpi_viewport.c line 27
Quoted 10 lines
drivers/usb/otg/ulpi_viewport.c new file +10
-0+#include <linux/usb/otg.h> +#include <linux/usb/ulpi.h> + +#define ULPI_VIEW_WAKEUP (1 << 31) +#define ULPI_VIEW_RUN (1 << 30) +#define ULPI_VIEW_WRITE (1 << 29) +#define ULPI_VIEW_READ (0 << 29) +#define ULPI_VIEW_ADDR (x) (((x) & 0xff) << 16) +#define ULPI_VIEW_DATA_READ (x) (((x) >> 8) & 0xff) +#define ULPI_VIEW_DATA_WRITE (x) (((x) & 0xff) << 0)
Please, remove this "zero shift", I don't think it serves any good cause.
drivers/usb/otg/ulpi_viewport.c line 34
Quoted 7 lines
drivers/usb/otg/ulpi_viewport.c new file +7
-0+ +static int ulpi_viewport_wait (void __iomem *view,u32 mask,u32 result) +{ +unsigned long usec =2000 ; + +while (usec--) { +if ((readl (view) & mask) == result)
You always send 0 in the result variable.
Can't the result variable be dropped by:
if (!(readl(view) & mask))
return 0;
or:
if (readl(view) & mask != mask)
return 0;
drivers/usb/otg/ulpi_viewport.c line 35
Quoted 1 line
drivers/usb/otg/ulpi_viewport.c new file +1
-0+return 0 ;
Empty line here would be nice.
drivers/usb/otg/ulpi_viewport.c line 37
Quoted 2 lines
drivers/usb/otg/ulpi_viewport.c new file +2
-0+udelay (1 ); + };
same here
Quoted 23 lines
drivers/usb/otg/ulpi_viewport.c new file +23
-0+return -ETIMEDOUT ; +} + +static int ulpi_viewport_read (struct otg_transceiver *otg,u32 reg) +{ +int ret; +void __iomem *view = otg->io_priv; + +writel (ULPI_VIEW_WAKEUP |ULPI_VIEW_WRITE , view); + ret =ulpi_viewport_wait (view,ULPI_VIEW_WAKEUP ,0 ); +if (ret) +return ret; + +writel (ULPI_VIEW_RUN |ULPI_VIEW_READ |ULPI_VIEW_ADDR (reg), view); + ret =ulpi_viewport_wait (view,ULPI_VIEW_RUN ,0 ); +if (ret) +return ret; + +return ULPI_VIEW_DATA_READ (readl (view)); +} + +static int ulpi_viewport_write (struct otg_transceiver *otg,u32 val,u32 reg) +{
drivers/usb/otg/ulpi_viewport.c line 70
Quoted 10 lines
drivers/usb/otg/ulpi_viewport.c new file +10
-0+int ret; +void __iomem *view = otg->io_priv; + +writel (ULPI_VIEW_WAKEUP |ULPI_VIEW_WRITE , view); + ret =ulpi_viewport_wait (view,ULPI_VIEW_WAKEUP ,0 ); +if (ret) +return ret; + +writel (ULPI_VIEW_RUN |ULPI_VIEW_WRITE |ULPI_VIEW_DATA_WRITE (val) | +ULPI_VIEW_ADDR (reg), view);
and here
Quoted 21 lines
drivers/usb/otg/ulpi_viewport.c new file +7
-0+return ulpi_viewport_wait (view,ULPI_VIEW_RUN ,0 ); +} + +struct otg_io_access_ops ulpi_viewport_access_ops = { + .read = ulpi_viewport_read, + .write = ulpi_viewport_write, +};include/linux/usb/ulpi.h +5
-0@@ -184,4 +184,9 @@struct otg_transceiver *otg_ulpi_create (struct otg_io_access_ops *ops,unsigned int flags); +#ifdef CONFIG_USB_ULPI_VIEWPORT +/* access ops for controllers with a viewport register */ +extern struct otg_io_access_ops ulpi_viewport_access_ops; +#endif +#endif /* __LINUX_USB_ULPI_H */
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Hi,
Quoted 8 lines · Igor Grinberg
Hi,
Quoted 2 lines · Benoit Goby
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
I can see mxc, msm and langwell are using the same bits (or at least some of them).
They all use the Chipidea/ARC usb controllers.
Quoted 1 line
Is there some kind of specification for this ulpi viewport register?
You can find the Chipidea/ARC datasheet in IMX35 datasheet ( got 0x0170
ULPI VIEWPORT) or a newer version (extra fields in some registers but
miss 0x168-0x170) in
http://www.nxp.com/documents/user_manual/UM10314.pdf
Matthieu
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Hi,
Quoted 5 lines · Matthieu CASTET
Hi,
Quoted 2 lines · Igor Grinberg
Hi,
Quoted 7 lines
Quoted 6 lines · Benoit Goby
Quoted 2 lines
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
I can see mxc, msm and langwell are using the same bits (or at least some of them).
They all use the Chipidea/ARC usb controllers.
This means, that it is not generic, but Chipidea/ARC usb controller specific. And it is common to some/many platforms.
Can it be utilized on platforms that have another kind of ulpi access register?
May be, by allowing a platform to pass some platform data, that "describes" the ulpi access register and have this driver handle it?
Or is it too complicated for now?
Quoted 4 lines
Quoted 2 lines
Is there some kind of specification for this ulpi viewport register?
You can find the Chipidea/ARC datasheet in IMX35 datasheet ( got
0x0170ULPI VIEWPORT) or a newer version (extra fields in some registers but miss 0x168-0x170) in
http://www.nxp.com/documents/user_manual/UM10314.pdf
I don't have the IMX35 datasheet which describes the USB OTG registers. The one that can be downloaded from Freescale website, only describes hardware and no ULPI viewport is mentioned there.
NXP's LPC3130/31 uses UTMI and therefore does not have the view port register(s) documented.
Are there any public versions of documents describing the ulpi viewport? Quick googling haven't got me any.
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Quoted 10 lines · Igor Grinberg
Hi,
Quoted 6 lines · Matthieu CASTET
Hi,
Quoted 3 lines · Igor Grinberg
Hi,
On 02/18/11 05:42, Benoit Goby wrote:
Quoted 8 lines
Quoted 5 lines
Quoted 4 lines
Quoted 2 lines
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
I can see mxc, msm and langwell are using the same bits (or at least some of them).
They all use the Chipidea/ARC usb controllers.
This means, that it is not generic, but Chipidea/ARC usb controller specific. And it is common to some/many platforms.
Yes
Quoted 2 lines
Can it be utilized on platforms that have another kind of ulpi access register?
I don't think so
Quoted 8 lines
Quoted 4 lines
Quoted 2 lines
Is there some kind of specification for this ulpi viewport register?
You can find the Chipidea/ARC datasheet in IMX35 datasheet ( got
0x0170ULPI VIEWPORT) or a newer version (extra fields in some registers but miss 0x168-0x170) in
http://www.nxp.com/documents/user_manual/UM10314.pdfI don't have the IMX35 datasheet which describes the USB OTG registers. The one that can be downloaded from Freescale website, only describes hardware and no ULPI viewport is mentioned there.
From freescale.com I manage to download IMX35RM.pdf witch describe it (p2075).
Matthieu
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Hi,
Quoted 15 lines · Matthieu CASTET
Quoted 14 lines · Igor Grinberg
Hi,
Quoted 10 lines · Matthieu CASTET
Hi,
Quoted 7 lines · Igor Grinberg
Hi,
Quoted 2 lines · Benoit Goby
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
I can see mxc, msm and langwell are using the same bits (or at least some of them).
Quoted 8 lines
Quoted 4 lines
Quoted 1 line
They all use the Chipidea/ARC usb controllers.
This means, that it is not generic, but Chipidea/ARC usb controller specific. And it is common to some/many platforms.
Yes
Quoted 2 lines
Can it be utilized on platforms that have another kind of ulpi access register?
I don't think so
I've looked into the IMX Reference Manual regarding the ulpi viewport register and it looks like these access ops can be utilized on another kind of ulpi access registers, as the same features are available in most (if not all) of ulpi access registers, whether they are called viewport or otherwise.
This will require much more thinking and may be the right solution would be multiple access ops files (e.g. drivers/usb/otg/ulpi_...port.c).
So for now, this patch is a good stuff to start from.
Benoit,
can you, please, address comments in my first reply?
Thanks.
Quoted 10 lines
Quoted 9 lines
Quoted 5 lines
Quoted 3 lines
Is there some kind of specification for this ulpi viewport register?
You can find the Chipidea/ARC datasheet in IMX35 datasheet ( got
0x0170ULPI VIEWPORT) or a newer version (extra fields in some registers but miss 0x168-0x170) in
http://www.nxp.com/documents/user_manual/UM10314.pdfI don't have the IMX35 datasheet which describes the USB OTG registers. The one that can be downloaded from Freescale website, only describes hardware and no ULPI viewport is mentioned there.
From freescale.com I manage to download IMX35RM.pdf witch describe it (p2075).
Found it. Thanks.
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Re: [PATCH v4 1/4] usb: otg: Add ulpi viewport access ops
Quoted 11 lines · Igor Grinberg
I've looked into the IMX Reference Manual regarding the ulpi viewport register and it looks like these access ops can be utilized on another kind of ulpi access registers, as the same features are available in most (if not all) of ulpi access registers, whether they are called viewport or otherwise.
This will require much more thinking and may be the right solution would be multiple access ops files (e.g.drivers/usb/otg/ulpi_...port.c).
So for now, this patch is a good stuff to start from.Benoit,
can you, please, address comments in my first reply?
Hi Igor,
Yes I fixed them.
I will send a new version of the patch.
Thanks,
Benoit
Quoted 3 lines
Thanks.
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PATCH v4 2/4 ARM: tegra: Add support for Tegra USB PHYs
In reply to a message not in the archiveInterface used by Tegra's gadget driver and ehci driver to power on and configure the USB PHYs.
--- arch/arm/mach-tegra/Kconfig | 3 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/include/mach/usb_phy.h | 86 +++ arch/arm/mach-tegra/usb_phy.c | 795 ++++++++++++++++++++++++++++ 4 files changed, 885 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/include/mach/usb_phy.h create mode 100644 arch/arm/mach-tegra/usb_phy.c
arch/arm/mach-tegra/Kconfig +3 -0
@@ -10,6 +10,9 @@ config ARCH_TEGRA_2x_SOC select CPU_V7 select ARM_GIC select ARCH_REQUIRE_GPIOLIB + select USB_ARCH_HAS_EHCI if USB_SUPPORT + select USB_ULPI if USB_SUPPORT + select USB_ULPI_VIEWPORT if USB_SUPPORT help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
arch/arm/mach-tegra/Makefile +1 -0
@@ -15,6 +15,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-$(CONFIG_TEGRA_PCI) += pcie.o +obj-$(CONFIG_USB_SUPPORT) += usb_phy.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
arch/arm/mach-tegra/include/mach/usb_phy.h new file +86 -0
86 lines not on this page · raw message
arch/arm/mach-tegra/usb_phy.c new file +795 -0
795 lines not on this page · raw message
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PATCH v4 3/4 usb: host: Add EHCI driver for NVIDIA Tegra SoCs
In reply to a message not in the archiveThe Tegra 2 SoC has 3 EHCI compatible USB controllers. This patch adds the necessary glue to allow the ehci-hcd driver to work on Tegra 2 SoCs.
The platform data is used to configure board-specific phy settings and to configure the operating mode, as usb1 and usb3 may be used as a otg port. For additional power saving, the driver supports powering down the phy on bus suspend when it is used, for example, to connect an internal device that use an out-of-band remote wakeup mechanism (e.g. a gpio).
--- drivers/usb/host/Kconfig | 8 + drivers/usb/host/ehci-hcd.c | 5 + drivers/usb/host/ehci-tegra.c | 627 +++++++++++++++++++++++++++++++++++++++++ include/linux/tegra_usb.h | 31 ++ 4 files changed, 671 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 include/linux/tegra_usb.h
drivers/usb/host/Kconfig +8 -0
@@ -154,6 +154,14 @@ config USB_EHCI_MSM This driver is not supported on boards like trout which has an external PHY. +config USB_EHCI_TEGRA + boolean "NVIDIA Tegra HCD support" + depends on USB_EHCI_HCD && ARCH_TEGRA + select USB_EHCI_ROOT_HUB_TT + help + This driver enables support for the internal USB Host Controller + found in NVIDIA Tegra SoCs. The Tegra controller is EHCI compliant. + config USB_EHCI_HCD_PPC_OF bool "EHCI support for PPC USB controller on OF platform bus" depends on USB_EHCI_HCD && PPC_OF
drivers/usb/host/ehci-hcd.c +5 -0
@@ -1259,6 +1259,11 @@ MODULE_LICENSE ("GPL");#define PLATFORM_DRIVER ehci_msm_driver#endif +#ifdef CONFIG_USB_EHCI_TEGRA +#include "ehci-tegra.c" +#define PLATFORM_DRIVER tegra_ehci_driver +#endif +#if !defined(PCI_DRIVER ) && !defined(PLATFORM_DRIVER ) && \ !defined(PS3_SYSTEM_BUS_DRIVER ) && !defined(OF_PLATFORM_DRIVER ) && \ !defined(XILINX_OF_PLATFORM_DRIVER )
drivers/usb/host/ehci-tegra.c new file +627 -0
627 lines not on this page · raw message
include/linux/tegra_usb.h new file +31 -0
@@ -0,0 +1,31 @@ +/* +* Copyright (C) 2010 Google, Inc. +* +* This software is licensed under the terms of the GNU General Public +* License version 2, as published by the Free Software Foundation, and +* may be copied, distributed, and modified under those terms. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +#ifndef _TEGRA_USB_H_ +#define _TEGRA_USB_H_ + +enum tegra_usb_operating_modes { +TEGRA_USB_DEVICE , +TEGRA_USB_HOST , +TEGRA_USB_OTG , +}; + +struct tegra_ehci_platform_data { +enum tegra_usb_operating_modes operating_mode; +/* power down the phy on bus suspend */ +int power_down_on_bus_suspend; +void *phy_config; +}; + +#endif /* _TEGRA_USB_H_ */
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PATCH v4 4/4 USB: ehci: tegra: Align DMA transfers to 32 bytes
In reply to a message not in the archiveFrom: Robert Morell <[email protected]>
The Tegra2 USB controller doesn't properly deal with misaligned DMA buffers, causing corruption. This is especially prevalent with USB network adapters, where skbuff alignment is often in the middle of a 4-byte dword.
To avoid this, allocate a temporary buffer for the DMA if the provided buffer isn't sufficiently aligned.
--- drivers/usb/host/ehci-tegra.c | 90 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 90 insertions(+), 0 deletions(-)
drivers/usb/host/ehci-tegra.c +90 -0
@@ -25,6 +25,8 @@#define TEGRA_USB_PORTSC1_PTC (x) (((x) & 0xf) << 16) +#define TEGRA_USB_DMA_ALIGN 32 +struct tegra_ehci_hcd {struct ehci_hcd *ehci;struct tegra_usb_phy *phy;
@@ -385,6 +387,92 @@ static int tegra_ehci_bus_resume(struct usb_hcd *hcd) }#endif +struct temp_buffer { +void *kmalloc_ptr; +void *old_xfer_buffer; +u8 data[0 ]; +}; + +static void free_temp_buffer (struct urb *urb) +{ +enum dma_data_direction dir; +struct temp_buffer *temp; + +if (!(urb->transfer_flags &URB_ALIGNED_TEMP_BUFFER )) +return ; + + dir =usb_urb_dir_in (urb) ?DMA_FROM_DEVICE :DMA_TO_DEVICE ; + + temp = container_of(urb->transfer_buffer, struct temp_buffer, + data); + +if (dir ==DMA_FROM_DEVICE ) +memcpy (temp->old_xfer_buffer, temp->data, + urb->transfer_buffer_length); + urb->transfer_buffer = temp->old_xfer_buffer; +kfree (temp->kmalloc_ptr); + + urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER ; +} + +static int alloc_temp_buffer (struct urb *urb,gfp_t mem_flags) +{ +enum dma_data_direction dir; +struct temp_buffer *temp, *kmalloc_ptr; +size_t kmalloc_size; + +if (urb->num_sgs || urb->sg || + urb->transfer_buffer_length ==0 || + !((uintptr_t )urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN -1 ))) +return 0 ; + + dir =usb_urb_dir_in (urb) ?DMA_FROM_DEVICE :DMA_TO_DEVICE ; + +/* Allocate a buffer with enough padding for alignment */ + kmalloc_size = urb->transfer_buffer_length + +sizeof (struct temp_buffer ) +TEGRA_USB_DMA_ALIGN -1 ; + + kmalloc_ptr =kmalloc (kmalloc_size, mem_flags); +if (!kmalloc_ptr) +return -ENOMEM ; + +/* Position our struct temp_buffer such that data is aligned */ + temp =PTR_ALIGN (kmalloc_ptr +1 ,TEGRA_USB_DMA_ALIGN ) -1 ; + + temp->kmalloc_ptr = kmalloc_ptr; + temp->old_xfer_buffer = urb->transfer_buffer; +if (dir ==DMA_TO_DEVICE ) +memcpy (temp->data, urb->transfer_buffer, + urb->transfer_buffer_length); + urb->transfer_buffer = temp->data; + + urb->transfer_flags |=URB_ALIGNED_TEMP_BUFFER ; + +return 0 ; +} + +static int tegra_ehci_map_urb_for_dma (struct usb_hcd *hcd,struct urb *urb, +gfp_t mem_flags) +{ +int ret; + + ret =alloc_temp_buffer (urb, mem_flags); +if (ret) +return ret; + + ret =usb_hcd_map_urb_for_dma (hcd, urb, mem_flags); +if (ret) +free_temp_buffer (urb); + +return ret; +} + +static void tegra_ehci_unmap_urb_for_dma (struct usb_hcd *hcd,struct urb *urb) +{ +usb_hcd_unmap_urb_for_dma (hcd, urb); +free_temp_buffer (urb); +} +static const struct hc_driver tegra_ehci_hc_driver = { .description = hcd_name, .product_desc ="Tegra EHCI Host Controller" ,
@@ -400,6 +488,8 @@ static const struct hc_driver tegra_ehci_hc_driver = { .shutdown = tegra_ehci_shutdown, .urb_enqueue = ehci_urb_enqueue, .urb_dequeue = ehci_urb_dequeue, + .map_urb_for_dma = tegra_ehci_map_urb_for_dma, + .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, .endpoint_disable = ehci_endpoint_disable, .endpoint_reset = ehci_endpoint_reset, .get_frame_number = ehci_get_frame,
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