amd64_edac: Small fixlets
Subsystems (2)
cover amd64_edac: Small fixlets
From: Borislav Petkov <[email protected]>
Hi all,
the following fixes address small issues caught when building amd64_edac.c the with 'make W=1' switch¹. They'll land ontop the patchset at http://marc.info/?l=linux-kernel&m=129735813831174&w=2 if there are no objections.
Thanks.
PATCH 1/8 amd64_edac: Drop redundant declarations
From: Borislav Petkov <[email protected]>
Those were moved to the mce_amd.h header.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.h | 8 -------- 1 files changed, 0 insertions(+), 8 deletions(-)
drivers/edac/amd64_edac.h +0 -8
@@ -409,14 +409,6 @@ struct ecc_settings { } flags; }; -extern const char *tt_msgs[4 ]; -extern const char *ll_msgs[4 ]; -extern const char *rrrr_msgs[16 ]; -extern const char *to_msgs[2 ]; -extern const char *pp_msgs[4 ]; -extern const char *ii_msgs[4 ]; -extern const char *htlink_msgs[8 ]; -#ifdef CONFIG_EDAC_DEBUG #define NUM_DBG_ATTRS 5#else
Signature · 1 line
1.7.4.rc2
PATCH 2/8 amd64_edac: Fix node id signedness
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
A node id can never be negative since we use it as an index into the DRAM ranges array. This also makes one of the BUG_ON conditions redundant.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 16 +++++++++------- drivers/edac/amd64_edac.h | 4 ++-- 2 files changed, 11 insertions(+), 9 deletions(-)
drivers/edac/amd64_edac.c +9 -7
@@ -226,7 +226,8 @@ static int amd64_get_scrub_rate(struct mem_ctl_info *mci)* returns true if the SysAddr given by sys_addr matches the * DRAM base/limit associated with node_id */ -static bool amd64_base_limit_match (struct amd64_pvt *pvt,u64 sys_addr,int nid) +static bool amd64_base_limit_match (struct amd64_pvt *pvt,u64 sys_addr, +unsigned nid) {u64 addr;
@@ -252,7 +253,7 @@ static struct mem_ctl_info *find_mc_by_sys_addr(struct mem_ctl_info *mci, u64 sys_addr) {struct amd64_pvt *pvt; -int node_id; +unsigned node_id;u32 intlv_en, bits;/*
@@ -302,7 +303,7 @@ static struct mem_ctl_info *find_mc_by_sys_addr(struct mem_ctl_info *mci, } found: -return edac_mc_find (node_id); +return edac_mc_find ((int )node_id); err_no_match: debugf2("sys_addr 0x%lx doesn't match any node\n",
@@ -602,7 +603,7 @@ static u64 sys_addr_to_input_addr(struct mem_ctl_info *mci, u64 sys_addr)static u64 input_addr_to_dram_addr (struct mem_ctl_info *mci,u64 input_addr) {struct amd64_pvt *pvt; -int node_id, intlv_shift; +unsigned node_id, intlv_shift;u64 bits, dram_addr;u32 intlv_sel;
@@ -616,7 +617,8 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr)*/ pvt = mci->pvt_info; node_id = pvt->mc_node_id; -BUG_ON ((node_id <0 ) || (node_id >7 )); + +BUG_ON (node_id >7 ); intlv_shift =num_node_interleave_bits (dram_intlv_en (pvt,0 ));
@@ -2147,7 +2149,7 @@ static int init_csrows(struct mem_ctl_info *mci) }/* get all cores on this DCT */ -static void get_cpus_on_this_dct_cpumask (struct cpumask *mask,int nid) +static void get_cpus_on_this_dct_cpumask (struct cpumask *mask,unsigned nid) {int cpu;
@@ -2157,7 +2159,7 @@ static void get_cpus_on_this_dct_cpumask(struct cpumask *mask, int nid) }/* check MCG_CTL on all the cpus on this node */ -static bool amd64_nb_mce_bank_enabled_on_node (int nid) +static bool amd64_nb_mce_bank_enabled_on_node (unsigned nid) {cpumask_var_t mask;int cpu, nbe;
drivers/edac/amd64_edac.h +2 -2
@@ -288,7 +288,7 @@#define MSR_MCGCTL_NBE BIT(4)/* AMD sets the first MC device at device ID 0x18. */ -static inline int get_node_id (struct pci_dev *pdev) +static inline u8 get_node_id (struct pci_dev *pdev) {return PCI_SLOT (pdev->devfn) -0x18 ; }
@@ -335,7 +335,7 @@ struct amd64_pvt {/* pci_device handles which we utilize */ struct pci_dev *F1 , *F2 , *F3 ; -int mc_node_id;/* MC index of this MC node */ +unsigned mc_node_id;/* MC index of this MC node */ int ext_model;/* extended model value of this node */ int channel_count;
Signature · 1 line
1.7.4.rc2
PATCH 3/8 amd64_edac: Fix DRAM base macros
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
Return unsigned u8 values only.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 3 +-- drivers/edac/amd64_edac.h | 8 ++++---- 2 files changed, 5 insertions(+), 6 deletions(-)
drivers/edac/amd64_edac.c +1 -2
@@ -621,7 +621,6 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr)BUG_ON (node_id >7 ); intlv_shift =num_node_interleave_bits (dram_intlv_en (pvt,0 )); -if (intlv_shift ==0 ) {debugf1 (" InputAddr 0x%lx translates to DramAddr of " "same value\n" , (unsigned long )input_addr);
@@ -1192,7 +1191,7 @@ static void read_dram_ctl_register(struct amd64_pvt *pvt)static u8 f1x_determine_channel (struct amd64_pvt *pvt,u64 sys_addr,bool hi_range_sel,u8 intlv_en) { -u32 dct_sel_high = (pvt->dct_sel_lo >>1 ) &1 ; +u8 dct_sel_high = (pvt->dct_sel_lo >>1 ) &1 ;if (dct_ganging_enabled (pvt))return 0 ;
drivers/edac/amd64_edac.h +4 -4
@@ -180,10 +180,10 @@#define DRAM_BASE_LO 0x40#define DRAM_LIMIT_LO 0x44 -#define dram_intlv_en (pvt, i) ((pvt->ranges[i].base.lo >> 8) & 0x7) -#define dram_rw (pvt, i) (pvt->ranges[i].base.lo & 0x3) -#define dram_intlv_sel (pvt, i) ((pvt->ranges[i].lim.lo >> 8) & 0x7) -#define dram_dst_node (pvt, i) (pvt->ranges[i].lim.lo & 0x7) +#define dram_intlv_en (pvt, i) ((u8)((pvt->ranges[i].base.lo >> 8) & 0x7)) +#define dram_rw (pvt, i) ((u8)(pvt->ranges[i].base.lo & 0x3)) +#define dram_intlv_sel (pvt, i) ((u8)((pvt->ranges[i].lim.lo >> 8) & 0x7)) +#define dram_dst_node (pvt, i) ((u8)(pvt->ranges[i].lim.lo & 0x7))#define DHAR 0xf0#define dhar_valid (pvt) ((pvt)->dhar & BIT(0))
Signature · 1 line
1.7.4.rc2
PATCH 4/8 amd64_edac: Fix PCI config addressing types
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
Adjust argument types to the PCI config API's types.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-)
drivers/edac/amd64_edac.c +5 -5
@@ -856,8 +856,8 @@ static void read_dct_base_mask(struct amd64_pvt *pvt)prep_chip_selects (pvt);for_each_chip_select (cs,0 , pvt) { -u32 reg0 =DCSB0 + (cs *4 ); -u32 reg1 =DCSB1 + (cs *4 ); +int reg0 =DCSB0 + (cs *4 ); +int reg1 =DCSB1 + (cs *4 );u32 *base0 = &pvt->csels[0 ].csbases[cs];u32 *base1 = &pvt->csels[1 ].csbases[cs];
@@ -874,8 +874,8 @@ static void read_dct_base_mask(struct amd64_pvt *pvt) }for_each_chip_select_mask (cs,0 , pvt) { -u32 reg0 =DCSM0 + (cs *4 ); -u32 reg1 =DCSM1 + (cs *4 ); +int reg0 =DCSM0 + (cs *4 ); +int reg1 =DCSM1 + (cs *4 );u32 *mask0 = &pvt->csels[0 ].csmasks[cs];u32 *mask1 = &pvt->csels[1 ].csmasks[cs];
@@ -947,7 +947,7 @@ static u64 get_error_address(struct mce *m)static void read_dram_base_limit_regs (struct amd64_pvt *pvt,unsigned range) { -u32 off = range <<3 ; +int off = range <<3 ;amd64_read_pci_cfg (pvt->F1,DRAM_BASE_LO + off, &pvt->ranges[range].base.lo);amd64_read_pci_cfg (pvt->F1,DRAM_LIMIT_LO + off, &pvt->ranges[range].lim.lo);
Signature · 1 line
1.7.4.rc2
PATCH 5/8 amd64_edac: Drop local variable
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
Use the macro directly instead
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-)
drivers/edac/amd64_edac.c +2 -3
@@ -1233,7 +1233,6 @@ static u64 f1x_get_norm_dct_addr(struct amd64_pvt *pvt, int range,u64 chan_off;u64 dram_base =get_dram_base (pvt, range);u64 hole_off =f10_dhar_offset (pvt); -u32 hole_valid =dhar_valid (pvt);u64 dct_sel_base_off = (pvt->dct_sel_hi &0xFFFFFC00 ) <<16 ;if (hi_rng) {
@@ -1250,7 +1249,7 @@ static u64 f1x_get_norm_dct_addr(struct amd64_pvt *pvt, int range,*/ if ((!(dct_sel_base_addr >>16 ) || dct_sel_base_addr <dhar_base (pvt)) && - hole_valid && +dhar_valid (pvt) && (sys_addr >=BIT_64 (32 ))) chan_off = hole_off;else
@@ -1265,7 +1264,7 @@ static u64 f1x_get_norm_dct_addr(struct amd64_pvt *pvt, int range,* else * remove dram base to normalize to DCT address */ -if (hole_valid && (sys_addr >=BIT_64 (32 ))) +if (dhar_valid (pvt) && (sys_addr >=BIT_64 (32 ))) chan_off = hole_off;else chan_off = dram_base;
Signature · 1 line
1.7.4.rc2
PATCH 6/8 amd64_edac: Fix ranges signedness
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
The dram ranges make sense only as an unsigned type.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-)
drivers/edac/amd64_edac.c +5 -4
@@ -1226,7 +1226,7 @@ static u8 f1x_determine_channel(struct amd64_pvt *pvt, u64 sys_addr, }/* Convert the sys_addr to the normalized DCT address */ -static u64 f1x_get_norm_dct_addr (struct amd64_pvt *pvt,int range, +static u64 f1x_get_norm_dct_addr (struct amd64_pvt *pvt,unsigned range,u64 sys_addr,bool hi_rng,u32 dct_sel_base_addr) {
@@ -1380,7 +1380,7 @@ static u64 f1x_swap_interleaved_region(struct amd64_pvt *pvt, u64 sys_addr) }/* For a given @dram_range, check if @sys_addr falls within it. */ -static int f1x_match_to_this_node (struct amd64_pvt *pvt,int range, +static int f1x_match_to_this_node (struct amd64_pvt *pvt,unsigned range,u64 sys_addr,int *nid,int *chan_sel) {int cs_found = -EINVAL ;
@@ -1468,7 +1468,8 @@ static int f1x_match_to_this_node(struct amd64_pvt *pvt, int range,static int f1x_translate_sysaddr_to_cs (struct amd64_pvt *pvt,u64 sys_addr,int *node,int *chan_sel) { -int range, cs_found = -EINVAL ; +int cs_found = -EINVAL ; +unsigned range;for (range =0 ; range <DRAM_RANGES ; range++) {
@@ -1941,7 +1942,7 @@ static void read_mc_regs(struct amd64_pvt *pvt)struct cpuinfo_x86 *c = &boot_cpu_data;u64 msr_val;u32 tmp; -int range; +unsigned range;/* * Retrieve TOP_MEM and TOP_MEM2; no masking off of reserved bits since
Signature · 1 line
1.7.4.rc2
PATCH 7/8 amd64_edac: Fix DCT argument type
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
Fix amd64_debug_display_dimm_sizes() arguments order per convention (pvt is always first). Also, the now second arg denotes the DCT so adjust its type.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 9 ++++----- 1 files changed, 4 insertions(+), 5 deletions(-)
drivers/edac/amd64_edac.c +4 -5
@@ -768,8 +768,7 @@ static enum edac_type amd64_determine_edac_cap(struct amd64_pvt *pvt)return edac_cap; } - -static void amd64_debug_display_dimm_sizes (int ctrl,struct amd64_pvt *pvt); +static void amd64_debug_display_dimm_sizes (struct amd64_pvt *,u8 );static void amd64_dump_dramcfg_low (u32 dclr,int chan) {
@@ -817,13 +816,13 @@ static void dump_misc_regs(struct amd64_pvt *pvt)debugf1 (" DramHoleValid: %s\n" ,dhar_valid (pvt) ?"yes" :"no" ); -amd64_debug_display_dimm_sizes (0 , pvt); +amd64_debug_display_dimm_sizes (pvt,0 );/* everything below this point is Fam10h and above */ if (boot_cpu_data.x86 ==0xf )return ; -amd64_debug_display_dimm_sizes (1 , pvt); +amd64_debug_display_dimm_sizes (pvt,1 );amd64_info ("using %s syndromes.\n" , ((pvt->ecc_sym_sz ==8 ) ?"x8" :"x4" ));
@@ -1536,7 +1535,7 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,* debug routine to display the memory sizes of all logical DIMMs and its * CSROWs */ -static void amd64_debug_display_dimm_sizes (int ctrl,struct amd64_pvt *pvt) +static void amd64_debug_display_dimm_sizes (struct amd64_pvt *pvt,u8 ctrl) {int dimm, size0, size1, factor =0 ;u32 *dcsb = ctrl ? pvt->csels[1 ].csbases : pvt->csels[0 ].csbases;
Signature · 1 line
1.7.4.rc2
PATCH 8/8 amd64_edac: Fix decode_syndrome types
In reply to Borislav PetkovFrom: Borislav Petkov <[email protected]>
Those should all be unsigned.
Signed-off-by Borislav Petkov <[email protected]>
--- drivers/edac/amd64_edac.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
drivers/edac/amd64_edac.c +4 -4
@@ -1700,15 +1700,15 @@ static u16 x8_vectors[] = { 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, }; -static int decode_syndrome (u16 syndrome,u16 *vectors,int num_vecs, -int v_dim) +static int decode_syndrome (u16 syndrome,u16 *vectors,unsigned num_vecs, +unsigned v_dim) {unsigned int i, err_sym;for (err_sym =0 ; err_sym < num_vecs / v_dim; err_sym++) {u16 s = syndrome; -int v_idx = err_sym * v_dim; -int v_end = (err_sym +1 ) * v_dim; +unsigned v_idx = err_sym * v_dim; +unsigned v_end = (err_sym +1 ) * v_dim;/* walk over all 16 bits of the syndrome */ for (i =1 ; i < (1U <<16 ); i <<=1 ) {
Signature · 1 line
1.7.4.rc2