msm: Add gpio support for 8960
Subsystems (3)
PATCH 1/1 msm: Add gpio support for 8960
This patch adds GPIO support for 8960. The board file includes the gpiomux configs and we now use gpio-v2 for 8960.
Signed-off-by Rohit Vaswani <[email protected]>
--- arch/arm/mach-msm/Makefile | 4 +-- arch/arm/mach-msm/board-msm8960.c | 21 ++++++++++++ arch/arm/mach-msm/gpio-v2.c | 13 ++++--- arch/arm/mach-msm/include/mach/irqs-8960.h | 38 +++++++++++----------- arch/arm/mach-msm/include/mach/irqs-8x60.h | 24 +++++++------- arch/arm/mach-msm/include/mach/msm_iomap-8960.h | 3 ++ arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 5 +-- arch/arm/mach-msm/include/mach/msm_iomap.h | 1 + arch/arm/mach-msm/io.c | 2 + 9 files changed, 68 insertions(+), 43 deletions(-)
arch/arm/mach-msm/Makefile +1 -3
@@ -30,11 +30,9 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-v2.o gpiomux.o +obj-$(CONFIG_ARCH_MSM8960) += gpiomux-v2.o gpiomux.o ifdef CONFIG_MSM_V2_TLMM -ifndef CONFIG_ARCH_MSM8960 -# TODO: TLMM Mapping issues need to be resolved obj-y += gpio-v2.o -endif else obj-y += gpio.o endif
arch/arm/mach-msm/board-msm8960.c +21 -0
@@ -29,6 +29,25 @@#include <mach/msm_iomap.h> #include "devices.h" +#include "gpiomux.h" + +static struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS ] = {}; + +static int __init gpiomux_init (void ) +{ +int rc; + + rc =msm_gpiomux_init (NR_GPIO_IRQS ); +if (rc) { +printk (KERN_ERR "msm_gpiomux_init failed %d\n" , rc); +return rc; + } + +msm_gpiomux_install (msm8960_gpiomux_configs, +ARRAY_SIZE (msm8960_gpiomux_configs)); + +return 0 ; +}static void __init msm8960_map_io (void ) {
@@ -68,12 +87,14 @@ static struct platform_device *rumi3_devices[] __initdata = {static void __init msm8960_sim_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (sim_devices,ARRAY_SIZE (sim_devices)); }static void __init msm8960_rumi3_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (rumi3_devices,ARRAY_SIZE (rumi3_devices)); }
arch/arm/mach-msm/gpio-v2.c +7 -6
@@ -1,4 +1,4 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. +/* Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and
@@ -326,6 +326,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)static void msm_summary_irq_handler (unsigned int irq,struct irq_desc *desc) {unsigned long i; +struct irq_chip *chip =get_irq_desc_chip (desc); for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); i < NR_GPIO_IRQS;
@@ -334,7 +335,7 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)generic_handle_irq (msm_gpio_to_irq (&msm_gpio.gpio_chip, i)); } - desc->chip->ack (irq); + chip->irq_ack (&desc->irq_data); }static int msm_gpio_irq_set_wake (unsigned int irq,unsigned int on)
@@ -343,12 +344,12 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)if (on) {if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,1 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,1 );set_bit (gpio, msm_gpio.wake_irqs); }else {clear_bit (gpio, msm_gpio.wake_irqs);if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,0 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,0 ); }return 0 ;
@@ -382,7 +383,7 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)set_irq_flags (irq,IRQF_VALID ); } -set_irq_chained_handler (TLMM_SCSS_SUMMARY_IRQ , +set_irq_chained_handler (TLMM_MSM_SUMMARY_IRQ , msm_summary_irq_handler);return 0 ; }
@@ -394,7 +395,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev)if (ret <0 )return ret; -set_irq_handler (TLMM_SCSS_SUMMARY_IRQ ,NULL ); +set_irq_handler (TLMM_MSM_SUMMARY_IRQ ,NULL );return 0 ; }
arch/arm/mach-msm/include/mach/irqs-8960.h +19 -19
@@ -43,19 +43,19 @@#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)#define SC_SICL2PERFMONIRPTREQ (GIC_SPI_START + 2)#define SC_SICAGCIRPTREQ (GIC_SPI_START + 3) -#define TLMM_APCC_DIR_CONN_IRQ_0 (GIC_SPI_START + 4) -#define TLMM_APCC_DIR_CONN_IRQ_1 (GIC_SPI_START + 5) -#define TLMM_APCC_DIR_CONN_IRQ_2 (GIC_SPI_START + 6) -#define TLMM_APCC_DIR_CONN_IRQ_3 (GIC_SPI_START + 7) -#define TLMM_APCC_DIR_CONN_IRQ_4 (GIC_SPI_START + 8) -#define TLMM_APCC_DIR_CONN_IRQ_5 (GIC_SPI_START + 9) -#define TLMM_APCC_DIR_CONN_IRQ_6 (GIC_SPI_START + 10) -#define TLMM_APCC_DIR_CONN_IRQ_7 (GIC_SPI_START + 11) -#define TLMM_APCC_DIR_CONN_IRQ_8 (GIC_SPI_START + 12) -#define TLMM_APCC_DIR_CONN_IRQ_9 (GIC_SPI_START + 13) +#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4) +#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5) +#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6) +#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7) +#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8) +#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9) +#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10) +#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11) +#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12) +#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15) -#define TLMM_APCC_SUMMARY_IRQ (GIC_SPI_START + 16) +#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
@@ -258,20 +258,20 @@#define QDSS_ETB_IRQ (GIC_SPI_START + 216)#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218) -#define TLMM_APCC_DIR_CONN_IRQ_16 (GIC_SPI_START + 219) -#define TLMM_APCC_DIR_CONN_IRQ_17 (GIC_SPI_START + 220) -#define TLMM_APCC_DIR_CONN_IRQ_18 (GIC_SPI_START + 221) -#define TLMM_APCC_DIR_CONN_IRQ_19 (GIC_SPI_START + 222) -#define TLMM_APCC_DIR_CONN_IRQ_20 (GIC_SPI_START + 223) -#define TLMM_APCC_DIR_CONN_IRQ_21 (GIC_SPI_START + 224) +#define TLMM_MSM_DIR_CONN_IRQ_16 (GIC_SPI_START + 219) +#define TLMM_MSM_DIR_CONN_IRQ_17 (GIC_SPI_START + 220) +#define TLMM_MSM_DIR_CONN_IRQ_18 (GIC_SPI_START + 221) +#define TLMM_MSM_DIR_CONN_IRQ_19 (GIC_SPI_START + 222) +#define TLMM_MSM_DIR_CONN_IRQ_20 (GIC_SPI_START + 223) +#define TLMM_MSM_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)/* For now, use the maximum number of interrupts until a pending GIC issue * is sorted out */ -#define NR_MSM_IRQS 1020 +#define NR_MSM_IRQS 870#define NR_BOARD_IRQS 0 -#define NR_GPIO_IRQS 0 +#define NR_GPIO_IRQS 150#endif
arch/arm/mach-msm/include/mach/irqs-8x60.h +12 -12
@@ -1,4 +1,4 @@ -/* Copyright (c) 2010 Code Aurora Forum. All rights reserved. +/* Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and
@@ -44,19 +44,19 @@#define SC_SICL2IRPTREQ (GIC_SPI_START + 1)#define SC_SICL2ACGIRPTREQ (GIC_SPI_START + 2)#define NC (GIC_SPI_START + 3) -#define TLMM_SCSS_DIR_CONN_IRQ_0 (GIC_SPI_START + 4) -#define TLMM_SCSS_DIR_CONN_IRQ_1 (GIC_SPI_START + 5) -#define TLMM_SCSS_DIR_CONN_IRQ_2 (GIC_SPI_START + 6) -#define TLMM_SCSS_DIR_CONN_IRQ_3 (GIC_SPI_START + 7) -#define TLMM_SCSS_DIR_CONN_IRQ_4 (GIC_SPI_START + 8) -#define TLMM_SCSS_DIR_CONN_IRQ_5 (GIC_SPI_START + 9) -#define TLMM_SCSS_DIR_CONN_IRQ_6 (GIC_SPI_START + 10) -#define TLMM_SCSS_DIR_CONN_IRQ_7 (GIC_SPI_START + 11) -#define TLMM_SCSS_DIR_CONN_IRQ_8 (GIC_SPI_START + 12) -#define TLMM_SCSS_DIR_CONN_IRQ_9 (GIC_SPI_START + 13) +#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4) +#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5) +#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6) +#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7) +#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8) +#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9) +#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10) +#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11) +#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12) +#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)#define PM8058_SEC_IRQ_N (GIC_SPI_START + 14)#define PM8901_SEC_IRQ_N (GIC_SPI_START + 15) -#define TLMM_SCSS_SUMMARY_IRQ (GIC_SPI_START + 16) +#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)#define RPM_SCSS_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
arch/arm/mach-msm/include/mach/msm_iomap-8960.h +3 -0
@@ -45,4 +45,7 @@#define MSM8960_TMR0_PHYS 0x0208A000#define MSM8960_TMR0_SIZE SZ_4K +#define MSM8960_TLMM_PHYS 0x00800000 +#define MSM8960_TLMM_SIZE SZ_16K +#endif
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +2 -3
@@ -49,9 +49,8 @@#define MSM_GCC_PHYS 0x02082000#define MSM_GCC_SIZE SZ_4K -#define MSM_TLMM_BASE IOMEM(0xF0004000) -#define MSM_TLMM_PHYS 0x00800000 -#define MSM_TLMM_SIZE SZ_16K +#define MSM8X60_TLMM_PHYS 0x00800000 +#define MSM8X60_TLMM_SIZE SZ_16K#define MSM_SHARED_RAM_BASE IOMEM(0xF0100000)#define MSM_SHARED_RAM_SIZE SZ_1M
arch/arm/mach-msm/include/mach/msm_iomap.h +1 -0
@@ -61,5 +61,6 @@#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)#define MSM_TMR_BASE IOMEM(0xF0200000)#define MSM_TMR0_BASE IOMEM(0xF0201000) +#define MSM_TLMM_BASE IOMEM(0xF0202000)#endif
arch/arm/mach-msm/io.c +2 -0
@@ -106,6 +106,7 @@ static struct map_desc msm8x60_io_desc[] __initdata = {MSM_CHIP_DEVICE (QGIC_CPU ,MSM8X60 ),MSM_CHIP_DEVICE (TMR ,MSM8X60 ),MSM_CHIP_DEVICE (TMR0 ,MSM8X60 ), +MSM_CHIP_DEVICE (TLMM ,MSM8X60 ),MSM_DEVICE (ACC ), MSM_DEVICE(GCC), };
@@ -122,6 +123,7 @@ static struct map_desc msm8960_io_desc[] __initdata = {MSM_CHIP_DEVICE (QGIC_CPU ,MSM8960 ),MSM_CHIP_DEVICE (TMR ,MSM8960 ),MSM_CHIP_DEVICE (TMR0 ,MSM8960 ), + MSM_CHIP_DEVICE(TLMM, MSM8960), };void __init msm_map_msm8960_io (void )
Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center,Inc The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
Quoted 97 lines · Rohit Vaswani
This patch adds GPIO support for 8960. The board file includes the gpiomux configs and we now use gpio-v2 for 8960.
Signed-off-by Rohit Vaswani <[email protected]>--- arch/arm/mach-msm/Makefile | 4 +-- arch/arm/mach-msm/board-msm8960.c | 21 ++++++++++++ arch/arm/mach-msm/gpio-v2.c | 13 ++++--- arch/arm/mach-msm/include/mach/irqs-8960.h | 38 +++++++++++----------- arch/arm/mach-msm/include/mach/irqs-8x60.h | 24 +++++++------- arch/arm/mach-msm/include/mach/msm_iomap-8960.h | 3 ++ arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 5 +-- arch/arm/mach-msm/include/mach/msm_iomap.h | 1 + arch/arm/mach-msm/io.c | 2 + 9 files changed, 68 insertions(+), 43 deletions(-)arch/arm/mach-msm/Makefile +1
-3@@ -30,11 +30,9 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-v2.o gpiomux.o +obj-$(CONFIG_ARCH_MSM8960) += gpiomux-v2.o gpiomux.o ifdef CONFIG_MSM_V2_TLMM -ifndef CONFIG_ARCH_MSM8960 -# TODO: TLMM Mapping issues need to be resolved obj-y += gpio-v2.o -endif else obj-y += gpio.o endifarch/arm/mach-msm/board-msm8960.c +21
-0@@ -29,6 +29,25 @@#include <mach/msm_iomap.h> #include "devices.h" +#include "gpiomux.h" + +static struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS ] = {}; + +static int __init gpiomux_init (void ) +{ +int rc; + + rc =msm_gpiomux_init (NR_GPIO_IRQS ); +if (rc) { +printk (KERN_ERR "msm_gpiomux_init failed %d\n" , rc); +return rc; + } + +msm_gpiomux_install (msm8960_gpiomux_configs, +ARRAY_SIZE (msm8960_gpiomux_configs)); + +return 0 ; +}static void __init msm8960_map_io (void ) {@@ -68,12 +87,14 @@ static struct platform_device *rumi3_devices[] __initdata = {static void __init msm8960_sim_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (sim_devices,ARRAY_SIZE (sim_devices)); }static void __init msm8960_rumi3_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (rumi3_devices,ARRAY_SIZE (rumi3_devices)); }arch/arm/mach-msm/gpio-v2.c +2
-1@@ -1,4 +1,4 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. +/* Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -326,6 +326,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)static void msm_summary_irq_handler (unsigned int irq,struct irq_desc *desc) {unsigned long i; +struct irq_chip *chip =get_irq_desc_chip (desc); for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); i < NR_GPIO_IRQS;
arch/arm/mach-msm/gpio-v2.c static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) · line 339
Quoted 6 lines
arch/arm/mach-msm/gpio-v2.c +1
-1@@ -334,7 +335,7 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)generic_handle_irq (msm_gpio_to_irq (&msm_gpio.gpio_chip, i)); } - desc->chip->ack (irq); + chip->irq_ack (&desc->irq_data); }
It looks like your fixing something above, but you've not spelled out what your doing in the commit text.
Quoted 4 lines
arch/arm/mach-msm/gpio-v2.c +0
-0static int msm_gpio_irq_set_wake (unsigned int irq,unsigned int on)@@ -343,12 +344,12 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)if (on) {
arch/arm/mach-msm/gpio-v2.c static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) · line 353
Quoted 10 lines
arch/arm/mach-msm/gpio-v2.c +2
-2if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,1 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,1 );set_bit (gpio, msm_gpio.wake_irqs); }else {clear_bit (gpio, msm_gpio.wake_irqs);if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,0 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,0 ); }
Again looks like another fix, but your not telling us what your doing.
arch/arm/mach-msm/gpio-v2.c static int __devinit msm_gpio_probe(struct platform_device *dev) · line 387
Quoted 8 lines
arch/arm/mach-msm/gpio-v2.c +1
-1return 0 ;@@ -382,7 +383,7 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)set_irq_flags (irq,IRQF_VALID ); } -set_irq_chained_handler (TLMM_SCSS_SUMMARY_IRQ , +set_irq_chained_handler (TLMM_MSM_SUMMARY_IRQ , msm_summary_irq_handler);
Ok, so looks like a rename. Can you add this to the commit text along with descriptions of everything else your doing?
Quoted 13 lines
arch/arm/mach-msm/io.c +1
-0@@ -106,6 +106,7 @@ static struct map_desc msm8x60_io_desc[] __initdata = {MSM_CHIP_DEVICE (QGIC_CPU ,MSM8X60 ),MSM_CHIP_DEVICE (TMR ,MSM8X60 ),MSM_CHIP_DEVICE (TMR0 ,MSM8X60 ), +MSM_CHIP_DEVICE (TLMM ,MSM8X60 ),MSM_DEVICE (ACC ), MSM_DEVICE(GCC), };
arch/arm/mach-msm/io.c static struct map_desc msm8960_io_desc[] __initdata = { · line 129
Quoted 7 lines
arch/arm/mach-msm/io.c +1
-0@@ -122,6 +123,7 @@ static struct map_desc msm8960_io_desc[] __initdata = {MSM_CHIP_DEVICE (QGIC_CPU ,MSM8960 ),MSM_CHIP_DEVICE (TMR ,MSM8960 ),MSM_CHIP_DEVICE (TMR0 ,MSM8960 ), + MSM_CHIP_DEVICE(TLMM, MSM8960), };void __init msm_map_msm8960_io (void )
If it were me I'd break this up into multiple patches.. It just feels like your doing too much here, but that's just me.
Daniel
Quoted 128 lines · Daniel Walker
Quoted 97 lines · Rohit Vaswani
This patch adds GPIO support for 8960. The board file includes the gpiomux configs and we now use gpio-v2 for 8960.
Signed-off-by Rohit Vaswani<[email protected]>--- arch/arm/mach-msm/Makefile | 4 +-- arch/arm/mach-msm/board-msm8960.c | 21 ++++++++++++ arch/arm/mach-msm/gpio-v2.c | 13 ++++--- arch/arm/mach-msm/include/mach/irqs-8960.h | 38 +++++++++++----------- arch/arm/mach-msm/include/mach/irqs-8x60.h | 24 +++++++------- arch/arm/mach-msm/include/mach/msm_iomap-8960.h | 3 ++ arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 5 +-- arch/arm/mach-msm/include/mach/msm_iomap.h | 1 + arch/arm/mach-msm/io.c | 2 + 9 files changed, 68 insertions(+), 43 deletions(-)arch/arm/mach-msm/Makefile +1
-3@@ -30,11 +30,9 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-v2.o gpiomux.o +obj-$(CONFIG_ARCH_MSM8960) += gpiomux-v2.o gpiomux.o ifdef CONFIG_MSM_V2_TLMM -ifndef CONFIG_ARCH_MSM8960 -# TODO: TLMM Mapping issues need to be resolved obj-y += gpio-v2.o -endif else obj-y += gpio.o endifarch/arm/mach-msm/board-msm8960.c +21
-0@@ -29,6 +29,25 @@#include <mach/msm_iomap.h> #include "devices.h" +#include "gpiomux.h" + +static struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS ] = {}; + +static int __init gpiomux_init (void ) +{ +int rc; + + rc =msm_gpiomux_init (NR_GPIO_IRQS ); +if (rc) { +printk (KERN_ERR "msm_gpiomux_init failed %d\n" , rc); +return rc; + } + +msm_gpiomux_install (msm8960_gpiomux_configs, +ARRAY_SIZE (msm8960_gpiomux_configs)); + +return 0 ; +}static void __init msm8960_map_io (void ) {@@ -68,12 +87,14 @@ static struct platform_device *rumi3_devices[] __initdata = {static void __init msm8960_sim_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (sim_devices,ARRAY_SIZE (sim_devices)); }static void __init msm8960_rumi3_init (void ) {msm_clock_init (msm_clocks_8960, msm_num_clocks_8960); +gpiomux_init ();platform_add_devices (rumi3_devices,ARRAY_SIZE (rumi3_devices)); }arch/arm/mach-msm/gpio-v2.c +2
-1@@ -1,4 +1,4 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. +/* Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -326,6 +326,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)static void msm_summary_irq_handler (unsigned int irq,struct irq_desc *desc) {unsigned long i; +struct irq_chip *chip =get_irq_desc_chip (desc); for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); i< NR_GPIO_IRQS;arch/arm/mach-msm/gpio-v2.c static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) · line 339
Quoted 6 lines
arch/arm/mach-msm/gpio-v2.c +1
-1@@ -334,7 +335,7 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)generic_handle_irq (msm_gpio_to_irq (&msm_gpio.gpio_chip, i)); } - desc->chip->ack (irq); + chip->irq_ack (&desc->irq_data); }It looks like your fixing something above, but you've not spelled out what your doing in the commit text.
Quoted 4 lines
arch/arm/mach-msm/gpio-v2.c +0
-0static int msm_gpio_irq_set_wake (unsigned int irq,unsigned int on)@@ -343,12 +344,12 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)if (on) {arch/arm/mach-msm/gpio-v2.c static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) · line 353
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arch/arm/mach-msm/gpio-v2.c +2
-2if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,1 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,1 );set_bit (gpio, msm_gpio.wake_irqs); }else {clear_bit (gpio, msm_gpio.wake_irqs);if (bitmap_empty (msm_gpio.wake_irqs,NR_GPIO_IRQS )) -set_irq_wake (TLMM_SCSS_SUMMARY_IRQ ,0 ); +set_irq_wake (TLMM_MSM_SUMMARY_IRQ ,0 ); }Again looks like another fix, but your not telling us what your doing.
Quoted 5 lines
arch/arm/mach-msm/gpio-v2.c +0
-0return 0 ;@@ -382,7 +383,7 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)set_irq_flags (irq,IRQF_VALID ); }
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arch/arm/mach-msm/gpio-v2.c static int __devinit msm_gpio_probe(struct platform_device *dev) · line 387
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arch/arm/mach-msm/gpio-v2.c +1
-1-set_irq_chained_handler (TLMM_SCSS_SUMMARY_IRQ , +set_irq_chained_handler (TLMM_MSM_SUMMARY_IRQ , msm_summary_irq_handler);Ok, so looks like a rename. Can you add this to the commit text along with descriptions of everything else your doing?
Daniel,
Adding support for 8960 includes making sure that Gpio support remains meaningful and at the same time uniform across different boards. Should we enumerate the specific changes ?
Thanks,
Rohit Vaswani
Signature · 2 lines
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Quoted 10 lines · Rohit Vaswani
Quoted 6 lines
arch/arm/mach-msm/gpio-v2.c static int __devinit msm_gpio_probe(struct platform_device *dev) · line 387
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arch/arm/mach-msm/gpio-v2.c +1
-1-set_irq_chained_handler (TLMM_SCSS_SUMMARY_IRQ , +set_irq_chained_handler (TLMM_MSM_SUMMARY_IRQ , msm_summary_irq_handler);Ok, so looks like a rename. Can you add this to the commit text along with descriptions of everything else your doing?
Daniel,
Adding support for 8960 includes making sure that Gpio support remains meaningful and at the same time uniform across different boards. Should we enumerate the specific changes ?
Should let everyone know exactly what your doing, even breaking up the changes into specific patches.
Daniel
PATCH 1/1 msm: Add gpio support for 8960
Quoted 2 lines · Daniel Walker
Should let everyone know exactly what your doing, even breaking up the changes into specific patches.
Rohit, but other MSM developers as well. In general, the commit text needs to be a lot better. A good test would be to look at each part of the patch, and ask how that is described by the commit text. If it feels like the commit text is describing separate things, the patch probably needs to be split up.
Please spend some time running 'git log' on other parts of the kernel to get a feel for what is expected.
Thanks,
David
Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.