mtd: m25p80: Add Numonyx m25px32 family
PATCH 1/4 mtd: m25p80: Add Numonyx m25px32 family
--- drivers/mtd/devices/m25p80.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
drivers/mtd/devices/m25p80.c +4 -1
@@ -729,7 +729,10 @@ static const struct spi_device_id m25p_ids[] = { { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) }, { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) }, - { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) }, + { "m25px32", INFO(0x207116, 0, 64 * 1024, 64, SECT_4K) }, + { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SECT_4K) }, + { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SECT_4K) }, + { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) },/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
Signature · 1 line
1.7.5
PATCH 2/4 mtd: m25p80: Clean up JEDEC manufacturer checks
Use the manufacturer ID names from cfi.h instead of hard-coding hex constants. Introduce a JEDEC_MFR macro for clarity.
--- drivers/mtd/devices/m25p80.c | 11 +++++++---- 1 files changed, 7 insertions(+), 4 deletions(-)
drivers/mtd/devices/m25p80.c +7 -4
@@ -27,6 +27,7 @@#include <linux/sched.h> #include <linux/mod_devicetable.h> +#include <linux/mtd/cfi.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h>
@@ -76,6 +77,8 @@#define FAST_READ_DUMMY_BYTE 0#endif +#define JEDEC_MFR (_jedec_id) ((_jedec_id) >> 16) +/****************************************************************************/ struct m25p {
@@ -871,9 +874,9 @@ static int __devinit m25p_probe(struct spi_device *spi)* up with the software protection bits set */ -if (info->jedec_id >>16 ==0x1f || - info->jedec_id >>16 ==0x89 || - info->jedec_id >>16 ==0xbf ) { +if (JEDEC_MFR (info->jedec_id) ==CFI_MFR_ATMEL || +JEDEC_MFR (info->jedec_id) ==CFI_MFR_INTEL || +JEDEC_MFR (info->jedec_id) ==CFI_MFR_SST ) {write_enable (flash);write_sr (flash,0 ); }
@@ -891,7 +894,7 @@ static int __devinit m25p_probe(struct spi_device *spi) flash->mtd.read = m25p80_read;/* sst flash chips use AAI word program */ -if (info->jedec_id >>16 ==0xbf ) +if (JEDEC_MFR (info->jedec_id) ==CFI_MFR_SST ) flash->mtd.write = sst_write;else flash->mtd.write = m25p80_write;
Signature · 1 line
1.7.5
PATCH 3/4 mtd: m25p80: Add Spansion S25FL256S
In reply to Kevin CernekeeThese are 32MiB parts which use a slightly different 4-byte enable sequence from Macronix.
Default to the Spansion 4-byte scheme in set_4byte(), as it is more likely to be copied by other vendors.
--- drivers/mtd/devices/m25p80.c | 22 +++++++++++++++++----- 1 files changed, 17 insertions(+), 5 deletions(-)
drivers/mtd/devices/m25p80.c +17 -5
@@ -56,6 +56,9 @@#define OPCODE_EN4B 0xb7/* Enter 4-byte mode */ #define OPCODE_EX4B 0xe9/* Exit 4-byte mode */ +/* Used for Spansion flashes only. */ +#define OPCODE_BRWR 0x17/* Bank register write */ +/* Status Register bits. */ #define SR_WIP 1/* Write in progress */ #define SR_WEL 2/* Write enable latch */
@@ -161,11 +164,18 @@ static inline int write_disable(struct m25p *flash)/* * Enable/disable 4-byte addressing mode. */ -static inline int set_4byte (struct m25p *flash,int enable) +static inline int set_4byte (struct m25p *flash,u32 jedec_id,int enable) { -u8 code = enable ?OPCODE_EN4B :OPCODE_EX4B ; - -return spi_write_then_read (flash->spi, &code,1 ,NULL ,0 ); +switch (JEDEC_MFR (jedec_id)) { +case CFI_MFR_MACRONIX : + flash->command[0 ] = enable ?OPCODE_EN4B :OPCODE_EX4B ; +return spi_write (flash->spi, flash->command,1 ); +default : +/* Spansion style */ + flash->command[0 ] =OPCODE_BRWR ; + flash->command[1 ] = enable <<7 ; +return spi_write (flash->spi, flash->command,2 ); + } }/*
@@ -687,6 +697,8 @@ static const struct spi_device_id m25p_ids[] = { { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) }, { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SECT_4K) }, { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) }, + { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, + { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) }, { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
@@ -920,7 +932,7 @@ static int __devinit m25p_probe(struct spi_device *spi)/* enable 4-byte addressing if the device exceeds 16MiB */ if (flash->mtd.size >0x1000000 ) { flash->addr_width =4 ; -set_4byte (flash,1 ); +set_4byte (flash, info->jedec_id,1 ); }else flash->addr_width =3 ; }
Signature · 1 line
1.7.5
PATCH 4/4 mtd: m25p80: Add Spansion S25FL512S, S70FL01GS
In reply to Kevin CernekeeS25FL512S = 64MiB single die, same family as S25FL256S S70FL01GS = 2x S25FL512S dies in one package (separate chip selects)
These devices are not sampling yet, but they are expected to be very similar to S25FL256S, which has been tested.
--- drivers/mtd/devices/m25p80.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
drivers/mtd/devices/m25p80.c +2 -0
@@ -699,6 +699,8 @@ static const struct spi_device_id m25p_ids[] = { { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) }, { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) }, + { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, 0) }, + { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) }, { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
Signature · 1 line
1.7.5
drivers/mtd/devices/m25p80.c
Quoted 9 lines · Kevin Cernekee
Signed-off-by Kevin Cernekee <[email protected]>--- drivers/mtd/devices/m25p80.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)drivers/mtd/devices/m25p80.c +0
-0
Pushed all 4 patches to l2-mtd-2.6.git, thanks.
Signature · 2 lines
Best Regards, Artem Bityutskiy (Артём Битюцкий)