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Hexagon: Add support for Qualcomm Hexagon architecture

PATCH Superseded Richard Kuo 11 participants 69 messages Aug 17, 2011 – Feb 15, 2012

Subsystems (11)

v1 of 5 Superseded Latest is v5 →

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#0 lore raw

cover Hexagon: Add support for Qualcomm Hexagon architecture

The following patch set is intended to add support for the Qualcomm Hexagon architecture to the Linux kernel.

The Hexagon architecture is designed to deliver performance with low power over a variety of applications. It has features such as multithreading, privilege levels, VLIW, and instructions geared toward efficient signal processing. The port of Linux for Hexagon runs under a hypervisor layer.

I realize we are not currently in a merge window, but I felt it would be best to go ahead and send it out so that the community gets an ample chance to review it. This is a very large patch set, but we've tried to break it up into functional pieces to make review easier.

These changes are available in patch form on the Code Aurora Forum:

https://www.codeaurora.org/patches/quic/hlk/hexagon-linux-20110817.tar.gz

and will also be available via git:

git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon.git hexagon

Any feedback will be greatly appreciated.

Thanks,
Richard Kuo

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#1 lore raw

PATCH 1/36 Hexagon: Add generic headers

---
 arch/hexagon/include/asm/Kbuild              |    4 +
 arch/hexagon/include/asm/bitsperlong.h       |   26 ++++++++
 arch/hexagon/include/asm/bug.h               |    1 
 arch/hexagon/include/asm/cpumask.h           |    1 
 arch/hexagon/include/asm/cputime.h           |    1 
 arch/hexagon/include/asm/device.h            |    1 
 arch/hexagon/include/asm/div64.h             |    1 
 arch/hexagon/include/asm/emergency-restart.h |    1 
 arch/hexagon/include/asm/errno.h             |    1 
 arch/hexagon/include/asm/fb.h                |    1 
 arch/hexagon/include/asm/fcntl.h             |    1 
 arch/hexagon/include/asm/ioctl.h             |    1 
 arch/hexagon/include/asm/ioctls.h            |    1 
 arch/hexagon/include/asm/ipc.h               |    1 
 arch/hexagon/include/asm/ipcbuf.h            |    1 
 arch/hexagon/include/asm/irq_regs.h          |    1 
 arch/hexagon/include/asm/kdebug.h            |    1 
 arch/hexagon/include/asm/kmap_types.h        |    1 
 arch/hexagon/include/asm/local.h             |    1 
 arch/hexagon/include/asm/local64.h           |    1 
 arch/hexagon/include/asm/mman.h              |    1 
 arch/hexagon/include/asm/msgbuf.h            |    1 
 arch/hexagon/include/asm/mutex.h             |    8 ++
 arch/hexagon/include/asm/percpu.h            |    1 
 arch/hexagon/include/asm/poll.h              |    1 
 arch/hexagon/include/asm/posix_types.h       |    8 ++
 arch/hexagon/include/asm/resource.h          |    1 
 arch/hexagon/include/asm/scatterlist.h       |    1 
 arch/hexagon/include/asm/sections.h          |    3 +
 arch/hexagon/include/asm/sembuf.h            |    1 
 arch/hexagon/include/asm/setup.h             |   29 +++++++++
 arch/hexagon/include/asm/shmbuf.h            |    1 
 arch/hexagon/include/asm/shmparam.h          |    1 
 arch/hexagon/include/asm/siginfo.h           |    1 
 arch/hexagon/include/asm/socket.h            |    1 
 arch/hexagon/include/asm/sockios.h           |    1 
 arch/hexagon/include/asm/statfs.h            |    1 
 arch/hexagon/include/asm/termbits.h          |    1 
 arch/hexagon/include/asm/termios.h           |    1 
 arch/hexagon/include/asm/topology.h          |    1 
 arch/hexagon/include/asm/types.h             |    1 
 arch/hexagon/include/asm/ucontext.h          |    1 
 arch/hexagon/include/asm/unaligned.h         |    1 
 arch/hexagon/include/asm/user.h              |   79 +++++++++++++++++++++++++++
 arch/hexagon/include/asm/xor.h               |    1 
 45 files changed, 195 insertions(+)
arch/hexagon/include/asm/Kbuild new file +4 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/Kbuild
===================================================================
@@ -0,0 +1,4 @@
+include include/asm-generic/Kbuild.asm
+
+header-y += registers.h
+header-y += ucontext.h
arch/hexagon/include/asm/bitsperlong.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/bitsperlong.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __ASM_HEXAGON_BITSPERLONG_H
+#define __ASM_HEXAGON_BITSPERLONG_H
+
+#define __BITS_PER_LONG 32
+
+#include <asm-generic/bitsperlong.h>
+
+#endif
arch/hexagon/include/asm/bug.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/bug.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/bug.h>
arch/hexagon/include/asm/cpumask.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/cpumask.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/cpumask.h>
arch/hexagon/include/asm/cputime.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/cputime.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/cputime.h>
arch/hexagon/include/asm/device.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/device.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/device.h>
arch/hexagon/include/asm/div64.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/div64.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/div64.h>
arch/hexagon/include/asm/emergency-restart.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/emergency-restart.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/emergency-restart.h>
arch/hexagon/include/asm/errno.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/errno.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/errno.h>
arch/hexagon/include/asm/fb.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/fb.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/fb.h>
arch/hexagon/include/asm/fcntl.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/fcntl.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/fcntl.h>
arch/hexagon/include/asm/ioctl.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ioctl.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/ioctl.h>
arch/hexagon/include/asm/ioctls.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ioctls.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/ioctls.h>
arch/hexagon/include/asm/ipc.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ipc.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/ipc.h>
arch/hexagon/include/asm/ipcbuf.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ipcbuf.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/ipcbuf.h>
arch/hexagon/include/asm/irq_regs.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/irq_regs.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/irq_regs.h>
arch/hexagon/include/asm/kdebug.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/kdebug.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/kdebug.h>
arch/hexagon/include/asm/kmap_types.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/kmap_types.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/kmap_types.h>
arch/hexagon/include/asm/local.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/local.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/local.h>
arch/hexagon/include/asm/mman.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/mman.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/mman.h>
arch/hexagon/include/asm/msgbuf.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/msgbuf.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/msgbuf.h>
arch/hexagon/include/asm/mutex.h new file +8 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/mutex.h
===================================================================
@@ -0,0 +1,8 @@
+/*
+ * Pull in the generic implementation for the mutex fastpath.
+ *
+ * TODO: implement optimized primitives instead, or leave the generic
+ * implementation in place, or pick the atomic_xchg() based generic
+ * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+#include <asm-generic/mutex-xchg.h>
arch/hexagon/include/asm/percpu.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/percpu.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/percpu.h>
arch/hexagon/include/asm/poll.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/poll.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/poll.h>
arch/hexagon/include/asm/posix_types.h new file +8 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/posix_types.h
===================================================================
@@ -0,0 +1,8 @@
+/*  These header guards are here for uClibc's protection.  */
+
+#ifndef _ASM_POSIX_TYPES_H
+#define _ASM_POSIX_TYPES_H
+
+#include <asm-generic/posix_types.h>
+
+#endif
arch/hexagon/include/asm/resource.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/resource.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/resource.h>
arch/hexagon/include/asm/scatterlist.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/scatterlist.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/scatterlist.h>
arch/hexagon/include/asm/sections.h new file +3 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/sections.h
===================================================================
@@ -0,0 +1,3 @@
+#ifndef __ASSEMBLY__
+#include <asm-generic/sections.h>
+#endif
arch/hexagon/include/asm/sembuf.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/sembuf.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/sembuf.h>
arch/hexagon/include/asm/setup.h new file +29 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/setup.h
===================================================================
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SETUP_H
+#define _ASM_SETUP_H
+
+#include <linux/init.h>
+#include <asm-generic/setup.h>
+
+extern char external_cmdline_buffer;
+
+void __init setup_arch_memory(void);
+
+#endif
arch/hexagon/include/asm/shmbuf.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/shmbuf.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/shmbuf.h>
arch/hexagon/include/asm/shmparam.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/shmparam.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/shmparam.h>
arch/hexagon/include/asm/siginfo.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/siginfo.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/siginfo.h>
arch/hexagon/include/asm/socket.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/socket.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/socket.h>
arch/hexagon/include/asm/sockios.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/sockios.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/sockios.h>
arch/hexagon/include/asm/statfs.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/statfs.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/statfs.h>
arch/hexagon/include/asm/termbits.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/termbits.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/termbits.h>
arch/hexagon/include/asm/termios.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/termios.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/termios.h>
arch/hexagon/include/asm/topology.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/topology.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/topology.h>
arch/hexagon/include/asm/types.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/types.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/types.h>
arch/hexagon/include/asm/ucontext.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ucontext.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/ucontext.h>
arch/hexagon/include/asm/unaligned.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/unaligned.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/unaligned.h>
arch/hexagon/include/asm/user.h new file +79 -0

79 lines not on this page · raw message

arch/hexagon/include/asm/xor.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/xor.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/xor.h>
arch/hexagon/include/asm/local64.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/local64.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/local64.h>

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#2 lore raw

Re: [patch 01/36] Hexagon: Add generic headers

Quoted 11 lines · On Wednesday 17 August 2011 11:34:58 Richard Kuo wrote:
 arch/hexagon/include/asm/bug.h               |    1 
 arch/hexagon/include/asm/cpumask.h           |    1 
 arch/hexagon/include/asm/cputime.h           |    1 
 arch/hexagon/include/asm/device.h            |    1 
 arch/hexagon/include/asm/div64.h             |    1 
 arch/hexagon/include/asm/emergency-restart.h |    1 
 arch/hexagon/include/asm/errno.h             |    1 
 arch/hexagon/include/asm/fb.h                |    1 
 arch/hexagon/include/asm/fcntl.h             |    1 
 arch/hexagon/include/asm/ioctl.h             |    1 
 arch/hexagon/include/asm/ioctls.h            |    1 
Quoted 8 lines
 arch/hexagon/include/asm/ipc.h               |    1 
 arch/hexagon/include/asm/ipcbuf.h            |    1 
 arch/hexagon/include/asm/irq_regs.h          |    1 
 arch/hexagon/include/asm/kdebug.h            |    1 
 arch/hexagon/include/asm/kmap_types.h        |    1 
 arch/hexagon/include/asm/local.h             |    1 
 arch/hexagon/include/asm/local64.h           |    1 
 arch/hexagon/include/asm/mman.h              |    1 

There is no need for these one-line files any more, see arch/openrisc/include/asm/Kbuild

Arnd

#3 lore raw

PATCH 2/36 Hexagon: Core arch-specific header files

In reply to Richard Kuo
---
 arch/hexagon/include/asm/auxvec.h     |    3 
 arch/hexagon/include/asm/bugs.h       |    1 
 arch/hexagon/include/asm/byteorder.h  |   28 ++++
 arch/hexagon/include/asm/elf.h        |  222 ++++++++++++++++++++++++++++++++++
 arch/hexagon/include/asm/fpu.h        |    4 
 arch/hexagon/include/asm/ftrace.h     |    1 
 arch/hexagon/include/asm/futex.h      |  137 ++++++++++++++++++++
 arch/hexagon/include/asm/hw_irq.h     |    1 
 arch/hexagon/include/asm/linkage.h    |   25 +++
 arch/hexagon/include/asm/module.h     |   26 +++
 arch/hexagon/include/asm/param.h      |   26 +++
 arch/hexagon/include/asm/pci.h        |    1 
 arch/hexagon/include/asm/perf_event.h |   24 +++
 arch/hexagon/include/asm/segment.h    |    3 
 arch/hexagon/include/asm/stat.h       |    1 
 arch/hexagon/include/asm/string.h     |   32 ++++
 arch/hexagon/include/asm/suspend.h    |   27 ++++
 arch/hexagon/include/asm/swab.h       |   24 +++
 arch/hexagon/include/asm/timex.h      |   29 ++++
 19 files changed, 615 insertions(+)
arch/hexagon/include/asm/auxvec.h new file +3 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/auxvec.h
===================================================================
@@ -0,0 +1,3 @@
+#ifndef _ASM_AUXVEC_H
+#define _ASM_AUXVEC_H
+#endif
arch/hexagon/include/asm/bugs.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/bugs.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/bugs.h>
arch/hexagon/include/asm/byteorder.h new file +28 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/byteorder.h
===================================================================
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_BYTEORDER_H
+#define _ASM_BYTEORDER_H
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#endif
+
+#include <linux/byteorder/little_endian.h>
+
+#endif /* _ASM_BYTEORDER_H */
arch/hexagon/include/asm/elf.h new file +222 -0

222 lines not on this page · raw message

arch/hexagon/include/asm/fpu.h new file +4 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/fpu.h
===================================================================
@@ -0,0 +1,4 @@
+/*
+ * If the FPU is used inside the kernel,
+ * kernel_fpu_end() will be defined here.
+ */
arch/hexagon/include/asm/ftrace.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ftrace.h
===================================================================
@@ -0,0 +1 @@
+/*  Function trace code to go here.  */
arch/hexagon/include/asm/futex.h new file +137 -0

137 lines not on this page · raw message

arch/hexagon/include/asm/hw_irq.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/hw_irq.h
===================================================================
@@ -0,0 +1 @@
+/*  this space intentionally left blank  */
arch/hexagon/include/asm/linkage.h new file +25 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/linkage.h
===================================================================
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN		.align 4
+#define __ALIGN_STR	".align 4"
+
+#endif
arch/hexagon/include/asm/module.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/module.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_MODULE_H
+#define _ASM_MODULE_H
+
+#include <asm-generic/module.h>
+
+#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
+
+#endif
arch/hexagon/include/asm/param.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/param.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_PARAM_H
+#define _ASM_PARAM_H
+
+#define EXEC_PAGESIZE	16384
+
+#include <asm-generic/param.h>
+
+#endif
arch/hexagon/include/asm/pci.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/pci.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/pci.h>
arch/hexagon/include/asm/segment.h new file +3 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/segment.h
===================================================================
@@ -0,0 +1,3 @@
+#ifndef _ASM_SEGMENT_H
+#define _ASM_SEGMENT_H
+#endif
arch/hexagon/include/asm/stat.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/stat.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/stat.h>
arch/hexagon/include/asm/string.h new file +32 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/string.h
===================================================================
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_STRING_H_
+#define _ASM_STRING_H_
+
+#ifdef __KERNEL__
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
+
+/*  ToDo:  use dczeroa, accelerate the compiler-constant zero case  */
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *__to, int c, size_t __n);
+#endif
+
+
+#endif /* _ASM_STRING_H_ */
arch/hexagon/include/asm/suspend.h new file +27 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/suspend.h
===================================================================
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SUSPEND_H
+#define _ASM_SUSPEND_H
+
+static inline int arch_prepare_suspend(void)
+{
+	return 0;
+}
+
+#endif
arch/hexagon/include/asm/swab.h new file +24 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/swab.h
===================================================================
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SWAB_H
+#define _ASM_SWAB_H
+
+#define __SWAB_64_THRU_32__
+
+#endif
arch/hexagon/include/asm/timex.h new file +29 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/timex.h
===================================================================
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TIMEX_H
+#define _ASM_TIMEX_H
+
+#include <asm-generic/timex.h>
+#include <asm/timer-regs.h>
+
+/*  Using TCX0 as our clock.  */
+#define CLOCK_TICK_RATE		TCX0_CLK_RATE
+
+#endif
+
arch/hexagon/include/asm/perf_event.h new file +24 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/perf_event.h
===================================================================
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_PERF_EVENT_H
+#define _ASM_PERF_EVENT_H
+
+#define PERF_EVENT_INDEX_OFFSET	0
+
+#endif /* _ASM_PERF_EVENT_H */

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#4 lore raw

Re: [patch 02/36] Hexagon: Core arch-specific header files

arch/hexagon/include/asm/timex.h line 28

Quoted 10 lines · On Wednesday 17 August 2011 11:34:59 Richard Kuo wrote:
arch/hexagon/include/asm/timex.h new file +10 -0
+#ifndef _ASM_TIMEX_H
+#define _ASM_TIMEX_H
+
+#include <asm-generic/timex.h>
+#include <asm/timer-regs.h>
+
+/*  Using TCX0 as our clock.  */
+#define CLOCK_TICK_RATE		TCX0_CLK_RATE
+
+#endif

CLOCK_TICK_RATE will no longer be there in Linux-3.2, after a patch from Deepak Saxena. If you rely on it anywhere, change that to use your TCX0_CLK_RATE directly.

Arnd

#5 lore raw

PATCH 3/36 Hexagon: Add bitops support

In reply to Richard Kuo
---
 arch/hexagon/include/asm/bitops.h       |  219 ++++++++++++++++++++++++++++++++
 arch/hexagon/include/asm/bitops/__ffs.h |   42 ++++++
 arch/hexagon/include/asm/bitops/__fls.h |   41 +++++
 arch/hexagon/include/asm/bitops/ffs.h   |   43 ++++++
 arch/hexagon/include/asm/bitops/ffz.h   |   38 +++++
 arch/hexagon/include/asm/bitops/fls.h   |   42 ++++++
 6 files changed, 425 insertions(+)
arch/hexagon/include/asm/bitops.h new file +219 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/bitops.h
===================================================================
@@ -0,0 +1,219 @@
+/*
+ * Bit operations for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_BITOPS_H
+#define _ASM_BITOPS_H
+
+#include <linux/compiler.h>
+#include <asm/byteorder.h>
+#include <asm/system.h>
+#include <asm/atomic.h>
+
+#ifdef __KERNEL__
+
+#define smp_mb__before_clear_bit()	barrier()
+#define smp_mb__after_clear_bit()	barrier()
+
+/*
+ * The offset calculations for these are based on BITS_PER_LONG == 32
+ * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access),
+ * mask by 0x0000001F)
+ *
+ * Typically, R10 is clobbered for address, R11 bit nr, and R12 is temp
+ */
+
+/**
+ * test_and_clear_bit - clear a bit and return its old value
+ * @nr:  bit number to clear
+ * @addr:  pointer to memory
+ */
+static inline int test_and_clear_bit(int nr, volatile void *addr)
+{
+	int oldval;
+
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
+	: "=&r" (oldval)
+	: "r" (addr), "r" (nr)
+	: "r10", "r11", "r12", "p0", "p1", "memory"
+	);
+
+	return oldval;
+}
+
+/**
+ * test_and_set_bit - set a bit and return its old value
+ * @nr:  bit number to set
+ * @addr:  pointer to memory
+ */
+static inline int test_and_set_bit(int nr, volatile void *addr)
+{
+	int oldval;
+
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
+	: "=&r" (oldval)
+	: "r" (addr), "r" (nr)
+	: "r10", "r11", "r12", "p0", "p1", "memory"
+	);
+
+
+	return oldval;
+
+}
+
+/**
+ * test_and_change_bit - toggle a bit and return its old value
+ * @nr:  bit number to set
+ * @addr:  pointer to memory
+ */
+static inline int test_and_change_bit(int nr, volatile void *addr)
+{
+	int oldval;
+
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
+	: "=&r" (oldval)
+	: "r" (addr), "r" (nr)
+	: "r10", "r11", "r12", "p0", "p1", "memory"
+	);
+
+	return oldval;
+
+}
+
+/*
+ * Atomic, but doesn't care about the return value.
+ * Rewrite later to save a cycle or two.
+ */
+
+static inline void clear_bit(int nr, volatile void *addr)
+{
+	test_and_clear_bit(nr, addr);
+}
+
+static inline void set_bit(int nr, volatile void *addr)
+{
+	test_and_set_bit(nr, addr);
+}
+
+static inline void change_bit(int nr, volatile void *addr)
+{
+	test_and_change_bit(nr, addr);
+}
+
+
+/*
+ * These are allowed to be non-atomic.  In fact the generic flavors are
+ * in non-atomic.h.  Would it be better to use intrinsics for this?
+ *
+ * OK, writes in our architecture do not invalidate LL/SC, so this has to
+ * be atomic, particularly for things like slab_lock and slab_unlock.
+ *
+ */
+static inline void __clear_bit(int nr, volatile unsigned long *addr)
+{
+	test_and_clear_bit(nr, addr);
+}
+
+static inline void __set_bit(int nr, volatile unsigned long *addr)
+{
+	test_and_set_bit(nr, addr);
+}
+
+static inline void __change_bit(int nr, volatile unsigned long *addr)
+{
+	test_and_change_bit(nr, addr);
+}
+
+/*  Apparently, at least some of these are allowed to be non-atomic  */
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	return test_and_clear_bit(nr, addr);
+}
+
+static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	return test_and_set_bit(nr, addr);
+}
+
+static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
+{
+	return test_and_change_bit(nr, addr);
+}
+
+static inline int __test_bit(int nr, const volatile unsigned long *addr)
+{
+	int retval;
+
+	asm volatile(
+	"{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n"
+	: "=&r" (retval)
+	: "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG)
+	: "p0"
+	);
+
+	return retval;
+}
+
+#define test_bit(nr, addr) __test_bit(nr, addr)
+
+#ifdef CONFIG_HEXAGON_BITOPS
+#include <asm/bitops/ffz.h>
+#include <asm/bitops/fls.h>
+#include <asm/bitops/ffs.h>
+#include <asm/bitops/__ffs.h>
+#include <asm/bitops/__fls.h>
+#else
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/__ffs.h>
+#define __fls(x) (fls(x) - 1)
+#endif
+
+#include <asm-generic/bitops/lock.h>
+#include <asm-generic/bitops/find.h>
+
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/hweight.h>
+
+#include <asm-generic/bitops/le.h>
+#include <asm-generic/bitops/ext2-atomic.h>
+
+#endif /* __KERNEL__ */
+#endif
arch/hexagon/include/asm/bitops/__ffs.h new file +42 -0

42 lines not on this page · raw message

arch/hexagon/include/asm/bitops/__fls.h new file +41 -0

41 lines not on this page · raw message

arch/hexagon/include/asm/bitops/ffs.h new file +43 -0

43 lines not on this page · raw message

arch/hexagon/include/asm/bitops/ffz.h new file +38 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/bitops/ffz.h
===================================================================
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_BITOPS_FFZ_H_
+#define _ASM_BITOPS_FFZ_H_
+
+/*
+ * ffz - find first zero in word.
+ * @word: The word to search
+ *
+ * Undefined if no zero exists, so code should check against ~0UL first.
+ */
+static inline int ffz(int x)
+{
+	int r;
+
+	asm volatile("%0 = ct1(%1);\n"
+		: "=&r" (r)
+		: "r" (x));
+	return r;
+}
+
+#endif
arch/hexagon/include/asm/bitops/fls.h new file +42 -0

42 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#6 lore raw

Re: [patch 03/36] Hexagon: Add bitops support

Quoted 4 lines · On Wednesday 17 August 2011 11:35:00 Richard Kuo wrote:
arch/hexagon/include/asm/bitops.h new file +4 -0
+
+#ifdef CONFIG_HEXAGON_BITOPS
+#include <asm/bitops/ffz.h>
+#include <asm/bitops/fls.h>

arch/hexagon/include/asm/bitops.h line 206

Quoted 10 lines
arch/hexagon/include/asm/bitops.h new file +10 -0
+#include <asm/bitops/ffs.h>
+#include <asm/bitops/__ffs.h>
+#include <asm/bitops/__fls.h>
+#else
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/__ffs.h>
+#define __fls(x) (fls(x) - 1)
+#endif

Is there a particular reason why this is configurable? Also, I see no reaons to split these up into lots of files. Just put all of them into one file.

Quoted 9 lines
arch/hexagon/include/asm/bitops/__ffs.h new file +9 -0
+/*
+ * __ffs - find first bit in word.
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ *
+ * bits_per_long assumed to be 32
+ * numbering starts at 0 I think (instead of 1 like ffs)
+ */

arch/hexagon/include/asm/bitops/__ffs.h line 40

Quoted 10 lines
arch/hexagon/include/asm/bitops/__ffs.h new file +10 -0
+static inline unsigned long __ffs(unsigned long word)
+{
+	int num;
+
+	asm volatile("%0 = ct0(%1);\n"
+		: "=&r" (num)
+		: "r" (word));
+
+	return num;
+}

I think this should not be marked volatile: If the result is unused, there is no need to compute the value either. Same for __fls, ffs, ffz, and fls.

arch/hexagon/include/asm/bitops/ffs.h line 31

Quoted 10 lines
arch/hexagon/include/asm/bitops/ffs.h new file +10 -0
+/*
+ * ffs - find first bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+static inline int ffs(int x)
+{

The type is normally 'long', not 'int'. They are obviously the same length on 32 bit machines, but you might get bogus compiler warnings from this. Same for ffz and fls.

Arnd

#7 lore raw

Re: [patch 03/36] Hexagon: Add bitops support

In reply to Richard Kuo

Hi!

arch/hexagon/include/asm/bitops.h line 58

Quoted 7 lines
arch/hexagon/include/asm/bitops.h new file +7 -0
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"

Nice assembly syntax, btw. I can only wish architectures such as arm used something as readable...
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#8 lore raw

ARM assembly syntax (was Re: [patch 03/36] Hexagon: Add bitops support)

Quoted 12 lines · Pavel Machek

Hi!

arch/hexagon/include/asm/bitops.h line 58

Quoted 7 lines
arch/hexagon/include/asm/bitops.h new file +7 -0
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"

Nice assembly syntax, btw. I can only wish architectures such as arm used something as readable...

Yes, I, too, was very pleasantly surprised when I first saw this.

Of course, one *could* alter binutils to accept something similar for ARM, and then alter gcc to spit it out. Whether anyone would use this isn't clear .. and I can already almost hear certain maintainers telling us how much of a bad idea this is from the maintainership point-of-view ....

--linas

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#9 lore raw

Re: ARM assembly syntax (was Re: [patch 03/36] Hexagon: Add bitops support)

Quoted 14 lines · Pavel Machek
Quoted 12 lines

Hi!

arch/hexagon/include/asm/bitops.h line 58

Quoted 7 lines
arch/hexagon/include/asm/bitops.h new file +7 -0
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"

Nice assembly syntax, btw. I can only wish architectures such as arm used something as readable...

Quoted 4 lines

Yes, I, too, was very pleasantly surprised when I first saw this.

Of course, one *could* alter binutils to accept something similar for ARM, and then alter gcc to spit it out. Whether anyone would use

Well, it would be enough if binutils accepted this; making gcc generate it is optional. It would be mostly used for inline assembly etc...

Quoted 3 lines

this isn't clear .. and I can already almost hear certain maintainers telling us how much of a bad idea this is from the maintainership point-of-view ....

Well, on x86, we already have at&t and intel assembly syntax. Having one that was readable would be bonus :-).

[I don't expect anyone to _write_ assembly for unknown processor; but being able to _read_ unfamiliar assembly would be already huge step forward.]

And yes, I did notice it is VLIW. Those {} make it pretty obvious.

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#10 lore raw

Re: [patch 03/36] Hexagon: Add bitops support

In reply to Pavel Machek
Quoted 12 lines · Pavel Machek

Hi!

arch/hexagon/include/asm/bitops.h line 58

Quoted 7 lines
arch/hexagon/include/asm/bitops.h new file +7 -0
+	__asm__ __volatile__ (
+	"	{R10 = %1; R11 = asr(%2,#5); }\n"
+	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
+	"1:	R12 = memw_locked(R10);\n"
+	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
+	"	memw_locked(R10,P1) = R12;\n"
+	"	{if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"

Nice assembly syntax, btw. I can only wish architectures such as arm used something as readable...

The Blackfin syntax looks similar. Now you may call me old-fashioned if you want, but I personally find traditional assembler syntax much easier to work with.

Signature · 2 lines
Måns Rullgård
[email protected]
#11 lore raw

PATCH 4/36 Hexagon: Add atomic ops support

In reply to Richard Kuo

Our architecture uses load locked/store conditional type semantics for atomic ops.

---
 arch/hexagon/include/asm/atomic.h |  157 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 157 insertions(+)
arch/hexagon/include/asm/atomic.h new file +157 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/atomic.h
===================================================================
@@ -0,0 +1,157 @@
+/*
+ * Atomic operations for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_ATOMIC_H
+#define _ASM_ATOMIC_H
+
+#include <linux/types.h>
+
+#define ATOMIC_INIT(i)		{ (i) }
+#define atomic_set(v, i)	((v)->counter = (i))
+
+/**
+ * atomic_read - reads a word, atomically
+ * @v: pointer to atomic value
+ *
+ * Assumes all word reads on our architecture are atomic.
+ */
+#define atomic_read(v)		((v)->counter)
+
+/**
+ * atomic_xchg - atomic
+ * @v: pointer to memory to change
+ * @new: new value (technically passed in a register -- see xchg)
+ */
+#define atomic_xchg(v, new)	(xchg(&((v)->counter), (new)))
+
+
+/**
+ * atomic_cmpxchg - atomic compare-and-exchange values
+ * @v: pointer to value to change
+ * @old:  desired old value to match
+ * @new:  new value to put in
+ *
+ * Parameters are then pointer, value-in-register, value-in-register,
+ * and the output is the old value.
+ *
+ * Apparently this is complicated for archs that don't support
+ * the memw_locked like we do (or it's broken or whatever).
+ *
+ * Kind of the lynchpin of the rest of the generically defined routines.
+ * Remember V2 had that bug with dotnew predicate set by memw_locked.
+ *
+ * "old" is "expected" old val, __oldval is actual old value
+ */
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+	int __oldval;
+
+	asm volatile(
+		"1:	%0 = memw_locked(%1);\n"
+		"	{ P0 = cmp.eq(%0,%2);\n"
+		"	  if (!P0.new) jump:nt 2f; }\n"
+		"	memw_locked(%1,P0) = %3;\n"
+		"	if (!P0) jump 1b;\n"
+		"2:\n"
+		: "=&r" (__oldval)
+		: "r" (&v->counter), "r" (old), "r" (new)
+		: "memory", "p0"
+	);
+
+	return __oldval;
+}
+
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+	int output;
+
+	__asm__ __volatile__ (
+		"1:	%0 = memw_locked(%1);\n"
+		"	%0 = add(%0,%2);\n"
+		"	memw_locked(%1,P3)=%0;\n"
+		"	if !P3 jump 1b;\n"
+		: "=&r" (output)
+		: "r" (&v->counter), "r" (i)
+		: "memory", "p3"
+	);
+	return output;
+
+}
+
+#define atomic_add(i, v) atomic_add_return(i, (v))
+
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+	int output;
+	__asm__ __volatile__ (
+		"1:	%0 = memw_locked(%1);\n"
+		"	%0 = sub(%0,%2);\n"
+		"	memw_locked(%1,P3)=%0\n"
+		"	if !P3 jump 1b;\n"
+		: "=&r" (output)
+		: "r" (&v->counter), "r" (i)
+		: "memory", "p3"
+	);
+	return output;
+}
+
+#define atomic_sub(i, v) atomic_sub_return(i, (v))
+
+/**
+ * atomic_add_unless - add unless the number is a given value
+ * @v: pointer to value
+ * @a: amount to add
+ * @u: unless value is equal to u
+ *
+ * This is actually in the asm-generic version; should revisit this
+ * entire file...
+ */
+static inline int __atomic_add_unless(atomic_t *v, int a, int u)
+{
+	int c, old;
+
+	c = atomic_read(v);
+	for (;;) {
+		if (unlikely(c == u))
+			break;
+		old = atomic_cmpxchg((v), c, c + a);
+		if (likely(old == c))
+			break;
+		c = old;
+	}
+	return c != u;
+}
+
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+#define atomic_inc(v) atomic_add(1, (v))
+#define atomic_dec(v) atomic_sub(1, (v))
+
+#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
+#define atomic_sub_and_test(i, v) (atomic_sub_return(i, (v)) == 0)
+#define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0)
+
+
+#define atomic_inc_return(v) (atomic_add_return(1, v))
+#define atomic_dec_return(v) (atomic_sub_return(1, v))
+
+#endif

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#12 lore raw

Re: [patch 04/36] Hexagon: Add atomic ops support

Quoted 14 lines · On Wednesday 17 August 2011 11:35:01 Richard Kuo wrote:
arch/hexagon/include/asm/atomic.h new file +14 -0
+/**
+ * atomic_add_unless - add unless the number is a given value
+ * @v: pointer to value
+ * @a: amount to add
+ * @u: unless value is equal to u
+ *
+ * This is actually in the asm-generic version; should revisit this
+ * entire file...
+ */
+static inline int __atomic_add_unless(atomic_t *v, int a, int u)
+{
+       int c, old;
+
+       c = atomic_read(v);

arch/hexagon/include/asm/atomic.h line 141

Quoted 10 lines
arch/hexagon/include/asm/atomic.h new file +10 -0
+       for (;;) {
+               if (unlikely(c == u))
+                       break;
+               old = atomic_cmpxchg((v), c, c + a);
+               if (likely(old == c))
+                       break;
+               c = old;
+       }
+       return c != u;
+}

It's probably worth doing this in a single inline assembly instead of two nested loops (the second one being inside of atomic_cmpxchg.

Arnd

#13 lore raw

PATCH 5/36 Hexagon: Add syscalls

In reply to Richard Kuo
---
 arch/hexagon/include/asm/syscall.h |   45 ++++++++++
 arch/hexagon/include/asm/unistd.h  |   49 +++++++++++
 arch/hexagon/kernel/syscall.c      |  164 +++++++++++++++++++++++++++++++++++++
 arch/hexagon/kernel/syscalltab.c   |   32 +++++++
 4 files changed, 290 insertions(+)
arch/hexagon/include/asm/syscall.h new file +45 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/syscall.h
===================================================================
@@ -0,0 +1,45 @@
+/*
+ * Syscall support for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_HEXAGON_SYSCALL_H
+#define _ASM_HEXAGON_SYSCALL_H
+
+typedef long (*syscall_fn)(unsigned long, unsigned long,
+	unsigned long, unsigned long,
+	unsigned long, unsigned long);
+
+asmlinkage int sys_execve(char __user *ufilename, char __user * __user *argv,
+			  char __user * __user *envp);
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+			 unsigned long parent_tidp, unsigned long child_tidp);
+
+asmlinkage int sys_fork(void);
+asmlinkage int sys_vfork(void);
+
+#define sys_execve	sys_execve
+#define sys_clone	sys_clone
+#define sys_fork	sys_fork
+#define sys_vfork	sys_vfork
+
+#include <asm-generic/syscalls.h>
+
+extern void *sys_call_table[];
+
+#endif
arch/hexagon/include/asm/unistd.h new file +49 -0

49 lines not on this page · raw message

arch/hexagon/kernel/syscall.c new file +164 -0

164 lines not on this page · raw message

arch/hexagon/kernel/syscalltab.c new file +32 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/syscalltab.c
===================================================================
@@ -0,0 +1,32 @@
+/*
+ * System call table for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/syscalls.h>
+#include <linux/signal.h>
+#include <linux/unistd.h>
+
+#include <asm/syscall.h>
+
+#undef __SYSCALL
+#define __SYSCALL(nr, call) [nr] = (call),
+
+void *sys_call_table[__NR_syscalls] = {
+#include <asm/unistd.h>
+};

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#14 lore raw

Re: [patch 05/36] Hexagon: Add syscalls

Quoted 11 lines · On Wednesday 17 August 2011 11:35:02 Richard Kuo wrote:
arch/hexagon/include/asm/unistd.h new file +11 -0
+#if !defined(_ASM_HEXAGON_UNISTD_H) || defined(__SYSCALL)
+#define _ASM_HEXAGON_UNISTD_H
+
+/*
+ *  The kernel pulls this unistd.h in three different ways:
+ *  1.  the "normal" way which gets all the __NR defines
+ *  2.  with __SYSCALL defined to produce function declarations
+ *  3.  with __SYSCALL defined to produce syscall table initialization
+ *  See also:  syscalltab.c
+ */
+

arch/hexagon/include/asm/unistd.h line 41

Quoted 10 lines
arch/hexagon/include/asm/unistd.h new file +10 -0
+#define __ARCH_WANT_SYSCALL_DEPRECATED
+
+#ifndef __GLIBC__
+/* It seems these are all needed for uClibc...
+ * However, if glibc is compiled w/ these turned on, then it will
+ * will fail (typically with 32/64-bit compat problems). */
+#define __ARCH_WANT_SYSCALL_OFF_T
+#define __ARCH_WANT_SYSCALL_NO_AT
+#define __ARCH_WANT_SYSCALL_NO_FLAGS
+#endif

These all need to die if you want to get the code merged. uClibc is a problem for everyone wanting to get a new architecture merged, so I suggest you talk to the unicore32, openrisc and c64x developers that are all facing the same problem.

One of you just has to fix uClibc to make it work for everyone.

arch/hexagon/include/asm/unistd.h line 45

Quoted 3 lines
arch/hexagon/include/asm/unistd.h new file +3 -0
+/*  And the kernel itself wants these...  */
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_SIGPENDING

Can you elaborate? Where does the kernel want these? Can't you fix the callers to use the more modern version?

Quoted 9 lines
arch/hexagon/kernel/syscall.c new file +9 -0
+/*
+ * System calls with architecture-specific wrappers.
+ * See signal.c for signal-related system call wrappers.
+ */
+
+asmlinkage int sys_fork(void)
+{
+	struct pt_regs *pregs = current_thread_info()->regs;
+

arch/hexagon/kernel/syscall.c line 51

Quoted 10 lines
arch/hexagon/kernel/syscall.c new file +10 -0
+	return do_fork(SIGCHLD, pregs->SP, pregs, 0, NULL, NULL);
+}
+
+asmlinkage int sys_vfork(void)
+{
+	struct pt_regs *pregs = current_thread_info()->regs;
+
+	return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD,
+		       pregs->SP, pregs, 0, NULL, NULL);
+}

These should all be handled by sys_clone.

arch/hexagon/kernel/syscall.c line 91

Quoted 9 lines
arch/hexagon/kernel/syscall.c new file +9 -0
+/*
+ * Many archictures support both sys_mmap and sys_mmap2, which use
+ * a common do_mmap2 function to do the work.  So long as we support
+ * only mmap2, we do it all in-line here.
+ */
+asmlinkage int sys_mmap2(unsigned long addr, size_t len, unsigned long prot,
+			 unsigned long flags, unsigned long fd,
+			 unsigned long pgoff)
+{

Just use sys_mmap_pgoff instead of providing your own.

Quoted 1 line

+EXPORT_SYMBOL(kernel_execve);

Why the export?

arch/hexagon/kernel/syscalltab.c

Quoted 4 lines

Index: linux-hexagon-kernel/arch/hexagon/kernel/syscalltab.c
===================================================================

arch/hexagon/kernel/syscalltab.c new file +0 -0

The generic name for this is now sys_call_table.c, so just use that. Or even better, submit a patch to add this to kernel/sys_call_table.c and change score, unicore32, tile and openrisc over to use the same.

Arnd

#15 lore raw

Re: [patch 05/36] Hexagon: Add syscalls

In reply to Richard Kuo

arch/hexagon/include/asm/unistd.h line 42

Quoted 12 lines
arch/hexagon/include/asm/unistd.h new file +12 -0
+
+#define __ARCH_WANT_SYSCALL_DEPRECATED
+
+#ifndef __GLIBC__
+/* It seems these are all needed for uClibc...
+ * However, if glibc is compiled w/ these turned on, then it will
+ * will fail (typically with 32/64-bit compat problems). */
+#define __ARCH_WANT_SYSCALL_OFF_T
+#define __ARCH_WANT_SYSCALL_NO_AT
+#define __ARCH_WANT_SYSCALL_NO_FLAGS
+#endif
+

These are no longer appropriate for the mainline kernel. These definitions are mainly intended to be used during a transitional period until the necessary changes can be made in the required C library.

The recommendation is to just carry these defines as an external patch while the necessary changes are made in uClibc. I've just about got the necessary changes done and will send them to the uClibc mailing list shortly, so hopefully the need for these defines will go away really soon now.

Quoted 4 lines
arch/hexagon/kernel/syscall.c new file +4 -0
+asmlinkage int sys_fork(void)
+{
+       struct pt_regs *pregs = current_thread_info()->regs;
+

arch/hexagon/kernel/syscall.c line 51

Quoted 10 lines
arch/hexagon/kernel/syscall.c new file +10 -0
+       return do_fork(SIGCHLD, pregs->SP, pregs, 0, NULL, NULL);
+}
+
+asmlinkage int sys_vfork(void)
+{
+       struct pt_regs *pregs = current_thread_info()->regs;
+
+       return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD,
+                      pregs->SP, pregs, 0, NULL, NULL);
+}

These two are deprecated.

/Jonas
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html

#16 lore raw

PATCH 6/36 Hexagon: Add processor and system headers

In reply to Richard Kuo

Adds Hexagon information for processor/system type stuff like context switching, register access, and irqflags.

---
 arch/hexagon/include/asm/asm-offsets.h |    1 
 arch/hexagon/include/asm/irqflags.h    |   62 ++++++++
 arch/hexagon/include/asm/processor.h   |  122 +++++++++++++++++
 arch/hexagon/include/asm/registers.h   |  236 +++++++++++++++++++++++++++++++++
 arch/hexagon/include/asm/system.h      |  126 +++++++++++++++++
 5 files changed, 547 insertions(+)
arch/hexagon/include/asm/irqflags.h new file +62 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/irqflags.h
===================================================================
@@ -0,0 +1,62 @@
+/*
+ * IRQ support for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_IRQFLAGS_H
+#define _ASM_IRQFLAGS_H
+
+#include <asm/hexagon_vm.h>
+#include <linux/types.h>
+
+static inline unsigned long arch_local_save_flags(void)
+{
+	return __vmgetie();
+}
+
+static inline unsigned long arch_local_irq_save(void)
+{
+	return __vmsetie(VM_INT_DISABLE);
+}
+
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
+{
+	return !flags;
+}
+
+static inline bool arch_irqs_disabled(void)
+{
+	return !__vmgetie();
+}
+
+static inline void arch_local_irq_enable(void)
+{
+	__vmsetie(VM_INT_ENABLE);
+}
+
+static inline void arch_local_irq_disable(void)
+{
+	__vmsetie(VM_INT_DISABLE);
+}
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+	__vmsetie(flags);
+}
+
+#endif
arch/hexagon/include/asm/processor.h new file +122 -0

122 lines not on this page · raw message

arch/hexagon/include/asm/registers.h new file +236 -0

236 lines not on this page · raw message

arch/hexagon/include/asm/system.h new file +126 -0

126 lines not on this page · raw message

arch/hexagon/include/asm/asm-offsets.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/asm-offsets.h
===================================================================
@@ -0,0 +1 @@
+#include <generated/asm-offsets.h>

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#17 lore raw

Re: [patch 06/36] Hexagon: Add processor and system headers

Review

Quoted 2 lines · On Wednesday 17 August 2011 11:35:03 Richard Kuo wrote:
(quoted diff) +2 -0
+
+#define cpu_relax() barrier()

If you run under a hypervisor, you might want to call a 'yield' hypercall.

Arnd

#18 lore raw

PATCH 7/36 Hexagon: Add threadinfo

In reply to Richard Kuo
---
 arch/hexagon/include/asm/current.h     |    6 +
 arch/hexagon/include/asm/thread_info.h |  197 +++++++++++++++++++++++++++++++++
 2 files changed, 203 insertions(+)
arch/hexagon/include/asm/current.h new file +6 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/current.h
===================================================================
@@ -0,0 +1,6 @@
+#ifndef _ASM_CURRENT_H
+#define _ASM_CURRENT_H
+
+#include <asm-generic/current.h>
+
+#endif /* _ASM_CURRENT_H */
arch/hexagon/include/asm/thread_info.h new file +197 -0

197 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#19 lore raw

Re: [patch 07/36] Hexagon: Add threadinfo

Quoted 14 lines · On Wednesday 17 August 2011 11:35:04 Richard Kuo wrote:
arch/hexagon/include/asm/thread_info.h new file +13 -0
+/*
+ * order is for __get_free_pages; see get_order()
+ */
+
+#ifdef CONFIG_PAGE_SIZE_4KB
+#define THREAD_SIZE	(1<<13)
+#define THREAD_SIZE_ORDER 1
+#endif
+
+#ifdef CONFIG_PAGE_SIZE_16KB
+#define THREAD_SIZE	(1<<14)
+#define THREAD_SIZE_ORDER 0
+#endif

arch/hexagon/include/asm/thread_info.h line 53

Quoted 10 lines
arch/hexagon/include/asm/thread_info.h new file +10 -0
+
+#ifdef CONFIG_PAGE_SIZE_64KB
+#define THREAD_SIZE	(1<<16)
+#define THREAD_SIZE_ORDER 0
+#endif
+
+#ifdef CONFIG_PAGE_SIZE_256KB
+#define THREAD_SIZE	(1<<18)
+#define THREAD_SIZE_ORDER 0
+#endif

If you use pages larger than 16KB, you probably want to use less than a page for the kernel stack and use kmalloc to get it.
See arch/powerpc/include/asm/thread_info.h

Quoted 11 lines
arch/hexagon/include/asm/thread_info.h new file +11 -0
+
+/*
+ * kmalloc is probably not appropriate because alignment seems
+ * not guaranteed out of kmalloc at all, and we assume thread_info
+ * is aligned to THREAD_SIZE all over the place, notably the switch and
+ * entry/exit routines.
+ */
+
+#if 0
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
+#ifdef CONFIG_DEBUG_STACK_USAGE

arch/hexagon/include/asm/thread_info.h line 153

Quoted 10 lines
arch/hexagon/include/asm/thread_info.h new file +10 -0
+#define alloc_thread_info(tsk) \
+	((struct thread_info *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, \
+	THREAD_SIZE_ORDER))
+
+#else   /*  CONFIG_DEBUG_STACK_USAGE  */
+#define alloc_thread_info(tsk) \
+	((struct thread_info *)__get_free_pages(GFP_KERNEL, \
+	THREAD_SIZE_ORDER))
+#endif  /*  ! CONFIG_DEBUG_STACK_USAGE  */
+

You don't have to align the thread_info if you use different implementation of current_thread_info. One way to do it would be to have a per-cpu variable pointing to the current thread_info and use the TLS mechanism to point to percpu data, instead of getting the percpu offset from thread_info.

Arnd

#20 lore raw

PATCH 8/36 Hexagon: Add delay functions

In reply to Richard Kuo
---
 arch/hexagon/include/asm/delay.h |   30 ++++++++++++++++++++++++++++++
 arch/hexagon/kernel/delay.S      |   30 ++++++++++++++++++++++++++++++
 2 files changed, 60 insertions(+)
arch/hexagon/include/asm/delay.h new file +30 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/delay.h
===================================================================
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_DELAY_H
+#define _ASM_DELAY_H
+
+#include <asm/param.h>
+
+extern void __udelay(unsigned long usecs);
+
+#define udelay(usecs) __udelay((usecs))
+
+extern void __delay(unsigned long loops);
+
+#endif /* _ASM_DELAY_H */
arch/hexagon/kernel/delay.S new file +30 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/delay.S
===================================================================
@@ -0,0 +1,30 @@
+/*
+ * __delay loop implementation for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/linkage.h>
+#include <asm/hexagon_vm.h>
+
+ENTRY(__delay)
+	loop0(1f,r0)
+1:
+	{
+		nop
+	}:endloop0
+	jumpr	R31

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#21 lore raw

Re: [patch 08/36] Hexagon: Add delay functions

arch/hexagon/include/asm/delay.h line 28

Quoted 7 lines · On Wednesday 17 August 2011 11:35:05 Richard Kuo wrote:
arch/hexagon/include/asm/delay.h new file +7 -0
+#include <asm/param.h>
+
+extern void __udelay(unsigned long usecs);
+
+#define udelay(usecs) __udelay((usecs))
+
+extern void __delay(unsigned long loops);

If you have any kind of reliable timer register, it's better to poll that than to rely on a delay loop that is especially inaccurate when running under a hypervisor.

That also speeds up boot time because you no longer need to calibrate the delay loop.

Arnd

#22 lore raw

PATCH 9/36 Hexagon: Add checksum functions

In reply to Richard Kuo
---
 arch/hexagon/include/asm/checksum.h   |   91 +++++++++++
 arch/hexagon/include/asm/intrinsics.h |   26 +++
 arch/hexagon/lib/checksum.c           |  269 ++++++++++++++++++++++++++++++++++
 3 files changed, 386 insertions(+)
arch/hexagon/include/asm/checksum.h new file +91 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/checksum.h
===================================================================
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_CHECKSUM_H
+#define _ASM_CHECKSUM_H
+
+#include <linux/in6.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+__wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+__wsum csum_partial_copy_nocheck(const void *src, void *dst,
+					int len, __wsum sum);
+
+/*
+ * the same as csum_partial_copy, but copies from user space.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+					int len, __wsum sum, int *csum_err);
+
+
+/*
+ *	This is a version of ip_compute_csum() optimized for IP headers,
+ *	which always checksum on 4 octet boundaries.
+ *
+ */
+__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
+
+/*
+ *	Fold a partial checksum
+ */
+static inline __sum16 csum_fold(__wsum csum)
+{
+	u32 sum = (__force u32)csum;
+	sum = (sum & 0xffff) + (sum >> 16);
+	sum = (sum & 0xffff) + (sum >> 16);
+	return (__force __sum16)~sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+__wsum csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr,
+	unsigned short len, unsigned short proto, __wsum sum);
+__sum16 csum_tcpudp_magic(unsigned long saddr, unsigned long daddr,
+	unsigned short len, unsigned short proto, __wsum sum);
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+__sum16 ip_compute_csum(const void *buff, int len);
+
+#endif
arch/hexagon/include/asm/intrinsics.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/intrinsics.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_HEXAGON_INTRINSICS_H
+#define _ASM_HEXAGON_INTRINSICS_H
+
+#define HEXAGON_P_vrmpyhacc_PP	__builtin_HEXAGON_M2_vrmac_s0
+#define HEXAGON_P_vrmpyh_PP	__builtin_HEXAGON_M2_vrmpy_s0
+#define HEXAGON_R_cl0_R		__builtin_HEXAGON_S2_cl0
+
+#endif
arch/hexagon/lib/checksum.c new file +269 -0

269 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#23 lore raw

Re: [patch 09/36] Hexagon: Add checksum functions

Quoted 7 lines · On Wednesday 17 August 2011 11:35:06 Richard Kuo wrote:
---
 arch/hexagon/include/asm/checksum.h   |   91 +++++++++++
 arch/hexagon/include/asm/intrinsics.h |   26 +++
 arch/hexagon/lib/checksum.c           |  269 ++++++++++++++++++++++++++++++++++
 3 files changed, 386 insertions(+)

I think you should be able to use the generic implementation for the bits that don't have hexagon specific assembly in them, to simplify the code.

Arnd

#24 lore raw

PATCH 10/36 Hexagon: Add memcpy and memset accelerated functions

In reply to Richard Kuo
---
 arch/hexagon/lib/memcpy.S |  543 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/hexagon/lib/memset.S |  316 ++++++++++++++++++++++++++
 2 files changed, 859 insertions(+)
arch/hexagon/lib/memcpy.S new file +543 -0
Index: linux-hexagon-kernel/arch/hexagon/lib/memcpy.S
===================================================================
@@ -0,0 +1,543 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+/*
+ * Description
+ *
+ *   library function for memcpy where length bytes are copied from
+ *   ptr_in to ptr_out. ptr_out is returned unchanged.
+ *   Allows any combination of alignment on input and output pointers
+ *   and length from 0 to 2^32-1
+ *
+ * Restrictions
+ *   The arrays should not overlap, the program will produce undefined output
+ *   if they do.
+ *   For blocks less than 16 bytes a byte by byte copy is performed. For
+ *   8byte alignments, and length multiples, a dword copy is performed up to
+ *   96bytes
+ * History
+ *
+ *   DJH  5/15/09 Initial version 1.0
+ *   DJH  6/ 1/09 Version 1.1 modified ABI to inlcude R16-R19
+ *   DJH  7/12/09 Version 1.2 optimized codesize down to 760 was 840
+ *   DJH 10/14/09 Version 1.3 added special loop for aligned case, was
+ *                            overreading bloated codesize back up to 892
+ *   DJH  4/20/10 Version 1.4 fixed Ldword_loop_epilog loop to prevent loads
+ *                            occuring if only 1 left outstanding, fixes bug
+ *                            # 3888, corrected for all alignments. Peeled off
+ *                            1 32byte chunk from kernel loop and extended 8byte
+ *                            loop at end to solve all combinations and prevent
+ *                            over read.  Fixed Ldword_loop_prolog to prevent
+ *                            overread for blocks less than 48bytes. Reduced
+ *                            codesize to 752 bytes
+ *   DJH  4/21/10 version 1.5 1.4 fix broke code for input block ends not
+ *                            aligned to dword boundaries,underwriting by 1
+ *                            byte, added detection for this and fixed. A
+ *                            little bloat.
+ *   DJH  4/23/10 version 1.6 corrected stack error, R20 was not being restored
+ *                            always, fixed the error of R20 being modified
+ *                            before it was being saved
+ * Natural c model
+ * ===============
+ * void * memcpy(char * ptr_out, char * ptr_in, int length) {
+ *   int i;
+ *   if(length) for(i=0; i < length; i++) { ptr_out[i] = ptr_in[i]; }
+ *   return(ptr_out);
+ * }
+ *
+ * Optimized memcpy function
+ * =========================
+ * void * memcpy(char * ptr_out, char * ptr_in, int len) {
+ *   int i, prolog, kernel, epilog, mask;
+ *   u8 offset;
+ *   s64 data0, dataF8, data70;
+ *
+ *   s64 * ptr8_in;
+ *   s64 * ptr8_out;
+ *   s32 * ptr4;
+ *   s16 * ptr2;
+ *
+ *   offset = ((int) ptr_in) & 7;
+ *   ptr8_in = (s64 *) &ptr_in[-offset];   //read in the aligned pointers
+ *
+ *   data70 = *ptr8_in++;
+ *   dataF8 = *ptr8_in++;
+ *
+ *   data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *
+ *   prolog = 32 - ((int) ptr_out);
+ *   mask  = 0x7fffffff >> HEXAGON_R_cl0_R(len);
+ *   prolog = prolog & mask;
+ *   kernel = len - prolog;
+ *   epilog = kernel & 0x1F;
+ *   kernel = kernel>>5;
+ *
+ *   if (prolog & 1) { ptr_out[0] = (u8) data0; data0 >>= 8; ptr_out += 1;}
+ *   ptr2 = (s16 *) &ptr_out[0];
+ *   if (prolog & 2) { ptr2[0] = (u16) data0;  data0 >>= 16; ptr_out += 2;}
+ *   ptr4 = (s32 *) &ptr_out[0];
+ *   if (prolog & 4) { ptr4[0] = (u32) data0;  data0 >>= 32; ptr_out += 4;}
+ *
+ *   offset = offset + (prolog & 7);
+ *   if (offset >= 8) {
+ *     data70 = dataF8;
+ *     dataF8 = *ptr8_in++;
+ *   }
+ *   offset = offset & 0x7;
+ *
+ *   prolog = prolog >> 3;
+ *   if (prolog) for (i=0; i < prolog; i++) {
+ *       data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       data70 = dataF8;
+ *       dataF8 = *ptr8_in++;
+ *   }
+ *   if(kernel) { kernel -= 1; epilog += 32; }
+ *   if(kernel) for(i=0; i < kernel; i++) {
+ *       data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       data70 = *ptr8_in++;
+ *
+ *       data0 = HEXAGON_P_valignb_PPp(data70, dataF8, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       dataF8 = *ptr8_in++;
+ *
+ *       data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       data70 = *ptr8_in++;
+ *
+ *       data0 = HEXAGON_P_valignb_PPp(data70, dataF8, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       dataF8 = *ptr8_in++;
+ *   }
+ *   epilogdws = epilog >> 3;
+ *   if (epilogdws) for (i=0; i < epilogdws; i++) {
+ *       data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *       ptr8_out = (s64 *) &ptr_out[0]; *ptr8_out = data0; ptr_out += 8;
+ *       data70 = dataF8;
+ *       dataF8 = *ptr8_in++;
+ *   }
+ *   data0 = HEXAGON_P_valignb_PPp(dataF8, data70, offset);
+ *
+ *   ptr4 = (s32 *) &ptr_out[0];
+ *   if (epilog & 4) { ptr4[0] = (u32) data0; data0 >>= 32; ptr_out += 4;}
+ *   ptr2 = (s16 *) &ptr_out[0];
+ *   if (epilog & 2) { ptr2[0] = (u16) data0; data0 >>= 16; ptr_out += 2;}
+ *   if (epilog & 1) { *ptr_out++ = (u8) data0; }
+ *
+ *   return(ptr_out - length);
+ * }
+ *
+ * Codesize : 784 bytes
+ */
+
+
+#define ptr_out		R0	/*  destination  pounter  */
+#define ptr_in		R1	/*  source pointer  */
+#define len		R2	/*  length of copy in bytes  */
+
+#define data70		R13:12	/*  lo 8 bytes of non-aligned transfer  */
+#define dataF8		R11:10	/*  hi 8 bytes of non-aligned transfer  */
+#define ldata0		R7:6	/*  even 8 bytes chunks  */
+#define ldata1		R25:24	/*  odd 8 bytes chunks  */
+#define data1		R7	/*  lower 8 bytes of ldata1  */
+#define data0		R6	/*  lower 8 bytes of ldata0  */
+
+#define ifbyte		p0	/*  if transfer has bytes in epilog/prolog  */
+#define ifhword		p0	/*  if transfer has shorts in epilog/prolog  */
+#define ifword		p0	/*  if transfer has words in epilog/prolog  */
+#define noprolog	p0	/*  no prolog, xfer starts at 32byte  */
+#define nokernel	p1	/*  no 32byte multiple block in the transfer  */
+#define noepilog	p0	/*  no epilog, xfer ends on 32byte boundary  */
+#define align		p2	/*  alignment of input rel to 8byte boundary  */
+#define kernel1		p0	/*  kernel count == 1  */
+
+#define dalign		R25	/*  rel alignment of input to output data  */
+#define star3		R16	/*  number bytes in prolog - dwords  */
+#define rest		R8	/*  length - prolog bytes  */
+#define back		R7	/*  nr bytes > dword boundary in src block  */
+#define epilog		R3	/*  bytes in epilog  */
+#define inc		R15:14	/*  inc kernel by -1 and defetch ptr by 32  */
+#define kernel		R4	/*  number of 32byte chunks in kernel  */
+#define ptr_in_p_128	R5	/*  pointer for prefetch of input data  */
+#define mask		R8	/*  mask used to determine prolog size  */
+#define shift		R8	/*  used to work a shifter to extract bytes  */
+#define shift2		R5	/*  in epilog to workshifter to extract bytes */
+#define prolog		R15	/*  bytes in  prolog  */
+#define epilogdws	R15	/*  number dwords in epilog  */
+#define shiftb		R14	/*  used to extract bytes  */
+#define offset		R9	/*  same as align in reg  */
+#define ptr_out_p_32	R17	/*  pointer to output dczero  */
+#define align888	R14	/*  if simple dword loop can be used  */
+#define len8		R9	/*  number of dwords in length  */
+#define over		R20	/*  nr of bytes > last inp buf dword boundary */
+
+#define ptr_in_p_128kernel	R5:4	/*  packed fetch pointer & kernel cnt */
+
+	.section .text
+	.p2align 4
+        .global memcpy
+        .type memcpy, @function
+memcpy:
+{
+	p2 = cmp.eq(len, #0);		/*  =0 */
+	align888 = or(ptr_in, ptr_out);	/*  %8 < 97 */
+	p0 = cmp.gtu(len, #23);		/*  %1, <24 */
+	p1 = cmp.eq(ptr_in, ptr_out);	/*  attempt to overwrite self */
+}
+{
+	p1 = or(p2, p1);
+	p3 = cmp.gtu(len, #95);		/*  %8 < 97 */
+	align888 = or(align888, len);	/*  %8 < 97 */
+	len8 = lsr(len, #3);		/*  %8 < 97 */
+}
+{
+	dcfetch(ptr_in);		/*  zero/ptrin=ptrout causes fetch */
+	p2 = bitsclr(align888, #7);	/*  %8 < 97  */
+	if(p1) jumpr r31;		/*  =0  */
+}
+{
+	p2 = and(p2,!p3);			/*  %8 < 97  */
+	if (p2.new) len = add(len, #-8);	/*  %8 < 97  */
+	if (p2.new) jump:NT .Ldwordaligned; 	/*  %8 < 97  */
+}
+{
+	if(!p0) jump .Lbytes23orless;	/*  %1, <24  */
+	mask.l = #LO(0x7fffffff);
+	/*  all bytes before line multiples of data  */
+	prolog = sub(#0, ptr_out);
+}
+{
+	/*  save r31 on stack, decrement sp by 16  */
+	allocframe(#24);
+	mask.h = #HI(0x7fffffff);
+	ptr_in_p_128 = add(ptr_in, #32);
+	back = cl0(len);
+}
+{
+	memd(sp+#0) = R17:16;		/*  save r16,r17 on stack6  */
+	r31.l = #LO(.Lmemcpy_return);	/*  set up final return pointer  */
+	prolog &= lsr(mask, back);
+	offset = and(ptr_in, #7);
+}
+{
+	memd(sp+#8) = R25:24;		/*  save r25,r24 on stack  */
+	dalign = sub(ptr_out, ptr_in);
+	r31.h = #HI(.Lmemcpy_return);	/*  set up final return pointer  */
+}
+{
+	/*  see if there if input buffer end if aligned  */
+	over = add(len, ptr_in);
+	back = add(len, offset);
+	memd(sp+#16) = R21:20;		/*  save r20,r21 on stack  */
+}
+{
+	noprolog = bitsclr(prolog, #7);
+	prolog = and(prolog, #31);
+	dcfetch(ptr_in_p_128);
+	ptr_in_p_128 = add(ptr_in_p_128, #32);
+}
+{
+	kernel = sub(len, prolog);
+	shift = asl(prolog, #3);
+	star3 = and(prolog, #7);
+	ptr_in = and(ptr_in, #-8);
+}
+{
+	prolog = lsr(prolog, #3);
+	epilog = and(kernel, #31);
+	ptr_out_p_32 = add(ptr_out, prolog);
+	over = and(over, #7);
+}
+{
+	p3 = cmp.gtu(back, #8);
+	kernel = lsr(kernel, #5);
+	dcfetch(ptr_in_p_128);
+	ptr_in_p_128 = add(ptr_in_p_128, #32);
+}
+{
+	p1 = cmp.eq(prolog, #0);
+	if(!p1.new) prolog = add(prolog, #1);
+	dcfetch(ptr_in_p_128);	/*  reserve the line 64bytes on  */
+	ptr_in_p_128 = add(ptr_in_p_128, #32);
+}
+{
+	nokernel = cmp.eq(kernel,#0);
+	dcfetch(ptr_in_p_128);	/* reserve the line 64bytes on  */
+	ptr_in_p_128 = add(ptr_in_p_128, #32);
+	shiftb = and(shift, #8);
+}
+{
+	dcfetch(ptr_in_p_128);		/*  reserve the line 64bytes on  */
+	ptr_in_p_128 = add(ptr_in_p_128, #32);
+	if(nokernel) jump .Lskip64;
+	p2 = cmp.eq(kernel, #1);	/*  skip ovr if kernel == 0  */
+}
+{
+	dczeroa(ptr_out_p_32);
+	/*  don't advance pointer  */
+	if(!p2) ptr_out_p_32 = add(ptr_out_p_32, #32);
+}
+{
+	dalign = and(dalign, #31);
+	dczeroa(ptr_out_p_32);
+}
+.Lskip64:
+{
+	data70 = memd(ptr_in++#16);
+	if(p3) dataF8 = memd(ptr_in+#8);
+	if(noprolog) jump .Lnoprolog32;
+	align = offset;
+}
+/*  upto initial 7 bytes  */
+{
+	ldata0 = valignb(dataF8, data70, align);
+	ifbyte = tstbit(shift,#3);
+	offset = add(offset, star3);
+}
+{
+	if(ifbyte) memb(ptr_out++#1) = data0;
+	ldata0 = lsr(ldata0, shiftb);
+	shiftb = and(shift, #16);
+	ifhword = tstbit(shift,#4);
+}
+{
+	if(ifhword) memh(ptr_out++#2) = data0;
+	ldata0 = lsr(ldata0, shiftb);
+	ifword = tstbit(shift,#5);
+	p2 = cmp.gtu(offset, #7);
+}
+{
+	if(ifword) memw(ptr_out++#4) = data0;
+	if(p2) data70 = dataF8;
+	if(p2) dataF8 = memd(ptr_in++#8);	/*  another 8 bytes  */
+	align = offset;
+}
+.Lnoprolog32:
+{
+	p3 = sp1loop0(.Ldword_loop_prolog, prolog)
+	rest = sub(len, star3);	/*  whats left after the loop  */
+	p0 = cmp.gt(over, #0);
+}
+	if(p0) rest = add(rest, #16);
+.Ldword_loop_prolog:
+{
+	if(p3) memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(dataF8, data70, align);
+	p0 = cmp.gt(rest, #16);
+}
+{
+	data70 = dataF8;
+	if(p0) dataF8 = memd(ptr_in++#8);
+	rest = add(rest, #-8);
+}:endloop0
+.Lkernel:
+{
+	/*  kernel is at least 32bytes  */
+	p3 = cmp.gtu(kernel, #0);
+	/*  last itn. remove edge effects  */
+	if(p3.new) kernel = add(kernel, #-1);
+	/*  dealt with in last dword loop  */
+	if(p3.new) epilog = add(epilog, #32);
+}
+{
+	nokernel = cmp.eq(kernel, #0);		/*  after adjustment, recheck */
+	if(nokernel.new) jump:NT .Lepilog;	/*  likely not taken  */
+	inc = combine(#32, #-1);
+	p3 = cmp.gtu(dalign, #24);
+}
+{
+	if(p3) jump .Lodd_alignment;
+}
+{
+	loop0(.Loword_loop_25to31, kernel);
+	kernel1 = cmp.gtu(kernel, #1);
+	rest = kernel;
+}
+	.falign
+.Loword_loop_25to31:
+{
+	dcfetch(ptr_in_p_128);	/*  prefetch 4 lines ahead  */
+	if(kernel1) ptr_out_p_32 = add(ptr_out_p_32, #32);
+}
+{
+	dczeroa(ptr_out_p_32);	/*  reserve the next 32bytes in cache  */
+	p3 = cmp.eq(kernel, rest);
+}
+{
+	/*  kernel -= 1  */
+	ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc);
+	/*  kill write on first iteration  */
+	if(!p3) memd(ptr_out++#8) = ldata1;
+	ldata1 = valignb(dataF8, data70, align);
+	data70 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(data70, dataF8, align);
+	dataF8 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata1;
+	ldata1 = valignb(dataF8, data70, align);
+	data70 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(data70, dataF8, align);
+	dataF8 = memd(ptr_in++#8);
+	kernel1 = cmp.gtu(kernel, #1);
+}:endloop0
+{
+	memd(ptr_out++#8) = ldata1;
+	jump .Lepilog;
+}
+.Lodd_alignment:
+{
+	loop0(.Loword_loop_00to24, kernel);
+	kernel1 = cmp.gtu(kernel, #1);
+	rest = add(kernel, #-1);
+}
+	.falign
+.Loword_loop_00to24:
+{
+	dcfetch(ptr_in_p_128);	/*  prefetch 4 lines ahead  */
+	ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc);
+	if(kernel1) ptr_out_p_32 = add(ptr_out_p_32, #32);
+}
+{
+	dczeroa(ptr_out_p_32);	/*  reserve the next 32bytes in cache  */
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(dataF8, data70, align);
+	data70 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(data70, dataF8, align);
+	dataF8 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(dataF8, data70, align);
+	data70 = memd(ptr_in++#8);
+}
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(data70, dataF8, align);
+	dataF8 = memd(ptr_in++#8);
+	kernel1 = cmp.gtu(kernel, #1);
+}:endloop0
+.Lepilog:
+{
+	noepilog = cmp.eq(epilog,#0);
+	epilogdws = lsr(epilog, #3);
+	kernel = and(epilog, #7);
+}
+{
+	if(noepilog) jumpr r31;
+	if(noepilog) ptr_out = sub(ptr_out, len);
+	p3 = cmp.eq(epilogdws, #0);
+	shift2 = asl(epilog, #3);
+}
+{
+	shiftb = and(shift2, #32);
+	ifword = tstbit(epilog,#2);
+	if(p3) jump .Lepilog60;
+	if(!p3) epilog = add(epilog, #-16);
+}
+{
+	loop0(.Ldword_loop_epilog, epilogdws);
+	/*  stop criteria is lsbs unless = 0 then its 8  */
+	p3 = cmp.eq(kernel, #0);
+	if(p3.new) kernel= #8;
+	p1 = cmp.gt(over, #0);
+}
+	/*  if not aligned to end of buffer execute 1 more iteration  */
+	if(p1) kernel= #0;
+.Ldword_loop_epilog:
+{
+	memd(ptr_out++#8) = ldata0;
+	ldata0 = valignb(dataF8, data70, align);
+	p3 = cmp.gt(epilog, kernel);
+}
+{
+	data70 = dataF8;
+	if(p3) dataF8 = memd(ptr_in++#8);
+	epilog = add(epilog, #-8);
+}:endloop0
+/* copy last 7 bytes */
+.Lepilog60:
+{
+	if(ifword) memw(ptr_out++#4) = data0;
+	ldata0 = lsr(ldata0, shiftb);
+	ifhword = tstbit(epilog,#1);
+	shiftb = and(shift2, #16);
+}
+{
+	if(ifhword) memh(ptr_out++#2) = data0;
+	ldata0 = lsr(ldata0, shiftb);
+	ifbyte = tstbit(epilog,#0);
+	if(ifbyte.new) len = add(len, #-1);
+}
+{
+	if(ifbyte) memb(ptr_out) = data0;
+	ptr_out = sub(ptr_out, len);	/*  return dest pointer  */
+        jumpr r31;
+}
+/*  do byte copy for small n  */
+.Lbytes23orless:
+{
+	p3 = sp1loop0(.Lbyte_copy, len);
+	len = add(len, #-1);
+}
+.Lbyte_copy:
+{
+	data0 = memb(ptr_in++#1);
+	if(p3) memb(ptr_out++#1) = data0;
+}:endloop0
+{
+	memb(ptr_out) = data0;
+	ptr_out = sub(ptr_out, len);
+	jumpr r31;
+}
+/*  do dword copies for aligned in, out and length  */
+.Ldwordaligned:
+{
+	p3 = sp1loop0(.Ldword_copy, len8);
+}
+.Ldword_copy:
+{
+	if(p3) memd(ptr_out++#8) = ldata0;
+	ldata0 = memd(ptr_in++#8);
+}:endloop0
+{
+	memd(ptr_out) = ldata0;
+	ptr_out = sub(ptr_out, len);
+	jumpr r31;	/*  return to function caller  */
+}
+.Lmemcpy_return:
+	r21:20 = memd(sp+#16);	/*  restore r20+r21  */
+{
+	r25:24 = memd(sp+#8);	/*  restore r24+r25  */
+	r17:16 = memd(sp+#0);	/*  restore r16+r17  */
+}
+	deallocframe;	/*  restore r31 and incrment stack by 16  */
+	jumpr r31
arch/hexagon/lib/memset.S new file +316 -0

316 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#25 lore raw

PATCH 11/36 Hexagon: Add hypervisor interface

In reply to Richard Kuo

The port of Linux for Hexagon runs on top of a hypervisor layer, which presents an interface for memory management, events, hardware control, etc.

---
 arch/hexagon/include/asm/hexagon_vm.h  |  280 ++++++++++++++++++++
 arch/hexagon/include/asm/vm_mmu.h      |  111 ++++++++
 arch/hexagon/kernel/vm_entry.S         |  269 ++++++++++++++++++++
 arch/hexagon/kernel/vm_events.c        |  101 +++++++
 arch/hexagon/kernel/vm_init_segtable.S |  442 +++++++++++++++++++++++++++++++++
 arch/hexagon/kernel/vm_ops.S           |  101 +++++++
 arch/hexagon/kernel/vm_switch.S        |   95 +++++++
 arch/hexagon/kernel/vm_vectors.S       |   50 +++
 8 files changed, 1449 insertions(+)
arch/hexagon/include/asm/hexagon_vm.h new file +280 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/hexagon_vm.h
===================================================================
@@ -0,0 +1,280 @@
+/*
+ * Declarations for to Hexagon Virtal Machine.
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef ASM_HEXAGON_VM_H
+#define ASM_HEXAGON_VM_H
+
+/*
+ * In principle, a Linux kernel for the VM could
+ * selectively define the virtual instructions
+ * as inline assembler macros, but for a first pass,
+ * we'll use subroutines for both the VM and the native
+ * kernels.  It's costing a subroutine call/return,
+ * but it makes for a single set of entry points
+ * for tracing/debugging.
+ */
+
+/*
+ * Lets make this stuff visible only if configured,
+ * so we can unconditionally include the file.
+ */
+
+#ifndef __ASSEMBLY__
+
+enum VM_CACHE_OPS {
+	ickill,
+	dckill,
+	l2kill,
+	dccleaninva,
+	icinva,
+	idsync,
+	fetch_cfg
+};
+
+enum VM_INT_OPS {
+	nop,
+	globen,
+	globdis,
+	locen,
+	locdis,
+	affinity,
+	get,
+	peek,
+	status,
+	post,
+	clear
+};
+
+extern void _K_VM_event_vector(void);
+
+void __vmrte(void);
+long __vmsetvec(void *);
+long __vmsetie(long);
+long __vmgetie(void);
+long __vmintop(enum VM_INT_OPS, long, long, long, long);
+long __vmclrmap(void *, unsigned long);
+long __vmnewmap(void *);
+long __vmcache(enum VM_CACHE_OPS op, unsigned long addr, unsigned long len);
+unsigned long long __vmgettime(void);
+long __vmsettime(unsigned long long);
+long __vmstart(void *, void *);
+void __vmstop(void);
+long __vmwait(void);
+void __vmyield(void);
+long __vmvpid(void);
+
+static inline long __vmcache_ickill(void)
+{
+	return __vmcache(ickill, 0, 0);
+}
+
+static inline long __vmcache_dckill(void)
+{
+	return __vmcache(dckill, 0, 0);
+}
+
+static inline long __vmcache_l2kill(void)
+{
+	return __vmcache(l2kill, 0, 0);
+}
+
+static inline long __vmcache_dccleaninva(unsigned long addr, unsigned long len)
+{
+	return __vmcache(dccleaninva, addr, len);
+}
+
+static inline long __vmcache_icinva(unsigned long addr, unsigned long len)
+{
+	return __vmcache(icinva, addr, len);
+}
+
+static inline long __vmcache_idsync(unsigned long addr,
+					   unsigned long len)
+{
+	return __vmcache(idsync, addr, len);
+}
+
+static inline long __vmcache_fetch_cfg(unsigned long val)
+{
+	return __vmcache(fetch_cfg, val, 0);
+}
+
+/* interrupt operations  */
+
+static inline long __vmintop_nop(void)
+{
+	return __vmintop(nop, 0, 0, 0, 0);
+}
+
+static inline long __vmintop_globen(long i)
+{
+	return __vmintop(globen, i, 0, 0, 0);
+}
+
+static inline long __vmintop_globdis(long i)
+{
+	return __vmintop(globdis, i, 0, 0, 0);
+}
+
+static inline long __vmintop_locen(long i)
+{
+	return __vmintop(locen, i, 0, 0, 0);
+}
+
+static inline long __vmintop_locdis(long i)
+{
+	return __vmintop(locdis, i, 0, 0, 0);
+}
+
+static inline long __vmintop_affinity(long i, long cpu)
+{
+	return __vmintop(locdis, i, cpu, 0, 0);
+}
+
+static inline long __vmintop_get(void)
+{
+	return __vmintop(get, 0, 0, 0, 0);
+}
+
+static inline long __vmintop_peek(void)
+{
+	return __vmintop(peek, 0, 0, 0, 0);
+}
+
+static inline long __vmintop_status(long i)
+{
+	return __vmintop(status, i, 0, 0, 0);
+}
+
+static inline long __vmintop_post(long i)
+{
+	return __vmintop(post, i, 0, 0, 0);
+}
+
+static inline long __vmintop_clear(long i)
+{
+	return __vmintop(clear, i, 0, 0, 0);
+}
+
+#else /* Only assembly code should reference these */
+
+#define HVM_TRAP1_VMRTE			1
+#define HVM_TRAP1_VMSETVEC		2
+#define HVM_TRAP1_VMSETIE		3
+#define HVM_TRAP1_VMGETIE		4
+#define HVM_TRAP1_VMINTOP		5
+#define HVM_TRAP1_VMCLRMAP		10
+#define HVM_TRAP1_VMNEWMAP		11
+#define HVM_TRAP1_FORMERLY_VMWIRE	12
+#define HVM_TRAP1_VMCACHE		13
+#define HVM_TRAP1_VMGETTIME		14
+#define HVM_TRAP1_VMSETTIME		15
+#define HVM_TRAP1_VMWAIT		16
+#define HVM_TRAP1_VMYIELD		17
+#define HVM_TRAP1_VMSTART		18
+#define HVM_TRAP1_VMSTOP		19
+#define HVM_TRAP1_VMVPID		20
+#define HVM_TRAP1_VMSETREGS		21
+#define HVM_TRAP1_VMGETREGS		22
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * Constants for virtual instruction parameters and return values
+ */
+
+/* vmsetie arguments */
+
+#define VM_INT_DISABLE	0
+#define VM_INT_ENABLE	1
+
+/* vmsetimask arguments */
+
+#define VM_INT_UNMASK	0
+#define VM_INT_MASK	1
+
+/* vmcache arguments */
+
+
+/*
+ * Event Record definitions useful to both C and Assembler
+ */
+
+/* VMEST Layout */
+
+#define HVM_VMEST_UM_SFT	31
+#define HVM_VMEST_UM_MSK	1
+#define HVM_VMEST_IE_SFT	30
+#define HVM_VMEST_IE_MSK	1
+#define HVM_VMEST_EVENTNUM_SFT	16
+#define HVM_VMEST_EVENTNUM_MSK	0xff
+#define HVM_VMEST_CAUSE_SFT	0
+#define HVM_VMEST_CAUSE_MSK	0xffff
+
+/*
+ * The initial program gets to find a system environment descriptor
+ * on its stack when it begins exection. The first word is a version
+ * code to indicate what is there.  Zero means nothing more.
+ */
+
+#define HEXAGON_VM_SED_NULL	0
+
+/*
+ * Event numbers for vector binding
+ */
+
+#define HVM_EV_RESET		0
+#define HVM_EV_MACHCHECK	1
+#define HVM_EV_GENEX		2
+#define HVM_EV_TRAP		8
+#define HVM_EV_INTR		15
+/* These shoud be nuked as soon as we know the VM is up to spec v0.1.1 */
+#define HVM_EV_INTR_0		16
+#define HVM_MAX_INTR		240
+
+/*
+ * Cause values for General Exception
+ */
+
+#define HVM_GE_C_BUS	0x01
+#define HVM_GE_C_XPROT	0x11
+#define HVM_GE_C_XUSER	0x14
+#define HVM_GE_C_INVI	0x15
+#define HVM_GE_C_PRIVI	0x1B
+#define HVM_GE_C_XMAL	0x1C
+#define HVM_GE_C_RMAL	0x20
+#define HVM_GE_C_WMAL	0x21
+#define HVM_GE_C_RPROT	0x22
+#define HVM_GE_C_WPROT	0x23
+#define HVM_GE_C_RUSER	0x24
+#define HVM_GE_C_WUSER	0x25
+#define HVM_GE_C_CACHE	0x28
+
+/*
+ * Cause codes for Machine Check
+ */
+
+#define	HVM_MCHK_C_DOWN		0x00
+#define	HVM_MCHK_C_BADSP	0x01
+#define	HVM_MCHK_C_BADEX	0x02
+#define	HVM_MCHK_C_BADPT	0x03
+#define	HVM_MCHK_C_REGWR	0x29
+
+#endif
arch/hexagon/include/asm/vm_mmu.h new file +111 -0

111 lines not on this page · raw message

arch/hexagon/kernel/vm_entry.S new file +269 -0

269 lines not on this page · raw message

arch/hexagon/kernel/vm_events.c new file +101 -0

101 lines not on this page · raw message

arch/hexagon/kernel/vm_init_segtable.S new file +442 -0

442 lines not on this page · raw message

arch/hexagon/kernel/vm_ops.S new file +101 -0

101 lines not on this page · raw message

arch/hexagon/kernel/vm_switch.S new file +95 -0

95 lines not on this page · raw message

arch/hexagon/kernel/vm_vectors.S new file +50 -0

50 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#26 lore raw

PATCH 12/36 Hexagon: Export ksyms defined in assembly files.

In reply to Richard Kuo
---
 arch/hexagon/kernel/hexagon_ksyms.c |   42 ++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/hexagon/kernel/hexagon_ksyms.c new file +42 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/hexagon_ksyms.c
===================================================================
@@ -0,0 +1,42 @@
+/*
+ * Export of symbols defined in assembly files and/or libgcc.
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <asm/hexagon_vm.h>
+#include <asm/uaccess.h>
+
+EXPORT_SYMBOL(__copy_from_user_hexagon);
+EXPORT_SYMBOL(__copy_to_user_hexagon);
+EXPORT_SYMBOL(__vmgetie);
+EXPORT_SYMBOL(__vmsetie);
+EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memset);
+
+#define DECLARE_EXPORT(name)     \
+	extern void name(void); EXPORT_SYMBOL(name)
+
+/* Symbols found in libgcc that assorted kernel modules need */
+DECLARE_EXPORT(__hexagon_memcpy_likely_aligned_min32bytes_mult8bytes);
+
+DECLARE_EXPORT(__hexagon_divsi3);
+DECLARE_EXPORT(__hexagon_modsi3);
+DECLARE_EXPORT(__hexagon_udivsi3);
+DECLARE_EXPORT(__hexagon_umodsi3);
+
+

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#27 lore raw

PATCH 13/36 Hexagon: Support dynamic module loading.

In reply to Richard Kuo

Modules should be compiled as ordinary .o's; shared objects are not supported.

---
 arch/hexagon/kernel/module.c |  218 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 218 insertions(+)
arch/hexagon/kernel/module.c new file +218 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/module.c
===================================================================
@@ -0,0 +1,218 @@
+/*
+ * Kernel module loader for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <asm/module.h>
+#include <linux/elf.h>
+#include <linux/module.h>
+#include <linux/moduleloader.h>
+#include <linux/vmalloc.h>
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt , ...)
+#endif
+
+/*
+ * module_alloc - wrapper around vmalloc
+ * @size - memory size to vmalloc
+ */
+void *module_alloc(unsigned long size)
+{
+	if (size == 0)
+		return NULL;
+	return vmalloc_exec(size);
+}
+
+/*
+ * module_free - free memory returned from module_alloc
+ * @mod - pointer to module?
+ * @module_region - pointer to module region?
+ */
+void module_free(struct module *mod, void *module_region)
+{
+	vfree(module_region);
+}
+
+/*
+ * module_finalize - perform platform-dependent fixups.
+ */
+int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
+			struct module *me)
+{
+	return 0;
+}
+
+/*
+ * module_arch_cleanup - Any cleanup needed with module
+ * @mod - pointer to module
+ * @module_region - pointer to module region
+ */
+void module_arch_cleanup(struct module *mod)
+{
+}
+
+/*
+ * module_frob_arch_sections - tweak got/plt sections.
+ * @hdr - pointer to elf header
+ * @sechdrs - pointer to elf load section headers
+ * @secstrings - symbol names
+ * @mod - pointer to module
+ */
+int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
+				char *secstrings,
+				struct module *mod)
+{
+	unsigned int i;
+	int found = 0;
+
+	/* Look for .plt and/or .got.plt and/or .init.plt sections */
+	for (i = 0; i < hdr->e_shnum; i++) {
+		DEBUGP("Section %d is %s\n", i,
+		       secstrings + sechdrs[i].sh_name);
+		if (strcmp(secstrings + sechdrs[i].sh_name, ".plt") == 0)
+			found = i+1;
+		if (strcmp(secstrings + sechdrs[i].sh_name, ".got.plt") == 0)
+			found = i+1;
+		if (strcmp(secstrings + sechdrs[i].sh_name, ".rela.plt") == 0)
+			found = i+1;
+	}
+
+	/* At this time, we don't support modules comiled with -shared */
+	if (found) {
+		printk(KERN_WARNING
+			"Module '%s' contains unexpected .plt/.got sections.\n",
+			mod->name);
+		/* return -ENOEXEC; */
+	}
+
+	return 0;
+}
+
+/*
+ * apply_relocate - do the actual work of relocating sections
+ * @sechdrs - pointer to section headers
+ * @strtab - some sort of start address
+ * @symindex - symbol index offset or something
+ * @relsec - address to relocate to
+ * @me - pointer to module
+ */
+int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
+			unsigned int symindex, unsigned int relsec,
+			struct module *module)
+{
+	printk(KERN_ERR "%s: Non-rela reolcation unsupported\n",
+	       module->name);
+	return -ENOEXEC;
+}
+
+/*
+ * apply_relocate_add - perform rela relocations.
+ * @sechdrs - pointer to section headers
+ * @strtab - some sort of start address?
+ * @symindex - symbol index offset or something?
+ * @relsec - address to relocate to?
+ * @module - pointer to module
+ *
+ * Perform rela relocations.
+ */
+int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
+			unsigned int symindex, unsigned int relsec,
+			struct module *module)
+{
+	unsigned int i;
+	Elf32_Sym *sym;
+	uint32_t *location;
+	uint32_t value;
+	unsigned int nrelocs = sechdrs[relsec].sh_size / sizeof(Elf32_Rela);
+	Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
+	Elf32_Word sym_info = sechdrs[relsec].sh_info;
+	Elf32_Sym *sym_base = (Elf32_Sym *) sechdrs[symindex].sh_addr;
+	void *loc_base = (void *) sechdrs[sym_info].sh_addr;
+
+	DEBUGP("Applying relocations in section %u to section %u base=%p\n",
+	       relsec, sym_info, loc_base);
+
+	for (i = 0; i < nrelocs; i++) {
+
+		/* Symbol to relocate */
+		sym = sym_base + ELF32_R_SYM(rela[i].r_info);
+
+		/* Where to make the change */
+		location = loc_base + rela[i].r_offset;
+
+		/* `Everything is relative'. */
+		value = sym->st_value + rela[i].r_addend;
+
+		DEBUGP("%d: value=%08x loc=%p reloc=%d symbol=%s\n",
+		       i, value, location, ELF32_R_TYPE(rela[i].r_info),
+		       sym->st_name ?
+		       &strtab[sym->st_name] : "(anonymous)");
+
+		switch (ELF32_R_TYPE(rela[i].r_info)) {
+		case R_HEXAGON_B22_PCREL: {
+			int dist = (int)(value - (uint32_t)location);
+			if ((dist < -0x00800000) ||
+			    (dist >= 0x00800000)) {
+				printk(KERN_ERR
+				       "%s: %s: %08x=%08x-%08x %s\n",
+				       module->name,
+				       "R_HEXAGON_B22_PCREL reloc out of range",
+				       dist, value, (uint32_t)location,
+				       sym->st_name ?
+				       &strtab[sym->st_name] : "(anonymous)");
+				return -ENOEXEC;
+			}
+			DEBUGP("B22_PCREL contents: %08X.\n", *location);
+			*location &= ~0x01ff3fff;
+			*location |= 0x00003fff & dist;
+			*location |= 0x01ff0000 & (dist<<2);
+			DEBUGP("Contents after reloc: %08x\n", *location);
+			break;
+		}
+		case R_HEXAGON_HI16:
+			value = (value>>16) & 0xffff;
+			/* fallthrough */
+		case R_HEXAGON_LO16:
+			*location &= ~0x00c03fff;
+			*location |= value & 0x3fff;
+			*location |= (value & 0xc000) << 8;
+			break;
+		case R_HEXAGON_32:
+			*location = value;
+			break;
+		case R_HEXAGON_32_PCREL:
+			*location = value - (uint32_t)location;
+			break;
+		case R_HEXAGON_PLT_B22_PCREL:
+		case R_HEXAGON_GOTOFF_LO16:
+		case R_HEXAGON_GOTOFF_HI16:
+			printk(KERN_ERR "%s: GOT/PLT relocations unsupported\n",
+			       module->name);
+			return -ENOEXEC;
+		default:
+			printk(KERN_ERR "%s: unknown relocation: %u\n",
+			       module->name,
+			       ELF32_R_TYPE(rela[i].r_info));
+			return -ENOEXEC;
+		}
+	}
+	return 0;
+}

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#28 lore raw

Re: [patch 13/36] Hexagon: Support dynamic module loading.

Quoted 27 lines · On Wednesday 17 August 2011 11:35:10 Richard Kuo wrote:

+ * module_alloc - wrapper around vmalloc
+ * @size - memory size to vmalloc
+ */

arch/hexagon/kernel/module.c new file +24 -0
+void *module_alloc(unsigned long size)
+{
+       if (size == 0)
+               return NULL;
+       return vmalloc_exec(size);
+}
+
+/*
+ * module_free - free memory returned from module_alloc
+ * @mod - pointer to module?
+ * @module_region - pointer to module region?
+ */
+void module_free(struct module *mod, void *module_region)
+{
+       vfree(module_region);
+}
+
+/*
+ * module_finalize - perform platform-dependent fixups.
+ */
+int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
+                       struct module *me)
+{
+       return 0;

arch/hexagon/kernel/module.c line 70

Quoted 10 lines
arch/hexagon/kernel/module.c new file +10 -0
+}
+
+/*
+ * module_arch_cleanup - Any cleanup needed with module
+ * @mod - pointer to module
+ * @module_region - pointer to module region
+ */
+void module_arch_cleanup(struct module *mod)
+{
+}

These are the default implementations that are now (as of 3.1) provided by common code, so you can just omit your own definitions.

Arnd

#29 lore raw

PATCH 14/36 Hexagon: Add signal functions

In reply to Richard Kuo
---
 arch/hexagon/include/asm/sigcontext.h |   32 +++
 arch/hexagon/include/asm/signal.h     |   26 ++
 arch/hexagon/kernel/signal.c          |  325 ++++++++++++++++++++++++++++++++++
 arch/hexagon/kernel/trampoline.S      |   35 +++
 4 files changed, 418 insertions(+)
arch/hexagon/include/asm/sigcontext.h new file +32 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/sigcontext.h
===================================================================
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SIGCONTEXT_H
+#define _ASM_SIGCONTEXT_H
+
+#include <asm/registers.h>
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked.
+ */
+struct sigcontext {
+	struct pt_regs sc_regs;
+};
+
+#endif
arch/hexagon/include/asm/signal.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/signal.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SIGNAL_H
+#define _ASM_SIGNAL_H
+
+extern unsigned long __rt_sigtramp_template[2];
+
+#include <asm-generic/signal.h>
+
+#endif
arch/hexagon/kernel/signal.c new file +325 -0

325 lines not on this page · raw message

arch/hexagon/kernel/trampoline.S new file +35 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/trampoline.S
===================================================================
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+/*
+ * Trampoline sequences to be copied onto user stack.
+ * This consumes a little more space than hand-assembling
+ * immediate constants for use in C, but is more portable
+ * to future tweaks to the Hexagon instruction set.
+ */
+
+#include <asm/unistd.h>
+
+/*  Sig trampolines - call sys_sigreturn or sys_rt_sigreturn as appropriate */
+
+/*  plain sigreturn is gone.  */
+
+	.globl __rt_sigtramp_template
+__rt_sigtramp_template:
+	r6 = #__NR_rt_sigreturn;
+	trap0(#1);

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#30 lore raw

hexagon: signal handling bugs

1) unless I'm seriously misreading hexagon vm_entry.S, once we'd
called do_notify_resume, we do *not* recheck if there's more work to be done. In particular, if we'd got more signals pending - e.g. from SIGSEGV we'd got while trying to set a sigframe up. That's not a good thing for a lot of reasons. Note that once that is fixed, you'll need to make sure that restart logics is applied only *once* - not for subsequent sigframes.

2) sigreturn should *NOT* be restartable at all, or you'll get
a lot of hard-to-reproduce fun. AFAICS, the right thing to do would be to set ->syscall_nr to something negative, not __NR_rt_sigreturn in there (and return regs->r00 instead of 0, to avoid the check in do_trap0).
Reason: suppose you have e.g. a loop that runs through different values in r00. No syscalls in it. A signal comes and gets treated on the way out of kernel after the next e.g. timer interrupt. We save the values of registers into a sigframe and go into the handler. Another signal comes; the next time we reach the kernel is when we get to rt_sigreturn(). There we
* have registers restored from on-stack sigframe
* have ->syscall_nr set to __NR_rt_sigreturn
* hit handle_signal() on the way out
* check ->r00; note that this is the value we have just restored
from sigframe. If it happens to be -ERESTARTNOHAND, silently replace it with -EINTR. And eventually return to clueless userland.
Result: if timer interrupt happens when the userland loop goes through -ERESTARTNOHAND, the value of r00 is clobbered upon return from signal handler. Fun debugging that kind of bugs: priceless...

3) on sigreturn we need to set current->restart_block.fn; hexagon
doesn't do that.

4) altstack can overflow; you don't check that. See
commit 83bd01024b1fdfc41d9b758e5669e80fca72df66

Author: Roland McGrath <[email protected]>
Date:   Wed Jan 30 13:30:06 2008 +0100

for an analog.

5) try_to_freeze() has no business being called in do_signal();
let get_signal_to_deliver() handle that.

I don't have any access to hardware *or* cross-toolchain, so all I can do here is RTFS and review. For #2..#5 I would not be afraid to post untested patches (they are essentially trivial), but #1 is well beyond my arrogance threshold - messing in assembler glue on an architecture I don't know *and* can't test... Sorry.

#31 lore raw

Re: hexagon: signal handling bugs

Quoted 5 lines · Al Viro

I don't have any access to hardware *or* cross-toolchain, so all I can do here is RTFS and review. For #2..#5 I would not be afraid to post untested patches (they are essentially trivial), but #1 is well beyond my arrogance threshold - messing in assembler glue on an architecture I don't know *and* can't test... Sorry.

Thanks for reviewing the code. Admittedly, it's been a while since I looked at the signal handling bits, so I will need to review it again and test the changes where appropriate. I'll post a patch or something for review when ready...

Thanks again,
Richard Kuo

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#32 lore raw

Re: hexagon: signal handling bugs

In reply to Al Viro
Quoted 5 lines · Al Viro

       1) unless I'm seriously misreading hexagon vm_entry.S, once we'd called do_notify_resume, we do *not* recheck if there's more work to be done.

       2) sigreturn should *NOT* be restartable at all, or you'll get

....

Is there an architecture that "does this best"? I (re-)wrote a significant part of the hexagon sig-handling code, and I did it via "surgical hacking": by reading the code for 4-6 other arches, and trying to pick out the "best practices" of each. But its easy to build a Frankenstein when using body parts from mis-matched places, so perhaps many of these mistakes were mine...

Perhaps its desirable to modify most/all architectures, so as to evoke more commonality? Some of the other, more minor arches sure did look incomplete to me...

-- Linas

#33 lore raw

PATCH 15/36 Hexagon: Add init_task and process functions

In reply to Richard Kuo
---
 arch/hexagon/kernel/init_task.c |   54 +++++++++
 arch/hexagon/kernel/process.c   |  235 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 289 insertions(+)
arch/hexagon/kernel/init_task.c new file +54 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/init_task.c
===================================================================
@@ -0,0 +1,54 @@
+/*
+ * Init task definition
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init_task.h>
+#include <linux/fs.h>
+#include <linux/mqueue.h>
+#include <asm/thread_info.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is 8192-byte aligned due to the
+ * way process stacks are handled. This is done by making sure
+ * the linker maps this in the .text segment right after head.S,
+ * and making head.S ensure the proper alignment.
+ */
+union thread_union init_thread_union
+	__attribute__((__section__(".data.init_task"),
+		__aligned__(THREAD_SIZE))) = {
+			INIT_THREAD_INFO(init_task)
+		};
+
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+struct task_struct init_task = INIT_TASK(init_task);
+EXPORT_SYMBOL(init_task);
arch/hexagon/kernel/process.c new file +235 -0

235 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#34 lore raw

Re: [patch 15/36] Hexagon: Add init_task and process functions

Quoted 12 lines · On Wednesday 17 August 2011 11:35:12 Richard Kuo wrote:
arch/hexagon/kernel/process.c new file +12 -0
+/*
+ *  Spin, or better still, do a hardware or VM wait instruction
+ *  If hardware or VM offer wait termination even though interrupts
+ *  are disabled.
+ */
+static void default_idle(void)
+{
+       __vmwait();
+}
+
+void (*idle_sleep)(void) = default_idle;
+

arch/hexagon/kernel/process.c line 96

Quoted 10 lines
arch/hexagon/kernel/process.c new file +10 -0
+void cpu_idle(void)
+{
+       while (1) {
+               tick_nohz_stop_sched_tick(1);
+               while (!need_resched())
+                       idle_sleep();
+               tick_nohz_restart_sched_tick();
+               schedule();
+       }
+}

This looks like you have the classic going to sleep race in here:

You need to disable hardware interrupts before checking need_resched(), otherwise an interrupt might hit just after you have checked it and before you call __vmwait(). The definition of the __vmwait call must atomically reenable interrupts and suspend the CPU.

Arnd

#35 lore raw

PATCH 16/36 Hexagon: Add startup code

In reply to Richard Kuo
---
 arch/hexagon/kernel/head.S  |  162 ++++++++++++++++++++++++++++++++++++++++++++
 arch/hexagon/kernel/reset.c |   38 ++++++++++
 arch/hexagon/kernel/setup.c |  143 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 343 insertions(+)
arch/hexagon/kernel/head.S new file +162 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/head.S
===================================================================
@@ -0,0 +1,162 @@
+/*
+ * Early kernel startup code for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/asm-offsets.h>
+#include <asm/mem-layout.h>
+#include <asm/vm_mmu.h>
+#include <asm/page.h>
+
+       	__INIT
+ENTRY(stext)
+	/*
+	 * VMM will already have set up true vector page, MMU, etc.
+	 * To set up initial kernel identity map, we have to pass
+	 * the VMM a pointer to some canonical page tables. In
+	 * this implementation, we're assuming that we've got
+	 * them precompiled. Generate value in R24, as we'll need
+	 * it again shortly.
+	 */
+	r24.L = #LO(swapper_pg_dir)
+	r24.H = #HI(swapper_pg_dir)
+
+	/*
+	 * Symbol is kernel segment address, but we need
+	 * the logical/physical address.
+	 */
+	r24 = asl(r24, #2)
+	r24 = lsr(r24, #2)
+
+	r0 = r24
+
+	/*
+	 * Initialize a 16MB PTE to make the virtual and physical
+	 * addresses where the kernel was loaded be identical.
+	 */
+#define PTE_BITS ( __HVM_PTE_R | __HVM_PTE_W | __HVM_PTE_X	\
+		  | __HEXAGON_C_WB_L2 << 6			\
+		  | __HVM_PDE_S_4MB)
+
+	r1 = pc
+	r2.H = #0xffc0
+	r2.L = #0x0000
+	r1 = and(r1,r2)		/* round PC to 4MB boundary	*/
+	r2 = lsr(r1, #22)	/* 4MB page number		*/
+	r2 = asl(r2, #2)	/* times sizeof(PTE) (4bytes)	*/
+	r0 = add(r0,r2)		/* r0 = address of correct PTE	*/
+	r2 = #PTE_BITS
+	r1 = add(r1,r2)		/* r1 = 4MB PTE for the first entry	*/
+	r2.h = #0x0040
+	r2.l = #0x0000		/* 4MB	*/
+	memw(r0 ++ #4) = r1
+	r1 = add(r1, r2)
+	memw(r0 ++ #4) = r1
+
+	r0 = r24
+
+	/*
+	 * The subroutine wrapper around the virtual instruction touches
+	 * no memory, so we should be able to use it even here.
+	 */
+	call	__vmnewmap;
+
+	/*  Jump into virtual address range.  */
+
+	r31.h = #hi(__head_s_vaddr_target)
+	r31.l = #lo(__head_s_vaddr_target)
+	jumpr r31
+
+	/*  Insert trippy space effects.  */
+
+__head_s_vaddr_target:
+	/*
+	 * Tear down VA=PA translation now that we are running
+	 * in the desgnated kernel segments.
+	 */
+	r0 = #__HVM_PDE_S_INVALID
+	r1 = r24
+	loop0(1f,#0x100)
+1:
+	{
+		memw(R1 ++ #4) = R0
+	}:endloop0
+
+	r0 = r24
+	call __vmnewmap
+
+	/*  Go ahead and install the trap0 return so angel calls work  */
+	r0.h = #hi(_K_provisional_vec)
+	r0.l = #lo(_K_provisional_vec)
+	call __vmsetvec
+
+	/*
+	 * OK, at this point we should start to be much more careful,
+	 * we're going to enter C code and start touching memory
+	 * in all sorts of places.
+	 * This means:
+	 *      SGP needs to be OK
+	 *	Need to lock shared resources
+	 *	A bunch of other things that will cause
+	 * 	all kinds of painful bugs
+	 */
+
+	/*
+	 * Stack pointer should be pointed at the init task's
+	 * thread stack, which should have been declared in arch/init_task.c.
+	 * So uhhhhh...
+	 * It's accessible via the init_thread_union, which is a union
+	 * of a thread_info struct and a stack; of course, the top
+	 * of the stack is not for you.  The end of the stack
+	 * is simply init_thread_union + THREAD_SIZE.
+	 */
+
+	{r29.H = #HI(init_thread_union); r0.H = #HI(_THREAD_SIZE); }
+	{r29.L = #LO(init_thread_union); r0.L = #LO(_THREAD_SIZE); }
+
+	/*  initialize the register used to point to current_thread_info */
+	/*  Fixme:  THREADINFO_REG can't be R2 because of that memset thing. */
+	{r29 = add(r29,r0); THREADINFO_REG = r29; }
+
+	/*  Hack:  zero bss; */
+	{ r0.L = #LO(__bss_start);  r1 = #0; r2.l = #LO(__bss_stop); }
+	{ r0.H = #HI(__bss_start);           r2.h = #HI(__bss_stop); }
+
+	r2 = sub(r2,r0);
+	call memset;
+
+	/* Time to make the doughnuts.   */
+	call start_kernel
+
+	/*
+	 * Should not reach here.
+	 */
+1:
+	jump 1b
+
+.p2align PAGE_SHIFT
+ENTRY(external_cmdline_buffer)
+        .fill _PAGE_SIZE,1,0
+
+.data
+.p2align PAGE_SHIFT
+ENTRY(empty_zero_page)
+        .fill _PAGE_SIZE,1,0
arch/hexagon/kernel/reset.c new file +38 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/reset.c
===================================================================
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/smp.h>
+#include <asm/hexagon_vm.h>
+
+void machine_power_off(void)
+{
+	smp_send_stop();
+	__vmstop();
+}
+
+void machine_halt(void)
+{
+}
+
+void machine_restart(char *cmd)
+{
+}
+
+void pm_power_off(void)
+{
+}
arch/hexagon/kernel/setup.c new file +143 -0

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#36 lore raw

PATCH 17/36 Hexagon: Add interrupts

In reply to Richard Kuo
---
 arch/hexagon/include/asm/hardirq.h |    1 
 arch/hexagon/include/asm/irq.h     |   37 +++++++++++++++
 arch/hexagon/kernel/irq.c          |   74 ++++++++++++++++++++++++++++++
 arch/hexagon/kernel/irq_cpu.c      |   90 +++++++++++++++++++++++++++++++++++++
 4 files changed, 202 insertions(+)
arch/hexagon/include/asm/hardirq.h new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/hardirq.h
===================================================================
@@ -0,0 +1 @@
+#include <asm-generic/hardirq.h>
arch/hexagon/include/asm/irq.h new file +37 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/irq.h
===================================================================
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_IRQ_H_
+#define _ASM_IRQ_H_
+
+/* Number of first-level interrupts associated with the CPU core. */
+#define HEXAGON_CPUINTS 32
+
+/*
+ * XXX TODO FIXME this should be pulled from a platform file!
+ * Must define NR_IRQS before including <asm-generic/irq.h>
+ * 64 == the two SIRC's, 176 == the two gpio's
+ */
+#define NR_IRQS (HEXAGON_CPUINTS + 64 + 176)
+
+#include <asm-generic/irq.h>
+
+extern void __init platform_irq_init(void);
+extern void __init hexagon_cpu_irq_init(void);
+
+#endif
arch/hexagon/kernel/irq.c new file +74 -0

74 lines not on this page · raw message

arch/hexagon/kernel/irq_cpu.c new file +90 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#37 lore raw

PATCH 18/36 Hexagon: Add time and timer functions

In reply to Richard Kuo
---
 arch/hexagon/include/asm/time.h       |   27 +++
 arch/hexagon/include/asm/timer-regs.h |   39 ++++
 arch/hexagon/kernel/time.c            |  299 ++++++++++++++++++++++++++++++++++
 3 files changed, 365 insertions(+)
arch/hexagon/include/asm/time.h new file +27 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/time.h
===================================================================
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef ASM_TIME_H
+#define ASM_TIME_H
+
+#ifdef CONFIG_SMP
+void setup_percpu_clockdev(void);
+void ipi_timer(void);
+#endif
+
+#endif
arch/hexagon/include/asm/timer-regs.h new file +39 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/timer-regs.h
===================================================================
@@ -0,0 +1,39 @@
+/*
+ * Timer support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TIMER_REGS_H
+#define _ASM_TIMER_REGS_H
+
+/*  This stuff should go into a platform specific file  */
+#define TCX0_CLK_RATE		19200
+#define TIMER_ENABLE		0
+#define TIMER_CLR_ON_MATCH	1
+
+/*
+ * 8x50 HDD Specs 5-8.  Simulator co-sim not fixed until
+ * release 1.1, and then it's "adjustable" and probably not defaulted.
+ */
+#define RTOS_TIMER_INT		3
+#ifdef CONFIG_HEXAGON_COMET
+#define RTOS_TIMER_REGS_ADDR	0xAB000000UL
+#endif
+#define SLEEP_CLK_RATE		32000
+
+#endif
arch/hexagon/kernel/time.c new file +299 -0

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#38 lore raw

PATCH 19/36 Hexagon: Add ptrace support

In reply to Richard Kuo
---
 arch/hexagon/include/asm/ptrace.h |   90 +++++++
 arch/hexagon/kernel/ptrace.c      |  437 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 527 insertions(+)
arch/hexagon/include/asm/ptrace.h new file +90 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/ptrace.h
===================================================================
@@ -0,0 +1,90 @@
+/*
+ * Ptrace definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_PTRACE_H
+#define _ASM_PTRACE_H
+
+#include <asm/registers.h>
+
+/*  arch_ptrace and ptrace_disable use task_struct in arg lists  */
+struct task_struct;
+
+/*
+ * ptrace commands not part of Linux base set (but common to essentially
+ * all supported architectures).
+ */
+
+#define PTRACE_GETREGS	12
+#define PTRACE_SETREGS	13
+
+/*
+ * Register numbers used in ptrace calls.  0-31 represent GPRs R0-R31
+ */
+#define PT_R0		0
+#define PT_R1		1
+#define PT_R2		2
+#define PT_R3		3
+#define PT_R4		4
+#define PT_R5		5
+#define PT_R6		6
+#define PT_R7		7
+#define PT_R8		8
+#define PT_R9		9
+#define PT_R10		10
+#define PT_R11		11
+#define PT_R12		12
+#define PT_R13		13
+#define PT_R14		14
+#define PT_R15		15
+#define PT_R16		16
+#define PT_R17		17
+#define PT_R18		18
+#define PT_R19		19
+#define PT_R20		20
+#define PT_R21		21
+#define PT_R22		22
+#define PT_R23		23
+#define PT_R24		24
+#define PT_R25		25
+#define PT_R26		26
+#define PT_R27		27
+#define PT_R28		28
+#define PT_R29		29
+#define PT_R30		30
+#define PT_R31		31
+#define PT_GP		32
+#define PT_UGP		33
+#define PT_SA0		34
+#define PT_LC0		35
+#define PT_SA1		36
+#define PT_LC1		37
+#define PT_M0		38
+#define PT_M1		39
+#define PT_PREDS	40
+#define PT_PC		41
+#define PT_CAUSE	42
+#define PT_BADVA	43
+
+#define N_PTRACE_REGS	44
+
+#define profile_pc(regs) instruction_pointer(regs)
+#define instruction_pointer(regs) pt_elr(regs)
+
+#endif
arch/hexagon/kernel/ptrace.c new file +437 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#39 lore raw

Re: [patch 19/36] Hexagon: Add ptrace support

Quoted 8 lines · On Wednesday 17 August 2011 11:35:16 Richard Kuo wrote:
arch/hexagon/kernel/ptrace.c new file +8 -0
+       switch (request) {
+       case PTRACE_PEEKUSR:    /* read register specified by addr. */
+               ret = ptrace_peekusr(child, addr, (void __user *) data);
+               break;
+       case PTRACE_POKETEXT:   /* write the word at location addr. */
+       case PTRACE_POKEDATA:
+               ret = generic_ptrace_pokedata(child, addr, data);
+               break;

arch/hexagon/kernel/ptrace.c line 432

Quoted 10 lines
arch/hexagon/kernel/ptrace.c new file +10 -0
+       case PTRACE_POKEUSR:    /* write register specified by addr. */
+               ret = ptrace_pokeusr(child, addr, data);
+               break;
+       case PTRACE_GETREGS:
+               ret = ptrace_getregs(child, (void __user *) data);
+               break;
+       case PTRACE_SETREGS:
+               ret = ptrace_setregs(child, (void __user *) data);
+               break;
+       default:

I believe the current way to do this is to use regsets for everything, see arch/openrisc/kernel/ptrace.c

Arnd

#40 lore raw

PATCH 20/36 Hexagon: Provide basic debugging and system trap support.

In reply to Richard Kuo
---
 arch/hexagon/include/asm/traps.h |   29 +++
 arch/hexagon/kernel/traps.c      |  356 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 385 insertions(+)
arch/hexagon/kernel/traps.c new file +356 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/traps.c
===================================================================
@@ -0,0 +1,356 @@
+/*
+ * Kernel traps/events for Hexagon processor
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/kallsyms.h>
+#include <linux/kdebug.h>
+#include <linux/syscalls.h>
+#include <linux/signal.h>
+#include <linux/tracehook.h>
+#include <asm/traps.h>
+#include <asm/vm_fault.h>
+#include <asm/syscall.h>
+#include <asm/registers.h>
+#include <asm/unistd.h>
+#ifdef CONFIG_KGDB
+# include <linux/kgdb.h>
+#endif
+
+#define TRAP_SYSCALL	1
+#define TRAP_DEBUG	0xdb
+
+void __init trap_init(void)
+{
+}
+
+#ifdef CONFIG_GENERIC_BUG
+/* Maybe should resemble arch/sh/kernel/traps.c ?? */
+int is_valid_bugaddr(unsigned long addr)
+{
+	return 1;
+}
+#endif /* CONFIG_GENERIC_BUG */
+
+void show_stack(struct task_struct *task, unsigned long *fp)
+{
+	int kstack_depth_to_print = 20;
+	unsigned long offset, size;
+	const char *name = NULL;
+	unsigned long *newfp;
+	unsigned long ip;
+	char tmpstr[128];
+	char *modname;
+	int i;
+
+	if (task == NULL)
+		task = current;
+
+	if (fp == NULL) {
+		if (task == current) {
+			asm("%0 = r30" : "=r" (fp));
+		} else {
+			fp = (unsigned long *)
+			     ((struct hexagon_switch_stack *)
+			     task->thread.switch_sp)->fp;
+		}
+	}
+
+	printk(KERN_INFO "CPU#%d, %s/%d, Call Trace:\n",
+	       raw_smp_processor_id(), current->comm,
+	       task_pid_nr(current));
+	for (i = 0; i < kstack_depth_to_print; i++) {
+		if (0 /* Check irq stack at some point */)
+			printk(KERN_INFO " <EOI> ");
+		else if (((long) fp & (THREAD_SIZE-1)) == 0)
+			break;
+
+		newfp = (unsigned long *) *fp;
+
+		ip = *(unsigned long *)((char *)fp + sizeof(unsigned long));
+		name = kallsyms_lookup(ip, &size, &offset, &modname, tmpstr);
+
+		printk(KERN_INFO "[%p] 0x%lx: %s + 0x%lx", fp, ip, name,
+			offset);
+		if (modname)
+			printk(KERN_CONT " [%s] ", modname);
+		if (i == 0)
+			printk(KERN_CONT " (unreliable)");
+		printk(KERN_CONT "\n");
+
+		/* If newfp isn't larger, we're tracing garbage */
+		if (newfp > fp)
+			fp = newfp;
+		else
+			break;
+	}
+}
+
+void dump_state(struct pt_regs *regs)
+{
+	show_regs(regs);
+	show_stack(current, &regs->r30);
+}
+
+void dump_stack(void)
+{
+	show_stack(current, NULL);
+}
+EXPORT_SYMBOL(dump_stack);
+
+int die(const char *str, struct pt_regs *regs, long err)
+{
+	static struct {
+		spinlock_t lock;
+		int counter;
+	} die = {
+		.lock = __SPIN_LOCK_UNLOCKED(die.lock),
+		.counter = 0
+	};
+
+	spin_lock_irq(&die.lock);
+	bust_spinlocks(1);
+	printk(KERN_INFO "%s[#%d]:\n", str, ++die.counter);
+
+	if (notify_die(DIE_OOPS, str, regs, err, pt_cause(regs), SIGSEGV) ==
+	    NOTIFY_STOP)
+		return 1;
+
+	print_modules();
+	dump_state(regs);
+
+	do_exit(err);
+	return 0;
+}
+
+int die_if_kernel(char *str, struct pt_regs *regs, long err)
+{
+	if (!user_mode(regs))
+		return die(str, regs, err);
+	else
+		return 0;
+}
+
+/*
+ * It's not clear that misaligned fetches are ever recoverable.
+ */
+static void misaligned_instruction(struct pt_regs *regs)
+{
+	die_if_kernel("Misaligned Instruction", regs, 0);
+	force_sig(SIGBUS, current);
+}
+
+/*
+ * Misaligned loads and stores, on the other hand, can be
+ * emulated, and probably should be, some day.  But for now
+ * they will be considered fatal.
+ */
+static void misaligned_data_load(struct pt_regs *regs)
+{
+	die_if_kernel("Misaligned Data Load", regs, 0);
+	force_sig(SIGBUS, current);
+}
+
+static void misaligned_data_store(struct pt_regs *regs)
+{
+	die_if_kernel("Misaligned Data Store", regs, 0);
+	force_sig(SIGBUS, current);
+}
+
+static void illegal_instruction(struct pt_regs *regs)
+{
+	die_if_kernel("Illegal Instruction", regs, 0);
+	force_sig(SIGILL, current);
+}
+
+/*
+ * Precise bus errors may be recoverable with a a retry,
+ * but for now, treat them as irrecoverable.
+ */
+static void precise_bus_error(struct pt_regs *regs)
+{
+	die_if_kernel("Precise Bus Error", regs, 0);
+	force_sig(SIGBUS, current);
+}
+
+/*
+ * If anything is to be done here other than panic,
+ * it will probably be complex and migrate to another
+ * source module.  For now, just die.
+ */
+static void cache_error(struct pt_regs *regs)
+{
+	die("Cache Error", regs, 0);
+}
+
+/*
+ * General exception handler
+ */
+void do_genex(struct pt_regs *regs)
+{
+
+	/*
+	 * Decode Cause and Dispatch
+	 */
+	switch (pt_cause(regs)) {
+	case HVM_GE_C_XPROT:
+	case HVM_GE_C_XUSER:
+		execute_protection_fault(regs);
+		break;
+	case HVM_GE_C_RPROT:
+	case HVM_GE_C_RUSER:
+		read_protection_fault(regs);
+		break;
+	case HVM_GE_C_WPROT:
+	case HVM_GE_C_WUSER:
+		write_protection_fault(regs);
+		break;
+	case HVM_GE_C_XMAL:
+		misaligned_instruction(regs);
+		break;
+	case HVM_GE_C_RMAL:
+		misaligned_data_load(regs);
+		break;
+	case HVM_GE_C_WMAL:
+		misaligned_data_store(regs);
+		break;
+	case HVM_GE_C_INVI:
+	case HVM_GE_C_PRIVI:
+		illegal_instruction(regs);
+		break;
+	case HVM_GE_C_BUS:
+		precise_bus_error(regs);
+		break;
+	case HVM_GE_C_CACHE:
+		cache_error(regs);
+		break;
+	default:
+		/* Halt and catch fire */
+		panic("Unrecognized exception 0x%lx\n", pt_cause(regs));
+		break;
+	}
+}
+
+/* Indirect system call dispatch */
+long sys_syscall(void)
+{
+	printk(KERN_ERR "sys_syscall invoked!\n");
+	return -ENOSYS;
+}
+
+void do_trap0(struct pt_regs *regs)
+{
+	unsigned long syscallret = 0;
+	syscall_fn syscall;
+
+	switch (pt_cause(regs)) {
+	case TRAP_SYSCALL:
+		/* System call is trap0 #1 */
+
+		/* allow strace to catch syscall args  */
+		if (unlikely(test_thread_flag(TIF_SYSCALL_TRACE) &&
+			tracehook_report_syscall_entry(regs)))
+			return;  /*  return -ENOSYS somewhere?  */
+
+		/* Interrupts should be re-enabled for syscall processing */
+		__vmsetie(VM_INT_ENABLE);
+
+		/*
+		 * System call number is in r6, arguments in r0..r5.
+		 * Fortunately, no Linux syscall has more than 6 arguments,
+		 * and Hexagon ABI passes first 6 arguments in registers.
+		 * 64-bit arguments are passed in odd/even register pairs.
+		 * Fortunately, we have no system calls that take more
+		 * than three arguments with more than one 64-bit value.
+		 * Should that change, we'd need to redesign to copy
+		 * between user and kernel stacks.
+		 */
+		regs->syscall_nr = regs->r06;
+
+		/*
+		 * GPR R0 carries the first parameter, and is also used
+		 * to report the return value.  We need a backup of
+		 * the user's value in case we need to do a late restart
+		 * of the system call.
+		 */
+		regs->restart_r0 = regs->r00;
+
+		if ((unsigned long) regs->syscall_nr >= __NR_syscalls) {
+			regs->r00 = -1;
+		} else {
+			syscall = (syscall_fn)
+				  (sys_call_table[regs->syscall_nr]);
+			syscallret = syscall(regs->r00, regs->r01,
+				   regs->r02, regs->r03,
+				   regs->r04, regs->r05);
+		}
+
+		/*
+		 * If it was a sigreturn system call, don't overwrite
+		 * r0 value in stack frame with return value.
+		 *
+		 * __NR_sigreturn doesn't seem to exist in new unistd.h
+		 */
+
+		if (regs->syscall_nr != __NR_rt_sigreturn)
+			regs->r00 = syscallret;
+
+		/* allow strace to get the syscall return state  */
+		if (unlikely(test_thread_flag(TIF_SYSCALL_TRACE)))
+			tracehook_report_syscall_exit(regs, 0);
+
+		break;
+	case TRAP_DEBUG:
+		/* Trap0 0xdb is debug breakpoint */
+		if (user_mode(regs)) {
+			struct siginfo info;
+
+			info.si_signo = SIGTRAP;
+			info.si_errno = 0;
+			/*
+			 * Some architecures add some per-thread state
+			 * to distinguish between breakpoint traps and
+			 * trace traps.  We may want to do that, and
+			 * set the si_code value appropriately, or we
+			 * may want to use a different trap0 flavor.
+			 */
+			info.si_code = TRAP_BRKPT;
+			info.si_addr = (void __user *) pt_elr(regs);
+			send_sig_info(SIGTRAP, &info, current);
+		} else {
+#ifdef CONFIG_KGDB
+			kgdb_handle_exception(pt_cause(regs), SIGTRAP,
+					      TRAP_BRKPT, regs);
+#endif
+		}
+		break;
+	}
+	/* Ignore other trap0 codes for now, especially 0 (Angel calls) */
+}
+
+/*
+ * Machine check exception handler
+ */
+void do_machcheck(struct pt_regs *regs)
+{
+	/* Halt and catch fire */
+	__vmstop();
+}
arch/hexagon/include/asm/traps.h new file +29 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/traps.h
===================================================================
@@ -0,0 +1,29 @@
+/*
+ * Trap support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_HEXAGON_TRAPS_H
+#define _ASM_HEXAGON_TRAPS_H
+
+#include <asm/registers.h>
+
+extern int die(const char *str, struct pt_regs *regs, long err);
+extern int die_if_kernel(char *str, struct pt_regs *regs, long err);
+
+#endif /* _ASM_HEXAGON_TRAPS_H */

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#41 lore raw

PATCH 21/36 Hexagon: Add SMP support

In reply to Richard Kuo
---
 arch/hexagon/include/asm/smp.h |   40 ++++
 arch/hexagon/kernel/smp.c      |  365 +++++++++++++++++++++++++++++++++++++++++
 arch/hexagon/kernel/topology.c |   52 +++++
 3 files changed, 457 insertions(+)
arch/hexagon/include/asm/smp.h new file +40 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/smp.h
===================================================================
@@ -0,0 +1,40 @@
+/*
+ * SMP definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __ASM_SMP_H
+#define __ASM_SMP_H
+
+#include <linux/cpumask.h>
+
+#define raw_smp_processor_id() (current_thread_info()->cpu)
+
+enum ipi_message_type {
+	IPI_RESCHEDULE,
+	IPI_CALL_FUNC,
+	IPI_CPU_STOP,
+	IPI_TIMER
+};
+
+extern void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg);
+extern void smp_start_cpus(void);
+
+void smp_vm_unmask_irq(void *info);
+
+#endif
arch/hexagon/kernel/smp.c new file +365 -0

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arch/hexagon/kernel/topology.c new file +52 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#42 lore raw

PATCH 22/36 Hexagon: Add locking types and functions

In reply to Richard Kuo

We pretty much just reused the PPC version of rwsem.h. Spinlocks use ll/sc.

---
 arch/hexagon/include/asm/rwsem.h          |  132 +++++++++++++++++++++
 arch/hexagon/include/asm/spinlock.h       |  186 ++++++++++++++++++++++++++++++
 arch/hexagon/include/asm/spinlock_types.h |   42 ++++++
 3 files changed, 360 insertions(+)
arch/hexagon/include/asm/rwsem.h new file +132 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/rwsem.h
===================================================================
@@ -0,0 +1,132 @@
+#ifndef _ASM_POWERPC_RWSEM_H
+#define _ASM_POWERPC_RWSEM_H
+
+#ifndef _LINUX_RWSEM_H
+#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
+#endif
+
+#ifdef __KERNEL__
+
+/*
+ * R/W semaphores for PPC using the stuff in lib/rwsem.c.
+ * Adapted largely from include/asm-i386/rwsem.h
+ * by Paul Mackerras <[email protected]>.
+ */
+
+/*
+ * the semaphore definition
+ */
+#ifdef CONFIG_PPC64
+# define RWSEM_ACTIVE_MASK		0xffffffffL
+#else
+# define RWSEM_ACTIVE_MASK		0x0000ffffL
+#endif
+
+#define RWSEM_UNLOCKED_VALUE		0x00000000L
+#define RWSEM_ACTIVE_BIAS		0x00000001L
+#define RWSEM_WAITING_BIAS		(-RWSEM_ACTIVE_MASK-1)
+#define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS
+#define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
+
+/*
+ * lock for reading
+ */
+static inline void __down_read(struct rw_semaphore *sem)
+{
+	if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
+		rwsem_down_read_failed(sem);
+}
+
+static inline int __down_read_trylock(struct rw_semaphore *sem)
+{
+	long tmp;
+
+	while ((tmp = sem->count) >= 0) {
+		if (tmp == cmpxchg(&sem->count, tmp,
+				   tmp + RWSEM_ACTIVE_READ_BIAS)) {
+			return 1;
+		}
+	}
+	return 0;
+}
+
+/*
+ * lock for writing
+ */
+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
+{
+	long tmp;
+
+	tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
+				     (atomic_long_t *)&sem->count);
+	if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
+		rwsem_down_write_failed(sem);
+}
+
+static inline void __down_write(struct rw_semaphore *sem)
+{
+	__down_write_nested(sem, 0);
+}
+
+static inline int __down_write_trylock(struct rw_semaphore *sem)
+{
+	long tmp;
+
+	tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
+		      RWSEM_ACTIVE_WRITE_BIAS);
+	return tmp == RWSEM_UNLOCKED_VALUE;
+}
+
+/*
+ * unlock after reading
+ */
+static inline void __up_read(struct rw_semaphore *sem)
+{
+	long tmp;
+
+	tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
+	if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
+		rwsem_wake(sem);
+}
+
+/*
+ * unlock after writing
+ */
+static inline void __up_write(struct rw_semaphore *sem)
+{
+	if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
+				 (atomic_long_t *)&sem->count) < 0))
+		rwsem_wake(sem);
+}
+
+/*
+ * implement atomic add functionality
+ */
+static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
+{
+	atomic_long_add(delta, (atomic_long_t *)&sem->count);
+}
+
+/*
+ * downgrade write lock to read lock
+ */
+static inline void __downgrade_write(struct rw_semaphore *sem)
+{
+	long tmp;
+
+	tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
+				     (atomic_long_t *)&sem->count);
+	if (tmp < 0)
+		rwsem_downgrade_wake(sem);
+}
+
+/*
+ * implement exchange and add functionality
+ */
+static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
+{
+	return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
+}
+
+#endif	/* __KERNEL__ */
+#endif	/* _ASM_POWERPC_RWSEM_H */
arch/hexagon/include/asm/spinlock.h new file +186 -0

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arch/hexagon/include/asm/spinlock_types.h new file +42 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#43 lore raw

PATCH 23/36 Hexagon: Add user access functions

In reply to Richard Kuo
---
 arch/hexagon/include/asm/uaccess.h   |  116 +++++++++++++++++++++
 arch/hexagon/mm/copy_from_user.S     |  114 +++++++++++++++++++++
 arch/hexagon/mm/copy_to_user.S       |   92 +++++++++++++++++
 arch/hexagon/mm/copy_user_template.S |  185 +++++++++++++++++++++++++++++++++++
 arch/hexagon/mm/strnlen_user.S       |  140 ++++++++++++++++++++++++++
 arch/hexagon/mm/uaccess.c            |   59 +++++++++++
 6 files changed, 706 insertions(+)
arch/hexagon/include/asm/uaccess.h new file +116 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/uaccess.h
===================================================================
@@ -0,0 +1,116 @@
+/*
+ * User memory access support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_UACCESS_H
+#define _ASM_UACCESS_H
+/*
+ * User space memory access functions
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/segment.h>
+#include <asm/sections.h>
+
+/*
+ * access_ok: - Checks if a user space pointer is valid
+ * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE.  Note that
+ *        %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
+ *        to write to a block, it is always safe to read from it.
+ * @addr: User space pointer to start of block to check
+ * @size: Size of block to check
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * Checks if a pointer to a block of memory in user space is valid.
+ *
+ * Returns true (nonzero) if the memory block *may* be valid, false (zero)
+ * if it is definitely invalid.
+ *
+ * User address space in Hexagon, like x86, goes to 0xbfffffff, so the
+ * simple MSB-based tests used by MIPS won't work.  Some further
+ * optimization is probably possible here, but for now, keep it
+ * reasonably simple and not *too* slow.  After all, we've got the
+ * MMU for backup.
+ */
+#define VERIFY_READ     0
+#define VERIFY_WRITE    1
+
+#define __access_ok(addr, size) \
+	((get_fs().seg == KERNEL_DS.seg) || \
+	(((unsigned long)addr < get_fs().seg) && \
+	  (unsigned long)size < (get_fs().seg - (unsigned long)addr)))
+
+/*
+ * When a kernel-mode page fault is taken, the faulting instruction
+ * address is checked against a table of exception_table_entries.
+ * Each entry is a tuple of the address of an instruction that may
+ * be authorized to fault, and the address at which execution should
+ * be resumed instead of the faulting instruction, so as to effect
+ * a workaround.
+ */
+
+/*  Assembly somewhat optimized copy routines  */
+unsigned long __copy_from_user_hexagon(void *to, const void __user *from,
+				     unsigned long n);
+unsigned long __copy_to_user_hexagon(void __user *to, const void *from,
+				   unsigned long n);
+
+#define __copy_from_user(to, from, n) __copy_from_user_hexagon(to, from, n)
+#define __copy_to_user(to, from, n) __copy_to_user_hexagon(to, from, n)
+
+/*
+ * XXX todo: some additonal performance gain is possible by
+ * implementing __copy_to/from_user_inatomic, which is much
+ * like __copy_to/from_user, but performs slightly less checking.
+ */
+
+__kernel_size_t __clear_user_hexagon(void __user *dest, unsigned long count);
+#define __clear_user(a, s) __clear_user_hexagon((a), (s))
+
+#define __strncpy_from_user(dst, src, n) hexagon_strncpy_from_user(dst, src, n)
+
+/*  get around the ifndef in asm-generic/uaccess.h  */
+#define __strnlen_user __strnlen_user
+
+extern long __strnlen_user(const char __user *src, long n);
+
+static inline long hexagon_strncpy_from_user(char *dst, const char __user *src,
+					     long n);
+
+#include <asm-generic/uaccess.h>
+
+/*  Todo:  an actual accelerated version of this.  */
+static inline long hexagon_strncpy_from_user(char *dst, const char __user *src,
+					     long n)
+{
+	long res = __strnlen_user(src, n);
+
+	/* return from strnlen can't be zero -- that would be rubbish. */
+
+	if (res > n) {
+		copy_from_user(dst, src, n);
+		return n;
+	} else {
+		copy_from_user(dst, src, res);
+		return res-1;
+	}
+}
+
+#endif
arch/hexagon/mm/copy_from_user.S new file +114 -0

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arch/hexagon/mm/copy_to_user.S new file +92 -0

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arch/hexagon/mm/copy_user_template.S new file +185 -0

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arch/hexagon/mm/uaccess.c new file +59 -0

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arch/hexagon/mm/strnlen_user.S new file +140 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#44 lore raw

PATCH 24/36 Hexagon: Provide basic implementation and/or stubs for I/O routines.

In reply to Richard Kuo
---
 arch/hexagon/include/asm/io.h    |  279 +++++++++++++++++++++++++++++++++++++++
 arch/hexagon/include/asm/iomap.h |   30 ++++
 arch/hexagon/lib/io.c            |   91 ++++++++++++
 3 files changed, 400 insertions(+)
arch/hexagon/include/asm/io.h new file +279 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/io.h
===================================================================
@@ -0,0 +1,279 @@
+/*
+ * IO definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_IO_H
+#define _ASM_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/vmalloc.h>
+#include <asm/string.h>
+#include <asm/mem-layout.h>
+#include <asm/iomap.h>
+#include <asm/page.h>
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
+
+/*
+ * Need to figure out where our I/O space is.  Important for PCI.
+ * Which we don't have.
+ */
+#define IO_SPACE_LIMIT 0xffffffff
+#define _IO_BASE 0x0
+
+extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
+				unsigned long end, unsigned long flags);
+
+extern void __iounmap(const volatile void __iomem *addr);
+
+/* Defined in lib/io.c, needed for smc91x driver. */
+extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
+extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
+
+extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen);
+extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen);
+
+#define readsw(p, d, l)	__raw_readsw(p, d, l)
+#define writesw(p, d, l) __raw_writesw(p, d, l)
+
+#define readsl(p, d, l)   __raw_readsl(p, d, l)
+#define writesl(p, d, l)  __raw_writesl(p, d, l)
+
+/*
+ * virt_to_phys - map virtual address to physical
+ * @address:  address to map
+ */
+static inline unsigned long virt_to_phys(volatile void *address)
+{
+	return __pa(address);
+}
+
+/*
+ * phys_to_virt - map physical address to virtual
+ * @address: address to map
+ */
+static inline void *phys_to_virt(unsigned long address)
+{
+	return __va(address);
+}
+
+/*
+ * IO port access primitives.  Hexagon doesn't have special IO access
+ * instructions; all I/O is memory mapped.
+ *
+ * in/out are used for "ports", but we don't have "port instructions",
+ * so these are really just memory mapped too.
+ */
+
+/*
+ * readb - read byte from memory mapped device
+ * @addr:  pointer to memory
+ *
+ * Operates on "I/O bus memory space"
+ */
+static inline u8 readb(const volatile void __iomem *addr)
+{
+	const volatile u8 *__mem = addr;
+	u8 val = *__mem;
+	return val;
+}
+
+static inline u16 readw(const volatile void __iomem *addr)
+{
+	const volatile u16 *__mem = addr;
+	u16 val = *__mem;
+	return val;
+}
+
+static inline u32 readl(const volatile void __iomem *addr)
+{
+	const volatile u32 *__mem = addr;
+	u32 val = *__mem;
+	return val;
+}
+
+/*
+ * inb - read byte from I/O port or something
+ * @port:  address in I/O space
+ *
+ * Operates on "I/O bus I/O space"
+ */
+static inline u8 inb(unsigned long port)
+{
+	printk(KERN_INFO "inb not implemented\n");
+	return 0;
+}
+
+static inline u16 inw(unsigned long port)
+{
+	printk(KERN_INFO "inw not implemented\n");
+	return 0;
+}
+
+static inline u32 inl(unsigned long port)
+{
+	printk(KERN_INFO "inl not implemented\n");
+	return 0;
+}
+
+/*
+ * writeb - write a byte to a memory location
+ * @data: data to write to
+ * @addr:  pointer to memory
+ *
+ */
+static inline void writeb(u8 data, volatile void __iomem *addr)
+{
+	volatile u8 *__mem = addr;
+	*__mem = data;
+	return;
+}
+
+static inline void writew(u16 data, volatile void __iomem *addr)
+{
+	volatile u16 *__mem = addr;
+	*__mem = data;
+	return;
+}
+
+static inline void writel(u32 data, volatile void __iomem *addr)
+{
+	volatile u32 *__mem = addr;
+	*__mem = data;
+	return;
+}
+
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+
+#define PCI_IO_ADDR	volatile void __iomem *
+
+/*
+ * outb - write a byte to a memory location
+ * @data: data to write to
+ * @addr:  address in I/O space
+ */
+static inline void outb(u8 data, unsigned long port)
+{
+	writeb(data, (PCI_IO_ADDR)_IO_BASE+port);
+}
+
+static inline void outw(u16 data, unsigned long port)
+{
+	writew(data, (PCI_IO_ADDR)_IO_BASE+port);
+}
+
+static inline void outl(u32 data, unsigned long port)
+{
+	writel(data, (PCI_IO_ADDR)_IO_BASE+port);
+}
+
+/*
+ * Need an mtype somewhere in here, for cache type deals?
+ * This is probably too long for an inline.
+ */
+void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size);
+
+static inline void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
+{
+	return ioremap_nocache(phys_addr, size);
+}
+
+static inline void iounmap(volatile void __iomem *addr)
+{
+	__iounmap(addr);
+}
+
+#define __raw_writel writel
+
+/*  _p means "pause until the I/O completes"  */
+#define outb_p outb
+#define outw_p outw
+#define outl_p outl
+
+#define inb_p inb
+#define inw_p inw
+#define inl_p inl
+
+static inline void insb(unsigned long addr, void *buffer, int count)
+{
+	printk(KERN_INFO "insb not implemented\n");
+}
+
+static inline void insw(unsigned long addr, void *buffer, int count)
+{
+	printk(KERN_INFO "insw not implemented\n");
+}
+
+static inline void insl(unsigned long addr, void *buffer, int count)
+{
+	printk(KERN_INFO "insl not implemented\n");
+}
+
+static inline void outsb(unsigned long addr, const void *buffer, int count)
+{
+	printk(KERN_INFO "outsb not implemented\n");
+}
+
+static inline void outsw(unsigned long addr, const void *buffer, int count)
+{
+	printk(KERN_INFO "outsw not implemented\n");
+}
+
+static inline void outsl(unsigned long addr, const void *buffer, int count)
+{
+	printk(KERN_INFO "outsl not implemented\n");
+}
+
+static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
+	int count)
+{
+	memcpy(dst, (void *) src, count);
+}
+
+static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
+	int count)
+{
+	memcpy((void *) dst, src, count);
+}
+
+/*
+ * convert a physical pointer to a virtual kernel pointer for
+ * /dev/mem access.
+ */
+#define xlate_dev_kmem_ptr(p)    __va(p)
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*  generic versions defined in lib/iomap.c  */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *addr);
+
+#define flush_write_buffers() do { } while (0)
+
+#endif /* __KERNEL__ */
+
+#endif
arch/hexagon/lib/io.c new file +91 -0

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arch/hexagon/include/asm/iomap.h new file +30 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/iomap.h
===================================================================
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _HEXAGON_IOMAP_H
+#define _HEXAGON_IOMAP_H
+
+#ifndef __ASSEMBLY__
+#include <asm-generic/iomap.h>
+#endif
+
+#ifdef CONFIG_HEXAGON_COMET
+#include "platform/comet/comet_iomap.h"
+#endif
+
+#endif

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#45 lore raw

Re: [patch 24/36] Hexagon: Provide basic implementation and/or stubs for I/O routines.

arch/hexagon/include/asm/io.h line 41

Quoted 6 lines · On Wednesday 17 August 2011 11:35:21 Richard Kuo wrote:
arch/hexagon/include/asm/io.h new file +6 -0
+/*
+ * Need to figure out where our I/O space is.  Important for PCI.
+ * Which we don't have.
+ */
+#define IO_SPACE_LIMIT 0xffffffff
+#define _IO_BASE 0x0

Better set IO_SPACE_LIMIT to zero then, which should prevent drivers from doing NULL pointer dereferences when they want to access I/O space.

Quoted 24 lines
arch/hexagon/include/asm/io.h new file +24 -0
+/*
+ * IO port access primitives.  Hexagon doesn't have special IO access
+ * instructions; all I/O is memory mapped.
+ *
+ * in/out are used for "ports", but we don't have "port instructions",
+ * so these are really just memory mapped too.
+ */
+
+/*
+ * readb - read byte from memory mapped device
+ * @addr:  pointer to memory
+ *
+ * Operates on "I/O bus memory space"
+ */
+static inline u8 readb(const volatile void __iomem *addr)
+{
+	const volatile u8 *__mem = addr;
+	u8 val = *__mem;
+	return val;
+}
+
+static inline u16 readw(const volatile void __iomem *addr)
+{
+	const volatile u16 *__mem = addr;

arch/hexagon/include/asm/io.h line 112

Quoted 10 lines
arch/hexagon/include/asm/io.h new file +10 -0
+	u16 val = *__mem;
+	return val;
+}
+
+static inline u32 readl(const volatile void __iomem *addr)
+{
+	const volatile u32 *__mem = addr;
+	u32 val = *__mem;
+	return val;
+}

These definitions might not be safe, because gcc can turn these accesses into byte-wise pointer dereferences when it feels like it. Better use inline assembly.

Quoted 13 lines
arch/hexagon/include/asm/io.h new file +13 -0
+/*
+ * inb - read byte from I/O port or something
+ * @port:  address in I/O space
+ *
+ * Operates on "I/O bus I/O space"
+ */
+static inline u8 inb(unsigned long port)
+{
+	printk(KERN_INFO "inb not implemented\n");
+	return 0;
+}
+
+static inline u16 inw(unsigned long port)

arch/hexagon/include/asm/io.h line 136

Quoted 10 lines
arch/hexagon/include/asm/io.h new file +10 -0
+{
+	printk(KERN_INFO "inw not implemented\n");
+	return 0;
+}
+
+static inline u32 inl(unsigned long port)
+{
+	printk(KERN_INFO "inl not implemented\n");
+	return 0;
+}

I'm working on a patch set to make it possible to build the kernel without having to define these when you have no PCI. Maybe you can leave them out already and see how far you get on your platform?

It will definitely break allyesconfig right now, but perhaps not break any of the drivers that you actually use.

Quoted 9 lines
arch/hexagon/include/asm/io.h new file +9 -0
+/*
+ * outb - write a byte to a memory location
+ * @data: data to write to
+ * @addr:  address in I/O space
+ */
+static inline void outb(u8 data, unsigned long port)
+{
+	writeb(data, (PCI_IO_ADDR)_IO_BASE+port);
+}

arch/hexagon/include/asm/io.h line 193

Quoted 10 lines
arch/hexagon/include/asm/io.h new file +10 -0
+
+static inline void outw(u16 data, unsigned long port)
+{
+	writew(data, (PCI_IO_ADDR)_IO_BASE+port);
+}
+
+static inline void outl(u32 data, unsigned long port)
+{
+	writel(data, (PCI_IO_ADDR)_IO_BASE+port);
+}

It seems very inconsistent to provide outb but not inb.

arch/hexagon/include/asm/io.h line 273

Quoted 4 lines
arch/hexagon/include/asm/io.h new file +4 -0
+
+/*  generic versions defined in lib/iomap.c  */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *addr);

You don't need these when you set CONFIG_NO_IOPORT.

Arnd

#46 lore raw

PATCH 25/36 Hexagon: Implement basic cache-flush support

In reply to Richard Kuo

We have separate I/D caches. Data caches are physically indexed.

---
 arch/hexagon/include/asm/cache.h      |   34 +++++++++++
 arch/hexagon/include/asm/cacheflush.h |   97 ++++++++++++++++++++++++++++++++++
 arch/hexagon/mm/cache.c               |   85 +++++++++++++++++++++++++++++
 3 files changed, 216 insertions(+)
arch/hexagon/include/asm/cacheflush.h new file +97 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/cacheflush.h
===================================================================
@@ -0,0 +1,97 @@
+/*
+ * Cache flush operations for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_CACHEFLUSH_H
+#define _ASM_CACHEFLUSH_H
+
+#include <linux/cache.h>
+#include <linux/mm.h>
+#include <asm/string.h>
+#include <asm-generic/cacheflush.h>
+
+/* Cache flushing:
+ *
+ *  - flush_cache_all() flushes entire cache
+ *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
+ *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
+ *  - flush_cache_range(vma, start, end) flushes a range of pages
+ *  - flush_icache_range(start, end) flush a range of instructions
+ *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
+ *  - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
+ *
+ *  Need to doublecheck which one is really needed for ptrace stuff to work.
+ */
+#define LINESIZE	32
+#define LINEBITS	5
+
+/*
+ * Flush Dcache range through current map.
+ */
+extern void flush_dcache_range(unsigned long start, unsigned long end);
+
+/*
+ * Flush Icache range through current map.
+ */
+#undef flush_icache_range
+extern void flush_icache_range(unsigned long start, unsigned long end);
+
+/*
+ * Memory-management related flushes are there to ensure in non-physically
+ * indexed cache schemes that stale lines belonging to a given ASID aren't
+ * in the cache to confuse things.  The prototype Hexagon Virtual Machine
+ * only uses a single ASID for all user-mode maps, which should
+ * mean that they aren't necessary.  A brute-force, flush-everything
+ * implementation, with the name xxxxx_hexagon() is present in
+ * arch/hexagon/mm/cache.c, but let's not wire it up until we know
+ * it is needed.
+ */
+extern void flush_cache_all_hexagon(void);
+
+/*
+ * This may or may not ever have to be non-null, depending on the
+ * virtual machine MMU.  For a native kernel, it's definitiely  a no-op
+ *
+ * This is also the place where deferred cache coherency stuff seems
+ * to happen, classically...  but instead we do it like ia64 and
+ * clean the cache when the PTE is set.
+ *
+ */
+static inline void update_mmu_cache(struct vm_area_struct *vma,
+					unsigned long address, pte_t *ptep)
+{
+	/*  generic_ptrace_pokedata doesn't wind up here, does it?  */
+}
+
+#undef copy_to_user_page
+static inline void copy_to_user_page(struct vm_area_struct *vma,
+					     struct page *page,
+					     unsigned long vaddr,
+					     void *dst, void *src, int len)
+{
+	memcpy(dst, src, len);
+	if (vma->vm_flags & VM_EXEC) {
+		flush_icache_range((unsigned long) dst,
+		(unsigned long) dst + len);
+	}
+}
+
+
+
+#endif
arch/hexagon/include/asm/cache.h new file +34 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/cache.h
===================================================================
@@ -0,0 +1,34 @@
+/*
+ * Cache definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __ASM_CACHE_H
+#define __ASM_CACHE_H
+
+/* Bytes per L1 cache line */
+#define L1_CACHE_SHIFT		(5)
+#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
+
+#define __cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
+#define ____cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
+
+/* See http://kerneltrap.org/node/15100  */
+#define __read_mostly
+
+#endif
arch/hexagon/mm/cache.c new file +85 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#47 lore raw

PATCH 26/36 Hexagon: Implement basic TLB management routines for Hexagon.

In reply to Richard Kuo

Mostly all stubs, as the TLB is managed by the hypervisor.

---
 arch/hexagon/include/asm/tlb.h      |   39 +++++++++++++++
 arch/hexagon/include/asm/tlbflush.h |   58 ++++++++++++++++++++++
 arch/hexagon/mm/vm_tlb.c            |   93 ++++++++++++++++++++++++++++++++++++
 3 files changed, 190 insertions(+)
arch/hexagon/include/asm/tlbflush.h new file +58 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/tlbflush.h
===================================================================
@@ -0,0 +1,58 @@
+/*
+ * TLB flush support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TLBFLUSH_H
+#define _ASM_TLBFLUSH_H
+
+#include <linux/mm.h>
+#include <asm/processor.h>
+
+/*
+ * TLB flushing -- in "SMP", these routines get defined to be the
+ * ones from smp.c, else they are some local flavors.
+ */
+
+/*
+ * These functions are commonly macros, but in the interests of
+ * VM vs. native implementation and code size, we simply declare
+ * the function prototypes here.
+ */
+extern void tlb_flush_all(void);
+extern void flush_tlb_mm(struct mm_struct *mm);
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
+extern void flush_tlb_range(struct vm_area_struct *vma,
+				unsigned long start, unsigned long end);
+extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+extern void flush_tlb_one(unsigned long);
+
+/*
+ * "This is called in munmap when we have freed up some page-table pages.
+ * We don't need to do anything here..."
+ *
+ * The VM kernel doesn't walk page tables, and they are passed to the VMM
+ * by logical address. There doesn't seem to be any possibility that they
+ * could be referenced by the VM kernel based on a stale mapping, since
+ * they would only be located by consulting the mm structure, and they
+ * will have been purged from that structure by the munmap.  Seems like
+ * a noop on HVM as well.
+ */
+#define flush_tlb_pgtables(mm, start, end)
+
+#endif
arch/hexagon/include/asm/tlb.h new file +39 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/tlb.h
===================================================================
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TLB_H
+#define _ASM_TLB_H
+
+#include <linux/pagemap.h>
+#include <asm/tlbflush.h>
+
+/*
+ * We don't need any special per-pte or per-vma handling...
+ */
+#define tlb_start_vma(tlb, vma)				do { } while (0)
+#define tlb_end_vma(tlb, vma)				do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address)	do { } while (0)
+
+/*
+ * .. because we flush the whole mm when it fills up
+ */
+#define tlb_flush(tlb)		flush_tlb_mm((tlb)->mm)
+
+#include <asm-generic/tlb.h>
+
+#endif
arch/hexagon/mm/vm_tlb.c new file +93 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#48 lore raw

PATCH 27/36 Hexagon: Provide DMA implementation

In reply to Richard Kuo

Basic DMA implementation for our architecture.

---
 arch/hexagon/include/asm/dma-mapping.h |  101 ++++++++++++++++++++
 arch/hexagon/include/asm/dma.h         |   29 +++++
 arch/hexagon/kernel/dma.c              |  161 +++++++++++++++++++++++++++++++++
 3 files changed, 291 insertions(+)
arch/hexagon/include/asm/dma.h new file +29 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/dma.h
===================================================================
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_DMA_H
+#define _ASM_DMA_H
+
+#include <asm/io.h>
+
+#define MAX_DMA_CHANNELS 1
+#define MAX_DMA_ADDRESS  (PAGE_OFFSET)
+
+extern size_t hexagon_coherent_pool_size;
+
+#endif
arch/hexagon/include/asm/dma-mapping.h new file +101 -0

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arch/hexagon/kernel/dma.c new file +161 -0

161 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#49 lore raw

Re: [patch 27/36] Hexagon: Provide DMA implementation

Quoted 12 lines · On Wednesday 17 August 2011 11:35:24 Richard Kuo wrote:
arch/hexagon/kernel/dma.c new file +12 -0
+static dma_addr_t hexagon_map_page(struct device *dev, struct page *page,
+				   unsigned long offset, size_t size,
+				   enum dma_data_direction dir,
+				   struct dma_attrs *attrs)
+{
+	dma_addr_t bus = page_to_phys(page) + offset;
+	WARN_ON(size == 0);
+
+	if (!check_addr("map_single", dev, bus, size))
+		return bad_dma_address;
+
+	flush_dcache_range(PAGE_OFFSET + bus, PAGE_OFFSET + bus + size);

arch/hexagon/kernel/dma.c line 144

Quoted 10 lines
arch/hexagon/kernel/dma.c new file +10 -0
+
+	return bus;
+}
+
+static void hexagon_sync_single_for_cpu(struct device *dev,
+					dma_addr_t dma_handle, size_t size,
+					enum dma_data_direction dir)
+{
+	mb();
+}

Why do you need to flush the cache in map_page, but not in sync? Normally when you have non-coherent DMA, you need to invalidate the cache in sync_*_foc_cpu and flush it sync_*_for_device.

Arnd

#50 lore raw

PATCH 28/36 Hexagon: Add ioremap support

In reply to Richard Kuo
---
 arch/hexagon/mm/ioremap.c |   57 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)
arch/hexagon/mm/ioremap.c new file +57 -0
Index: linux-hexagon-kernel/arch/hexagon/mm/ioremap.c
===================================================================
@@ -0,0 +1,57 @@
+/*
+ * I/O remap functions for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/io.h>
+#include <linux/vmalloc.h>
+
+void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size)
+{
+	unsigned long last_addr, addr;
+	unsigned long offset = phys_addr & ~PAGE_MASK;
+	struct vm_struct *area;
+
+	pgprot_t prot = __pgprot(_PAGE_PRESENT|_PAGE_READ|_PAGE_WRITE
+					|(__HEXAGON_C_DEV << 6));
+
+	last_addr = phys_addr + size - 1;
+
+	/*  Wrapping not allowed  */
+	if (!size || (last_addr < phys_addr))
+		return NULL;
+
+	/*  Rounds up to next page size, including whole-page offset */
+	size = PAGE_ALIGN(offset + size);
+
+	area = get_vm_area(size, VM_IOREMAP);
+	addr = (unsigned long)area->addr;
+
+	if (ioremap_page_range(addr, addr+size, phys_addr, prot)) {
+		vunmap((void *)addr);
+		return NULL;
+	}
+
+	flush_cache_vmap(addr, addr+size);
+	return (void __iomem *) (offset + addr);
+}
+
+void __iounmap(const volatile void __iomem *addr)
+{
+	vunmap((void *) ((unsigned long) addr & PAGE_MASK));
+}

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#51 lore raw

PATCH 29/36 Hexagon: Add page table header files & etc.

In reply to Richard Kuo
---
 arch/hexagon/include/asm/fixmap.h      |   73 ++++
 arch/hexagon/include/asm/highmem.h     |  111 +++++++
 arch/hexagon/include/asm/mmu.h         |   34 ++
 arch/hexagon/include/asm/mmu_context.h |  100 ++++++
 arch/hexagon/include/asm/page.h        |  157 ++++++++++
 arch/hexagon/include/asm/pgalloc.h     |  146 +++++++++
 arch/hexagon/include/asm/pgtable.h     |  514 +++++++++++++++++++++++++++++++++
 arch/hexagon/mm/kmap.c                 |  150 +++++++++
 arch/hexagon/mm/pgalloc.c              |   25 +
 9 files changed, 1310 insertions(+)
arch/hexagon/include/asm/fixmap.h new file +73 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/fixmap.h
===================================================================
@@ -0,0 +1,73 @@
+/*
+ * Fixmap support for Hexagon - enough to support highmem features
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_FIXMAP_H
+#define _ASM_FIXMAP_H
+
+/*
+ * A lot of the fixmap info is already in mem-layout.h
+ */
+#include <asm/mem-layout.h>
+
+/*
+ * Full fixmap support involves set_fixmap() functions, but
+ * these may not be needed if all we're after is an area for
+ * highmem kernel mappings.
+ */
+#define	__fix_to_virt(x)	(FIXADDR_TOP - ((x) << PAGE_SHIFT))
+#define	__virt_to_fix(x)	((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
+
+extern void __this_fixmap_does_not_exist(void);
+
+/**
+ * fix_to_virt -- "index to address" translation.
+ *
+ * If anyone tries to use the idx directly without translation,
+ * we catch the bug with a NULL-deference kernel oops. Illegal
+ * ranges of incoming indices are caught too.
+ */
+static inline unsigned long fix_to_virt(const unsigned int idx)
+{
+	/*
+	 * This branch gets completely eliminated after inlining,
+	 * except when someone tries to use fixaddr indices in an
+	 * illegal way. (such as mixing up address types or using
+	 * out-of-range indices).
+	 *
+	 * If it doesn't get removed, the linker will complain
+	 * loudly with a reasonably clear error message..
+	 */
+	if (idx >= __end_of_fixed_addresses)
+		__this_fixmap_does_not_exist();
+
+	return __fix_to_virt(idx);
+}
+
+static inline unsigned long virt_to_fix(const unsigned long vaddr)
+{
+	BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
+	return __virt_to_fix(vaddr);
+}
+
+#define kmap_get_fixmap_pte(vaddr) \
+	pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), \
+				(vaddr)), (vaddr)), (vaddr))
+
+#endif
arch/hexagon/include/asm/highmem.h new file +111 -0

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arch/hexagon/include/asm/mmu_context.h new file +100 -0

100 lines not on this page · raw message

arch/hexagon/include/asm/mmu.h new file +34 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/mmu.h
===================================================================
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_MMU_H
+#define _ASM_MMU_H
+
+/*
+ * Architecture-specific state for a mm_struct.
+ * For the Hexagon Virtual Machine, it can be a copy
+ * of the pointer to the page table base.
+ */
+struct mm_context {
+	unsigned long long generation;
+	unsigned long ptbase;
+};
+
+typedef struct mm_context mm_context_t;
+
+#endif
arch/hexagon/include/asm/page.h new file +157 -0

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arch/hexagon/include/asm/pgalloc.h new file +146 -0

146 lines not on this page · raw message

arch/hexagon/include/asm/pgtable.h new file +514 -0

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arch/hexagon/mm/kmap.c new file +150 -0

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arch/hexagon/mm/pgalloc.c new file +25 -0
Index: linux-hexagon-kernel/arch/hexagon/mm/pgalloc.c
===================================================================
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/init.h>
+
+void __init pgtable_cache_init(void)
+{
+}
+
+

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#52 lore raw

PATCH 30/36 Hexagon: Add page-fault support.

In reply to Richard Kuo
---
 arch/hexagon/include/asm/mem-layout.h |  112 +++++++++++++
 arch/hexagon/include/asm/vm_fault.h   |   26 +++
 arch/hexagon/mm/init.c                |  277 ++++++++++++++++++++++++++++++++++
 arch/hexagon/mm/vm_fault.c            |  188 +++++++++++++++++++++++
 4 files changed, 603 insertions(+)
arch/hexagon/include/asm/mem-layout.h new file +112 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/mem-layout.h
===================================================================
@@ -0,0 +1,112 @@
+/*
+ * Memory layout definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_HEXAGON_MEM_LAYOUT_H
+#define _ASM_HEXAGON_MEM_LAYOUT_H
+
+#include <linux/const.h>
+
+/*
+ * Have to do this for ginormous numbers, else they get printed as
+ * negative numbers, which the linker no likey when you try to
+ * assign it to the location counter.
+ */
+
+#define PAGE_OFFSET			_AC(0xc0000000, UL)
+
+/*
+ * LOAD_ADDRESS is the physical/linear address of where in memory
+ * the kernel gets loaded. The 12 least significant bits must be zero (0)
+ * due to limitations on setting the EVB
+ *
+ */
+
+#ifndef LOAD_ADDRESS
+#define LOAD_ADDRESS			0x00000000
+#endif
+
+#define TASK_SIZE			(PAGE_OFFSET)
+
+/*  not sure how these are used yet  */
+#define STACK_TOP			TASK_SIZE
+#define STACK_TOP_MAX			TASK_SIZE
+
+#ifndef __ASSEMBLY__
+enum fixed_addresses {
+	FIX_KMAP_BEGIN,
+	FIX_KMAP_END,  /*  check for per-cpuism  */
+	__end_of_fixed_addresses
+};
+
+#define MIN_KERNEL_SEG 0x300   /* From 0xc0000000 */
+extern int max_kernel_seg;
+
+/*
+ * Start of vmalloc virtual address space for kernel;
+ * supposed to be based on the amount of physical memory available
+ */
+
+#define VMALLOC_START (PAGE_OFFSET + VMALLOC_OFFSET + \
+	(unsigned long)high_memory)
+
+/* Gap between physical ram and vmalloc space for guard purposes. */
+#define VMALLOC_OFFSET PAGE_SIZE
+
+/*
+ * Create the space between VMALLOC_START and FIXADDR_TOP backwards
+ * from the ... "top".
+ *
+ * Permanent IO mappings will live at 0xfexx_xxxx
+ * Hypervisor occupies the last 16MB page at 0xffxxxxxx
+ */
+
+#define FIXADDR_TOP     0xfe000000
+#define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_START   (FIXADDR_TOP - FIXADDR_SIZE)
+
+/*
+ * "permanent kernel mappings", defined as long-lasting mappings of
+ * high-memory page frames into the kernel address space.
+ */
+
+#define LAST_PKMAP	PTRS_PER_PTE
+#define LAST_PKMAP_MASK	(LAST_PKMAP - 1)
+#define PKMAP_NR(virt)	((virt - PKMAP_BASE) >> PAGE_SHIFT)
+#define PKMAP_ADDR(nr)	(PKMAP_BASE + ((nr) << PAGE_SHIFT))
+
+/*
+ * To the "left" of the fixed map space is the kmap space
+ *
+ * "Permanent Kernel Mappings"; fancy (or less fancy) PTE table
+ * that looks like it's actually walked.
+ * Need to check the alignment/shift usage; some archs use
+ * PMD_MASK on this value
+ */
+#define PKMAP_BASE (FIXADDR_START-PAGE_SIZE*LAST_PKMAP)
+
+/*
+ * 2 pages of guard gap between where vmalloc area ends
+ * and pkmap_base begins.
+ */
+#define VMALLOC_END (PKMAP_BASE-PAGE_SIZE*2)
+#endif /*  !__ASSEMBLY__  */
+
+
+#endif /* _ASM_HEXAGON_MEM_LAYOUT_H */
arch/hexagon/mm/init.c new file +277 -0

277 lines not on this page · raw message

arch/hexagon/mm/vm_fault.c new file +188 -0

188 lines not on this page · raw message

arch/hexagon/include/asm/vm_fault.h new file +26 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/vm_fault.h
===================================================================
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_HEXAGON_VM_FAULT_H
+#define _ASM_HEXAGON_VM_FAULT_H
+
+extern void execute_protection_fault(struct pt_regs *);
+extern void write_protection_fault(struct pt_regs *);
+extern void read_protection_fault(struct pt_regs *);
+
+#endif

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#53 lore raw

PATCH 31/36 Hexagon: kgdb support files

In reply to Richard Kuo
---
 arch/hexagon/include/asm/kgdb.h |   39 ++++++
 arch/hexagon/kernel/kgdb.c      |  241 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 280 insertions(+)
arch/hexagon/include/asm/kgdb.h new file +39 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/kgdb.h
===================================================================
@@ -0,0 +1,39 @@
+/*
+ * arch/hexagon/include/asm/kgdb.h - Hexagon KGDB Support
+ *
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __HEXAGON_KGDB_H__
+#define __HEXAGON_KGDB_H__
+
+#define BREAK_INSTR_SIZE 4
+#define CACHE_FLUSH_IS_SAFE   1
+#define BUFMAX       ((NUMREGBYTES * 2) + 512)
+
+static inline void arch_kgdb_breakpoint(void)
+{
+	asm("trap0(#0xDB)");
+}
+
+/* Registers:
+ * 32 gpr + sa0/1 + lc0/1 + m0/1 + gp + ugp + pred + pc = 42 total.
+ */
+#define NUMREGBYTES  (42*4)
+#define DBG_MAX_REG_NUM 42
+
+#endif /* __HEXAGON_KGDB_H__ */
arch/hexagon/kernel/kgdb.c new file +241 -0

241 lines not on this page · raw message

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#54 lore raw

PATCH 32/36 Hexagon: Comet platform support

In reply to Richard Kuo
---
 arch/hexagon/configs/comet_defconfig                  |  873 ++++++++++++++++++
 arch/hexagon/include/asm/platform/comet/comet_iomap.h |  237 ++++
 arch/hexagon/include/asm/platform/comet/irq.h         |   25 
 arch/hexagon/platform/comet/Kconfig                   |    1 
 arch/hexagon/platform/comet/Makefile                  |    1 
 arch/hexagon/platform/comet/board.c                   |  195 ++++
 arch/hexagon/platform/comet/board.h                   |   27 
 7 files changed, 1359 insertions(+)
arch/hexagon/configs/comet_defconfig new file +873 -0
Index: linux-hexagon-kernel/arch/hexagon/configs/comet_defconfig
===================================================================
@@ -0,0 +1,873 @@
+#
+# Automatically generated make config: don't edit
+# Linux/hexagon 2.6.39-rc5 Kernel Configuration
+# Wed May  4 16:08:56 2011
+#
+
+#
+# Linux Kernel Configuration for Hexagon
+#
+CONFIG_HEXAGON=y
+CONFIG_HEXAGON_ARCH_V2=y
+CONFIG_FRAME_POINTER=y
+CONFIG_LOCKDEP_SUPPORT=y
+# CONFIG_PCI is not set
+CONFIG_EARLY_PRINTK=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_MMU=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_HAS_DMA=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_BUG=y
+
+#
+# Machine selection
+#
+CONFIG_HEXAGON_COMET=y
+# CONFIG_HEXAGON_AMAZON is not set
+CONFIG_HEXAGON_VM=y
+CONFIG_CMDLINE=""
+# CONFIG_HEXAGON_ANGEL_TRAPS is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=6
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_PAGE_SIZE_256KB is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=0
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_HEXAGON_BITOPS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE="hexagon-"
+CONFIG_LOCALVERSION="-smp"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_FHANDLE is not set
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+# CONFIG_TASK_XACCT is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_DMA_ATTRS=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM63XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+CONFIG_SMSC911X=y
+# CONFIG_SMSC911X_ARCH_HOOKS is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=64
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_SERIAL_MSM_CONSOLE_PORT=2
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_MFD_SUPPORT=y
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_MC13XXX is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Executable File Formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_NLATTR=y
+# CONFIG_AVERAGE is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=0
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_DETECTOR=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_RCU_CPU_STALL_DETECTOR_RUNNABLE=y
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
arch/hexagon/platform/comet/board.c new file +195 -0

195 lines not on this page · raw message

arch/hexagon/platform/comet/board.h new file +27 -0
Index: linux-hexagon-kernel/arch/hexagon/platform/comet/board.h
===================================================================
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _COMET_BOARD_H
+#define _COMET_BOARD_H
+
+#define UART_NS_REG__UART3_SRC_SEL__TCX04       0x1
+#define UART_NS_REG__UART3_SRC_SEL___S          12
+#define UART_NS_REG__UART3_ROOT_ENA___M         0x00010000
+#define UART_NS_REG__UART3_CLK_BRANCH_ENA___M   0x00020000
+
+#endif
arch/hexagon/platform/comet/Kconfig new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/platform/comet/Kconfig
===================================================================
@@ -0,0 +1 @@
+# this space intentionally left blank
arch/hexagon/platform/comet/Makefile new file +1 -0
Index: linux-hexagon-kernel/arch/hexagon/platform/comet/Makefile
===================================================================
@@ -0,0 +1 @@
+obj-y += board.o
arch/hexagon/include/asm/platform/comet/comet_iomap.h new file +237 -0

237 lines not on this page · raw message

arch/hexagon/include/asm/platform/comet/irq.h new file +25 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/platform/comet/irq.h
===================================================================
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef PLAT_IRQ_H
+#define PLAT_IRQ_H
+
+/* XXX TODO probably should move stuff from comet_iomap.h to here ?? */
+
+#endif
+

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#55 lore raw

Re: [patch 32/36] Hexagon: Comet platform support

arch/hexagon/configs/comet_defconfig line 6

Quoted 11 lines · On Wednesday 17 August 2011 11:35:29 Richard Kuo wrote:

Index: linux-hexagon-kernel/arch/hexagon/configs/comet_defconfig
===================================================================

arch/hexagon/configs/comet_defconfig new file +6 -0
@@ -0,0 +1,873 @@
+#
+# Automatically generated make config: don't edit
+# Linux/hexagon 2.6.39-rc5 Kernel Configuration
+# Wed May  4 16:08:56 2011
+#
+

You should generate minimal defconfig files using 'make savedefconfig', instead of listing the full config file as a defconfig.

arch/hexagon/platform/comet/board.c line 2

Quoted 7 lines

Index: linux-hexagon-kernel/arch/hexagon/platform/comet/board.c
===================================================================

arch/hexagon/platform/comet/board.c new file +2 -0
@@ -0,0 +1,195 @@
+/*
+ * linux/arch/hexagon/platform/comet/board.c

We really don't want to have board files in new architectures any more. If your hardware is not fully discoverable, you should instead describe it in a device tree source file, see powerpc, microblaze, and the newer arm platforms.

Quoted 22 lines
arch/hexagon/platform/comet/board.c new file +22 -0
+/*
+ * The "machine" io starts at UART1, but UART3 is the one that's signed up
+ * for console.
+ *
+ * If you change UART3, you need to change hexagon_cosimcfg for
+ * software simulation.
+ */
+
+#define EBI1_CS_N1_TOP		0x30000000
+
+#define SMC911X_PHYS		0x84000000
+#define AUDIO_PHYS		0xa0700000
+#define SSBI_PHYS		0xa8100000
+#define CLK_CTL_PHYS		0xa8600000
+
+#define TLMMADDR_GPIO1_BASE		0xa8e00000
+#define TLMMADDR_GPIO2_BASE		0xa8f00000
+#define TLMMADDR_GPIO1SHDW1_BASE	0xa9000000
+#define TLMMADDR_GPIO2SHDW1_BASE	0xa9100000
+
+#define MSM_UART1_PHYS		0xA9A00000
+#define MSM_UART1_SIZE		(1<<12)

arch/hexagon/platform/comet/board.c line 34

Quoted 10 lines
arch/hexagon/platform/comet/board.c new file +10 -0
+
+#define MSM_UART2_PHYS		0xA9B00000
+#define MSM_UART2_SIZE		(1<<12)
+
+#define MSM_UART3_PHYS		0xA9C00000
+#define MSM_UART3_SIZE		(1<<12)
+
+#define ADSP6_SIRC		0xab010000
+
+#define MSS_PERIPH_PHYS		0xb8000000

All the register definitions need to go into the device tree file.

arch/hexagon/platform/comet/board.c line 45

Quoted 11 lines
arch/hexagon/platform/comet/board.c new file +11 -0
+/* Second-level interrupt registers */
+/* These all sit on thier own 4K page */
+/* These are relative to ADSP6_SIRC */
+#define HEXSS_SIRC0_INT_ENABLE		0x0000
+#define HEXSS_SIRC0_INT_ENABLE_CLEAR	0x0004
+#define HEXSS_SIRC0_INT_ENABLE_SET	0x0008
+#define HEXSS_SIRC0_INT_TYPE		0x000C
+#define HEXSS_SIRC0_INT_POLARITY	0x0010
+#define HEXSS_SIRC0_IRQ_STATUS		0x0014
+#define HEXSS_SIRC0_INT_CLEAR		0x0018
+#define HEXSS_SIRC0_SOFT_INT		0x001C

This and the rest of this file seems to be driver specific, so move the definitions into the respective driver files that use them.

There is no need for a global header file.

Arnd

#56 lore raw

Re: [patch 32/36] Hexagon: Comet platform support

Quoted 5 lines · Arnd Bergmann
Quoted 1 line

+ * linux/arch/hexagon/platform/comet/board.c

We really don't want to have board files in new architectures any more. If your hardware is not fully discoverable, you should instead describe it in a device tree source file, see powerpc, microblaze, and the newer arm platforms.

Working on device-tree support, slowly but surely, but this could get all tangled
for a while as many of the devices are common with the arm. The goal is to yank this file before the final submission. but for now, it seemed easier to mail
this as a work in progress.

-- Linas

#57 lore raw

Re: [patch 32/36] Hexagon: Comet platform support

In reply to Richard Kuo

arch/hexagon/configs/comet_defconfig line 4

Quoted 7 lines · Richard Kuo
arch/hexagon/configs/comet_defconfig new file +4 -0
@@ -0,0 +1,873 @@
+#
+# Automatically generated make config: don't edit
+# Linux/hexagon 2.6.39-rc5 Kernel Configuration
+# Wed May  4 16:08:56 2011

This should be a shrunk defconfig. If you 'make savedefconfig', it'll make a shortened version of this file that will only contain fields that are set to non-default values. It reduces the amount of churn on these files (and also just makes them a lot smaller).

David

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#58 lore raw

PATCH 33/36 Hexagon: Platform-generic support.

In reply to Richard Kuo

We understand that devtree is preferred for platform support and will be switching to that in the foreseeable future.

---
 arch/hexagon/include/asm/angel_console.h     |   24 +++
 arch/hexagon/include/asm/clock.h             |  172 ++++++++++++++++++++++
 arch/hexagon/include/asm/gpio.h              |   32 ++++
 arch/hexagon/include/asm/platform.h          |   49 ++++++
 arch/hexagon/include/asm/platform/sirc.h     |   71 +++++++++
 arch/hexagon/platform/common/Makefile        |   12 +
 arch/hexagon/platform/common/angel_console.c |   89 +++++++++++
 arch/hexagon/platform/common/angel_misc.c    |   56 +++++++
 arch/hexagon/platform/common/clock.c         |  100 ++++++++++++
 arch/hexagon/platform/common/irq.c           |   23 ++
 arch/hexagon/platform/common/platform.c      |   82 ++++++++++
 arch/hexagon/platform/common/sirc.c          |  208 +++++++++++++++++++++++++++
 12 files changed, 918 insertions(+)
arch/hexagon/include/asm/angel_console.h new file +24 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/angel_console.h
===================================================================
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ANGEL_CONSOLE_H
+#define _ANGEL_CONSOLE_H
+
+void __init register_angel_console(void);
+
+#endif
arch/hexagon/include/asm/clock.h new file +172 -0

172 lines not on this page · raw message

arch/hexagon/include/asm/gpio.h new file +32 -0
Index: linux-hexagon-kernel/arch/hexagon/include/asm/gpio.h
===================================================================
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef __ASM_ARCH_HEXAGON_GPIO_H
+#define __ASM_ARCH_HEXAGON_GPIO_H
+
+#ifdef CONFIG_GENERIC_GPIO
+#include <asm-generic/gpio.h>
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+	 return __gpio_to_irq(gpio);
+}
+#endif
+
+#endif
+
arch/hexagon/include/asm/platform.h new file +49 -0

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arch/hexagon/platform/common/angel_console.c new file +89 -0

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arch/hexagon/platform/common/clock.c new file +100 -0

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arch/hexagon/platform/common/Makefile new file +12 -0
Index: linux-hexagon-kernel/arch/hexagon/platform/common/Makefile
===================================================================
@@ -0,0 +1,12 @@
+
+obj-y += platform.o irq.o
+
+obj-y += clock.o
+
+ifdef CONFIG_HEXAGON_ANGEL_TRAPS
+obj-y += angel_misc.o angel_console.o
+endif
+
+ifdef CONFIG_HEXAGON_COMET
+obj-y += sirc.o
+endif
arch/hexagon/platform/common/platform.c new file +82 -0

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arch/hexagon/platform/common/irq.c new file +23 -0
Index: linux-hexagon-kernel/arch/hexagon/platform/common/irq.c
===================================================================
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/init.h>
+#include <asm/irq.h>
+
+/* For now, a no-op ... When would we ever need this ?? */
+void __init platform_irq_init(void) {}
arch/hexagon/platform/common/angel_misc.c new file +56 -0

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arch/hexagon/include/asm/platform/sirc.h new file +71 -0

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arch/hexagon/platform/common/sirc.c new file +208 -0

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Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#59 lore raw

Re: [patch 33/36] Hexagon: Platform-generic support.

Quoted 6 lines · On Wednesday 17 August 2011 11:35:30 Richard Kuo wrote:

We understand that devtree is preferred for platform support and will be switching to that in the foreseeable future.

Quoted 14 lines
---
 arch/hexagon/include/asm/angel_console.h     |   24 +++
 arch/hexagon/include/asm/clock.h             |  172 ++++++++++++++++++++++
 arch/hexagon/include/asm/gpio.h              |   32 ++++
 arch/hexagon/include/asm/platform.h          |   49 ++++++
 arch/hexagon/include/asm/platform/sirc.h     |   71 +++++++++
 arch/hexagon/platform/common/Makefile        |   12 +
 arch/hexagon/platform/common/angel_console.c |   89 +++++++++++
 arch/hexagon/platform/common/angel_misc.c    |   56 +++++++
 arch/hexagon/platform/common/clock.c         |  100 ++++++++++++
 arch/hexagon/platform/common/irq.c           |   23 ++
 arch/hexagon/platform/common/platform.c      |   82 ++++++++++
 arch/hexagon/platform/common/sirc.c          |  208 +++++++++++++++++++++++++++
 12 files changed, 918 insertions(+)

I think it would be better not to start with a 'platform' directory then:
Ideally you should be able to handle all systems with a single kernel, and so far there is only one platform.

Just move the contents into an appropriate location, and at the point in the distant future where you need multiple platforms, split out just the parts that are different.

Also, my feeling is that we should not merge the platform code into mainline until it has been converted to device tree based probing.

Quoted 23 lines

Index: linux-hexagon-kernel/arch/hexagon/include/asm/platform.h
===================================================================

arch/hexagon/include/asm/platform.h new file +19 -0
+#ifndef __PLATFORM_H
+#define __PLATFORM_H
+
+extern int on_simulator;
+extern unsigned long bootmem_lastpg;
+
+/* Platforms */
+enum {
+	PLATFORM_COMET	= 1,	/*  Comet/Simulator  */
+};
+
+/*
+ * Function pointers to all our platform specific callouts
+ */
+struct platform_ops_t {
+	void (*register_early_console)(void);
+	void (*clock_init)(void);
+	void (*irq_init)(void);
+};

arch/hexagon/include/asm/platform.h line 49

Quoted 10 lines
arch/hexagon/include/asm/platform.h new file +10 -0
+
+void platform_setup_ops(struct platform_ops_t *);
+void __init comet_setup_ops(struct platform_ops_t * ops);
+void __init amazon_setup_ops(struct platform_ops_t * ops);
+
+extern void __init plat_clock_init(void);
+
+extern void __init angel_get_command_line(char *s, unsigned n);
+
+#endif

The platform_ops_t structure looks a bit out of place here. I'd recommend starting without it and just calling the appropriate functions directly, at least as long as there is only one version anyway.

Quoted 7 lines

Index: linux-hexagon-kernel/arch/hexagon/platform/common/Makefile
===================================================================

arch/hexagon/platform/common/Makefile new file +2 -0
@@ -0,0 +1,12 @@
+
+obj-y += platform.o irq.o

arch/hexagon/platform/common/Makefile line 12

Quoted 10 lines
arch/hexagon/platform/common/Makefile new file +10 -0
+
+obj-y += clock.o
+
+ifdef CONFIG_HEXAGON_ANGEL_TRAPS
+obj-y += angel_misc.o angel_console.o
+endif
+
+ifdef CONFIG_HEXAGON_COMET
+obj-y += sirc.o
+endif

The normal syntax for this is

obj-$(CONFIG_HEXAGON_ANGEL_TRAPS) += angel_misc.o angel_console.o
obj-$(CONFIG_HEXAGON_COMET) += sirc.o

arch/hexagon/platform/common/sirc.c line 2

Quoted 7 lines

Index: linux-hexagon-kernel/arch/hexagon/platform/common/sirc.c
===================================================================

arch/hexagon/platform/common/sirc.c new file +2 -0
@@ -0,0 +1,208 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.

Is this the same hardware as in arch/arm/mach-msm/sirc.c?
If so, better merge the drivers and put them into a common location. There was some talk of starting a drivers/irqchip/ directory for interrupt controller drivers that are not architecture specific.

Arnd

#60 lore raw

PATCH 34/36 Hexagon: Add configuration and makefiles for the Hexagon architecture.

In reply to Richard Kuo
---
 arch/hexagon/Kconfig              |  225 ++++++++++++++++++++++++++++++++++++++
 arch/hexagon/Makefile             |   58 +++++++++
 arch/hexagon/kernel/Makefile      |   19 +++
 arch/hexagon/kernel/asm-offsets.c |  104 +++++++++++++++++
 arch/hexagon/kernel/vmlinux.lds.S |   93 +++++++++++++++
 arch/hexagon/lib/Makefile         |    4 
 arch/hexagon/mm/Makefile          |    9 +
 7 files changed, 512 insertions(+)
arch/hexagon/Kconfig new file +225 -0
Index: linux-hexagon-kernel/arch/hexagon/Kconfig
===================================================================
@@ -0,0 +1,225 @@
+# Hexagon configuration
+comment "Linux Kernel Configuration for Hexagon"
+
+config HEXAGON
+	def_bool y
+	select HAVE_OPROFILE
+	# We will need this to get tickless NOHZ
+	# select USE_GENERIC_SMP_HELPERS if SMP
+	# Other pending projects/to-do items.
+	# select HAVE_REGS_AND_STACK_ACCESS_API
+	# select HAVE_HW_BREAKPOINT if PERF_EVENTS
+	# select ARCH_HAS_CPU_IDLE_WAIT
+	# select ARCH_WANT_OPTIONAL_GPIOLIB
+	# select ARCH_REQUIRE_GPIOLIB
+	# select HAVE_CLK
+	# select IRQ_PER_CPU
+	select HAVE_IRQ_WORK
+	# select GENERIC_PENDING_IRQ if SMP
+	select GENERIC_ATOMIC64
+	select HAVE_PERF_EVENTS
+	select HAVE_GENERIC_HARDIRQS
+	select GENERIC_HARDIRQS_NO__DO_IRQ
+	select GENERIC_HARDIRQS_NO_DEPRECATED
+	# GENERIC_ALLOCATOR is used by dma_alloc_coherent() in arch/hexagon/mm/consistent.c
+	select GENERIC_ALLOCATOR
+	select HAVE_ARCH_KGDB
+	---help---
+	  Qualcomm Hexagon is a processor architecture designed for high
+	  performance and low power across a wide variety of applications.
+
+config HEXAGON_ARCH_V1
+	bool
+
+config HEXAGON_ARCH_V2
+	bool
+
+config HEXAGON_ARCH_V3
+	bool
+
+config HEXAGON_ARCH_V4
+	bool
+
+config FRAME_POINTER
+	def_bool y
+
+config LOCKDEP_SUPPORT
+	def_bool y
+
+config PCI
+	def_bool n
+
+config EARLY_PRINTK
+	def_bool y
+
+config KTIME_SCALAR
+	def_bool y
+
+config MMU
+	def_bool y
+
+config TRACE_IRQFLAGS_SUPPORT
+	def_bool y
+
+#
+# Use the generic interrupt handling code in kernel/irq/:
+#
+config GENERIC_IRQ_PROBE
+	def_bool y
+
+config GENERIC_IOMAP
+	def_bool y
+
+#config ZONE_DMA
+#	bool
+#	default y
+
+config HAS_DMA
+	bool
+	select HAVE_DMA_ATTRS
+	default y
+
+config NEED_SG_DMA_LENGTH
+	def_bool y
+
+config RWSEM_GENERIC_SPINLOCK
+	def_bool n
+
+config RWSEM_XCHGADD_ALGORITHM
+	def_bool y
+
+config GENERIC_CALIBRATE_DELAY
+	def_bool y
+
+config GENERIC_FIND_NEXT_BIT
+	def_bool y
+
+config GENERIC_HWEIGHT
+	def_bool y
+
+config GENERIC_TIME
+	def_bool y
+
+config GENERIC_CLOCKEVENTS
+	def_bool y
+
+config GENERIC_CLOCKEVENTS_BROADCAST
+	def_bool y
+
+config STACKTRACE_SUPPORT
+	def_bool y
+	select STACKTRACE
+
+config GENERIC_BUG
+	def_bool y
+	depends on BUG
+
+config BUG
+	def_bool y
+
+menu "Machine selection"
+
+choice
+	prompt "System type"
+	default HEXAGON_ARCH_V2
+
+config HEXAGON_COMET
+	bool "Comet Board"
+	select HEXAGON_ARCH_V2
+	---help---
+	  Support for the Comet platform.
+
+endchoice
+
+config HEXAGON_VM
+	def_bool y
+
+config CMDLINE
+	string "Default kernel command string"
+	default ""
+	help
+	  On some platforms, there is currently no way for the boot loader
+	  to pass arguments to the kernel. For these, you should supply some
+	  command-line options at build time by entering them here.  At a
+	  minimum, you should specify the memory size and the root device
+	  (e.g., mem=64M root=/dev/nfs).
+
+config HEXAGON_ANGEL_TRAPS
+	bool "Use Angel Traps"
+	default n
+	---help---
+	  Enable angel debug traps (for printk's).
+
+config SMP
+	bool "Multi-Processing support"
+	---help---
+	  Enables SMP support in the kernel.  If unsure, say "Y"
+
+config NR_CPUS
+	int "Maximum number of CPUs" if SMP
+	range 2 6 if SMP
+	default "1" if !SMP
+	default "6" if SMP
+	---help---
+	  This allows you to specify the maximum number of CPUs which this
+	  kernel will support.  The maximum supported value is 6 and the
+	  minimum value which makes sense is 2.
+
+	  This is purely to save memory - each supported CPU adds
+	  approximately eight kilobytes to the kernel image.
+
+choice
+	prompt "Kernel page size"
+	default PAGE_SIZE_4KB
+	---help---
+	  Changes the default page size; use with caution.
+
+config PAGE_SIZE_4KB
+	bool "4KB"
+
+config PAGE_SIZE_16KB
+	bool "16KB"
+
+config PAGE_SIZE_64KB
+	bool "64KB"
+
+config PAGE_SIZE_256KB
+	bool "256KB"
+
+endchoice
+
+config HIGHMEM
+	bool "High Memory Support"
+	default n
+
+source "mm/Kconfig"
+
+source "kernel/Kconfig.hz"
+source "kernel/time/Kconfig"
+
+config GENERIC_GPIO
+	bool "Generic GPIO support"
+	default n
+
+config HEXAGON_BITOPS
+	bool "Use accelerated bitops"
+	default y
+
+endmenu
+
+source "init/Kconfig"
+source "drivers/Kconfig"
+source "fs/Kconfig"
+
+menu "Executable File Formats"
+source "fs/Kconfig.binfmt"
+endmenu
+
+source "net/Kconfig"
+source "security/Kconfig"
+source "crypto/Kconfig"
+source "lib/Kconfig"
+
+menu "Kernel hacking"
+source "lib/Kconfig.debug"
+endmenu
arch/hexagon/kernel/asm-offsets.c new file +104 -0

104 lines not on this page · raw message

arch/hexagon/kernel/vmlinux.lds.S new file +93 -0

93 lines not on this page · raw message

arch/hexagon/lib/Makefile new file +4 -0
Index: linux-hexagon-kernel/arch/hexagon/lib/Makefile
===================================================================
@@ -0,0 +1,4 @@
+#
+# Makefile for hexagon-specific library files.
+#
+obj-y = checksum.o io.o memcpy.o memset.o
arch/hexagon/Makefile new file +58 -0

58 lines not on this page · raw message

arch/hexagon/mm/Makefile new file +9 -0
Index: linux-hexagon-kernel/arch/hexagon/mm/Makefile
===================================================================
@@ -0,0 +1,9 @@
+#
+# Makefile for Hexagon memory management subsystem
+#
+
+obj-y := init.o pgalloc.o ioremap.o uaccess.o vm_fault.o cache.o
+obj-y += copy_to_user.o copy_from_user.o strnlen_user.o vm_tlb.o
+
+obj-$(CONFIG_HIGHMEM)      += kmap.o
+
arch/hexagon/kernel/Makefile new file +19 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/Makefile
===================================================================
@@ -0,0 +1,19 @@
+extra-y := head.o vmlinux.lds init_task.o
+
+obj-$(CONFIG_SMP) += smp.o topology.o
+
+obj-y += irq.o setup.o irq_cpu.o traps.o syscalltab.o signal.o time.o
+obj-y += process.o syscall.o trampoline.o reset.o ptrace.o
+obj-y += delay.o
+
+obj-$(CONFIG_KGDB)    += kgdb.o
+obj-$(CONFIG_MODULES) += module.o hexagon_ksyms.o
+
+# Modules required to work with the Hexagon Virtual Machine
+obj-y += vm_entry.o vm_events.o vm_switch.o vm_ops.o vm_init_segtable.o
+obj-y += vm_vectors.o
+
+obj-$(CONFIG_HAS_DMA) += dma.o
+
+obj-$(CONFIG_STACKTRACE) += stacktrace.o
+

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#61 lore raw

Re: [patch 34/36] Hexagon: Add configuration and makefiles for the Hexagon architecture.

arch/hexagon/Kconfig line 193

Quoted 3 lines · On Wednesday 17 August 2011 11:35:31 Richard Kuo wrote:
arch/hexagon/Kconfig new file +3 -0
+config HIGHMEM
+	bool "High Memory Support"
+	default n

Do you really want to burden yourselves with this?

Support for HIGHMEM is gradually going to get worse as we optimize the common 64-bit case in the kernel, so it may just not be worth it.

Arnd

#62 lore raw

PATCH 35/36 Hexagon: Add basic stacktrace functionality for Hexagon architecture.

In reply to Richard Kuo
---
 arch/hexagon/kernel/stacktrace.c |   66 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)
arch/hexagon/kernel/stacktrace.c new file +66 -0
Index: linux-hexagon-kernel/arch/hexagon/kernel/stacktrace.c
===================================================================
@@ -0,0 +1,66 @@
+/*
+ * Stacktrace support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#include <linux/sched.h>
+#include <linux/stacktrace.h>
+#include <linux/thread_info.h>
+#include <linux/module.h>
+
+register unsigned long current_frame_pointer asm("r30");
+
+struct stackframe {
+	unsigned long fp;
+	unsigned long rets;
+};
+
+/*
+ * Save stack-backtrace addresses into a stack_trace buffer.
+ */
+void save_stack_trace(struct stack_trace *trace)
+{
+	unsigned long low, high;
+	unsigned long fp;
+	struct stackframe *frame;
+	int skip = trace->skip;
+
+	low = (unsigned long)task_stack_page(current);
+	high = low + THREAD_SIZE;
+	fp = current_frame_pointer;
+
+	while (fp >= low && fp <= (high - sizeof(*frame))) {
+		frame = (struct stackframe *)fp;
+
+		if (skip) {
+			skip--;
+		} else {
+			trace->entries[trace->nr_entries++] = frame->rets;
+			if (trace->nr_entries >= trace->max_entries)
+				break;
+		}
+
+		/*
+		 * The next frame must be at a higher address than the
+		 * current frame.
+		 */
+		low = fp + sizeof(*frame);
+		fp = frame->fp;
+	}
+}
+EXPORT_SYMBOL_GPL(save_stack_trace);

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#63 lore raw

PATCH 36/36 Hexagon: Add self to MAINTAINERS

In reply to Richard Kuo
---
 MAINTAINERS |    6 ++++++
 1 file changed, 6 insertions(+)
MAINTAINERS +6 -0
Index: linux-hexagon-kernel/MAINTAINERS
===================================================================
@@ -5279,6 +5279,12 @@
 F:	include/linux/qnx4_fs.h
 F:	include/linux/qnxtypes.h
 
+QUALCOMM HEXAGON ARCHITECTURE
+M:	Richard Kuo <[email protected]>
+L:	[email protected]
+S:	Supported
+F:	arch/hexagon/
+
 RADOS BLOCK DEVICE (RBD)
 F:	include/linux/qnxtypes.h
 M:	Yehuda Sadeh <[email protected]>

Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

#64 lore raw
In reply to Richard Kuo
Quoted 7 lines · Richard Kuo

The following patch set is intended to add support for the Qualcomm Hexagon architecture to the Linux kernel.

The Hexagon architecture is designed to deliver performance with low power over a variety of applications. It has features such as multithreading, privilege levels, VLIW, and instructions geared toward efficient signal processing. The port of Linux for Hexagon runs under a hypervisor layer.

I am curious about the hypervisor layer.

I can guess that it's an attempt to abstract away low level hardware changes, a sort of software version of CPU microcode.

Or maybe it's a Transmeta kind of thing with dynamic recompilation into a quickly evolving VLIW instruction set.

But what's the real reason?

Signature · 4 lines
Knowledge Is Power
Power Corrupts
Study Hard
Be Evil
#65 lore raw
Quoted 9 lines · Zan Lynx

I am curious about the hypervisor layer.

I can guess that it's an attempt to abstract away low level hardware changes, a sort of software version of CPU microcode.

Or maybe it's a Transmeta kind of thing with dynamic recompilation into a quickly evolving VLIW instruction set.

But what's the real reason?

There are definitely opportunities for bonus features with hypervisors, but the real reason is just to allow multiple guests to run concurrently on a machine.

Thanks,
Richard Kuo

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#66 lore raw
In reply to Richard Kuo
Quoted 8 lines · On Wednesday 17 August 2011 11:34:57 Richard Kuo wrote:

The following patch set is intended to add support for the Qualcomm Hexagon architecture to the Linux kernel.

The Hexagon architecture is designed to deliver performance with low power over a variety of applications. It has features such as multithreading, privilege levels, VLIW, and instructions geared toward efficient signal processing. The port of Linux for Hexagon runs under a hypervisor layer.

Quoted 4 lines

I realize we are not currently in a merge window, but I felt it would be best to go ahead and send it out so that the community gets an ample chance to review it. This is a very large patch set, but we've tried to break it up into functional pieces to make review easier.

Hi Richard and Linas,

It's good to finally see the source for this, and I have a good feeling about the quality of the code, so it should not be a problem to resolve the remaining issues in time to get it into the next merge window.

I have gone over all patches once now and commented about everything that looked odd or wrong. Most of the issues are really just small changes. Removing support for the legacy syscalls is an easy change in the kernel but it might require significant changes in the libc implementation. It's not a big problem if your libc still requires the old interfaces at the time the architecture gets merged upstream, that will just mean that you have to have a small kernel patch to add them back in while transitioning to the new libc.

As I commented on patch 33, I think the platform specific patches should not get merged before everything is converted to device tree based probing. This should also not keep the rest from going in. I think it would be good to do the conversion together with the ARM-MSM platform that seems to share a lot of the device specific code, and it would be bad to end up with duplicate work here or (worse) with incompatible DT bindings.

Arnd

#67 lore raw
Quoted 4 lines

It's good to finally see the source for this, and I have a good feeling about the quality of the code, so it should not be a problem to resolve the remaining issues in time to get it into the next merge window.

Quoted 8 lines

I have gone over all patches once now and commented about everything that looked odd or wrong. Most of the issues are really just small changes. Removing support for the legacy syscalls is an easy change in the kernel but it might require significant changes in the libc implementation. It's not a big problem if your libc still requires the old interfaces at the time the architecture gets merged upstream, that will just mean that you have to have a small kernel patch to add them back in while transitioning to the new libc.

Thanks for reviewing the patches! I've started working on some of the feedback and will be answering other questions as I get to them.

Quoted 7 lines

As I commented on patch 33, I think the platform specific patches should not get merged before everything is converted to device tree based probing. This should also not keep the rest from going in. I think it would be good to do the conversion together with the ARM-MSM platform that seems to share a lot of the device specific code, and it would be bad to end up with duplicate work here or (worse) with incompatible DT bindings.

OK, sounds fair. I have been working on devtree code on the side, but for this first submission, it sounds like I'll just gut the platform code out.

Thanks,
Richard Kuo

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#68 lore raw
In reply to Richard Kuo
Quoted 8 lines · Richard Kuo

The following patch set is intended to add support for the Qualcomm Hexagon architecture to the Linux kernel.

The Hexagon architecture is designed to deliver performance with low power over a variety of applications. It has features such as multithreading, privilege levels, VLIW, and instructions geared toward efficient signal processing. The port of Linux for Hexagon runs under a hypervisor layer.

Have you considered porting kvm to hexagon, so Linux can be used as the hypervisor as well?

Signature · 2 lines
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.