Initial support for Picochip picoxcell
Subsystems (3)
v2 cover Initial support for Picochip picoxcell
This series adds support for Picochip picoXcell (PC3X2 and PC3X3) ARM1176JZ-S based devices. This is a device tree only platform and currently supports interrupt controllers and UARTs.
This series is based off of Grant's devicetree/test branch and also uses Russell's io and gpio cleanup patches to remove the definition of IO_SPACE_LIMIT and trivial gpio definitions.
Changes since v1:
- Cleanup empty headers
- Use of_platform_populate() and the default match table
- Split the VIC's into separate device nodes
Jamie Iles (3):
picoxcell: support for Picochip picoxcell devices
picoxcell: add the DTS for pc3x2 and pc3x3 devices
picoxcell: add the DTS for the PC7302 board
.../devicetree/bindings/arm/picoxcell.txt | 23 ++ arch/arm/Kconfig | 18 + arch/arm/Makefile | 1 + arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 249 +++++++++++++ arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 365 ++++++++++++++++++++ arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts | 87 +++++ arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts | 93 +++++ arch/arm/mach-picoxcell/Makefile | 3 + arch/arm/mach-picoxcell/Makefile.boot | 1 + arch/arm/mach-picoxcell/common.c | 55 +++ arch/arm/mach-picoxcell/common.h | 18 + arch/arm/mach-picoxcell/include/mach/debug-macro.S | 35 ++ arch/arm/mach-picoxcell/include/mach/entry-macro.S | 19 + arch/arm/mach-picoxcell/include/mach/gpio.h | 1 + arch/arm/mach-picoxcell/include/mach/hardware.h | 21 ++ arch/arm/mach-picoxcell/include/mach/io.h | 29 ++ arch/arm/mach-picoxcell/include/mach/irqs.h | 25 ++ arch/arm/mach-picoxcell/include/mach/map.h | 25 ++ arch/arm/mach-picoxcell/include/mach/memory.h | 1 + .../mach-picoxcell/include/mach/picoxcell_soc.h | 25 ++ arch/arm/mach-picoxcell/include/mach/system.h | 31 ++ arch/arm/mach-picoxcell/include/mach/timex.h | 25 ++ arch/arm/mach-picoxcell/include/mach/uncompress.h | 21 ++ arch/arm/mach-picoxcell/include/mach/vmalloc.h | 18 + arch/arm/mach-picoxcell/io.c | 56 +++ arch/arm/mach-picoxcell/time.c | 132 +++++++ 26 files changed, 1377 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/picoxcell.txt create mode 100644 arch/arm/boot/dts/picoxcell-pc3x2.dtsi create mode 100644 arch/arm/boot/dts/picoxcell-pc3x3.dtsi create mode 100644 arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts create mode 100644 arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts create mode 100644 arch/arm/mach-picoxcell/Makefile create mode 100644 arch/arm/mach-picoxcell/Makefile.boot create mode 100644 arch/arm/mach-picoxcell/common.c create mode 100644 arch/arm/mach-picoxcell/common.h create mode 100644 arch/arm/mach-picoxcell/include/mach/debug-macro.S create mode 100644 arch/arm/mach-picoxcell/include/mach/entry-macro.S create mode 100644 arch/arm/mach-picoxcell/include/mach/gpio.h create mode 100644 arch/arm/mach-picoxcell/include/mach/hardware.h create mode 100644 arch/arm/mach-picoxcell/include/mach/io.h create mode 100644 arch/arm/mach-picoxcell/include/mach/irqs.h create mode 100644 arch/arm/mach-picoxcell/include/mach/map.h create mode 100644 arch/arm/mach-picoxcell/include/mach/memory.h create mode 100644 arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h create mode 100644 arch/arm/mach-picoxcell/include/mach/system.h create mode 100644 arch/arm/mach-picoxcell/include/mach/timex.h create mode 100644 arch/arm/mach-picoxcell/include/mach/uncompress.h create mode 100644 arch/arm/mach-picoxcell/include/mach/vmalloc.h create mode 100644 arch/arm/mach-picoxcell/io.c create mode 100644 arch/arm/mach-picoxcell/time.c
Signature · 1 line
1.7.4.1
PATCH v2 1/3 picoxcell: support for Picochip picoxcell devices
picoXcell is a family of femtocell devices with an ARM application processor and picoArray DSP processor array.
This patch adds support for picoXcell boards to be booted using the device tree registering the VIC's, UART's and timers.
v2: - cleanup empty mach headers
- convert to of_platform_populate()
- simplify uncompress.h
- split vic node into 2 devices
- add missing __initconst attributes
--- .../devicetree/bindings/arm/picoxcell.txt | 23 ++++ arch/arm/Kconfig | 18 +++ arch/arm/Makefile | 1 + arch/arm/mach-picoxcell/Makefile | 3 + arch/arm/mach-picoxcell/Makefile.boot | 1 + arch/arm/mach-picoxcell/common.c | 55 ++++++++ arch/arm/mach-picoxcell/common.h | 18 +++ arch/arm/mach-picoxcell/include/mach/debug-macro.S | 35 +++++ arch/arm/mach-picoxcell/include/mach/entry-macro.S | 19 +++ arch/arm/mach-picoxcell/include/mach/gpio.h | 1 + arch/arm/mach-picoxcell/include/mach/hardware.h | 21 +++ arch/arm/mach-picoxcell/include/mach/io.h | 29 +++++ arch/arm/mach-picoxcell/include/mach/irqs.h | 25 ++++ arch/arm/mach-picoxcell/include/mach/map.h | 25 ++++ arch/arm/mach-picoxcell/include/mach/memory.h | 1 + .../mach-picoxcell/include/mach/picoxcell_soc.h | 25 ++++ arch/arm/mach-picoxcell/include/mach/system.h | 31 +++++ arch/arm/mach-picoxcell/include/mach/timex.h | 25 ++++ arch/arm/mach-picoxcell/include/mach/uncompress.h | 21 +++ arch/arm/mach-picoxcell/include/mach/vmalloc.h | 18 +++ arch/arm/mach-picoxcell/io.c | 56 ++++++++ arch/arm/mach-picoxcell/time.c | 132 ++++++++++++++++++++ 22 files changed, 583 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/picoxcell.txt create mode 100644 arch/arm/mach-picoxcell/Makefile create mode 100644 arch/arm/mach-picoxcell/Makefile.boot create mode 100644 arch/arm/mach-picoxcell/common.c create mode 100644 arch/arm/mach-picoxcell/common.h create mode 100644 arch/arm/mach-picoxcell/include/mach/debug-macro.S create mode 100644 arch/arm/mach-picoxcell/include/mach/entry-macro.S create mode 100644 arch/arm/mach-picoxcell/include/mach/gpio.h create mode 100644 arch/arm/mach-picoxcell/include/mach/hardware.h create mode 100644 arch/arm/mach-picoxcell/include/mach/io.h create mode 100644 arch/arm/mach-picoxcell/include/mach/irqs.h create mode 100644 arch/arm/mach-picoxcell/include/mach/map.h create mode 100644 arch/arm/mach-picoxcell/include/mach/memory.h create mode 100644 arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h create mode 100644 arch/arm/mach-picoxcell/include/mach/system.h create mode 100644 arch/arm/mach-picoxcell/include/mach/timex.h create mode 100644 arch/arm/mach-picoxcell/include/mach/uncompress.h create mode 100644 arch/arm/mach-picoxcell/include/mach/vmalloc.h create mode 100644 arch/arm/mach-picoxcell/io.c create mode 100644 arch/arm/mach-picoxcell/time.c
Documentation/devicetree/bindings/arm/picoxcell.txt new file +23 -0
@@ -0,0 +1,23 @@ +Picochip picoXcell device tree bindings. +======================================== + +Required root node properties: + - compatible: + - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. + - "picochip,pc3x3" : picoXcell PC3X3 device based board. + - "picochip,pc3x2" : picoXcell PC3X2 device based board. + +Timers required properties: + - compatible = "picochip,pc3x2-timer" + - interrupts : The single IRQ line for the timer. + - clock-freq : The frequency in HZ of the timer. + - reg : The register bank for the timer. + +Note: two timers are required - one for the scheduler clock and one for the +event tick/NOHZ. + +VIC required properties: + - compatible = "arm,pl192-vic". + - interrupt-controller. + - reg : The register bank for the device. + - #interrupt-cells : Must be 1.
arch/arm/Kconfig +18 -0
@@ -608,6 +608,24 @@ config ARCH_TEGRA This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). +config ARCH_PICOXCELL + bool "Picochip picoXcell" + select ARCH_REQUIRE_GPIOLIB + select ARM_PATCH_PHYS_VIRT + select ARM_VIC + select CPU_V6K + select DW_APB_TIMER + select GENERIC_CLOCKEVENTS + select GENERIC_GPIO + select HAVE_SCHED_CLOCK + select HAVE_TCM + select NO_IOPORT + select USE_OF + help + This enables support for systems based on the Picochip picoXcell + family of Femtocell devices. The picoxcell support requires device tree + for all boards. + config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" select CPU_ARM926T
arch/arm/Makefile +1 -0
@@ -167,6 +167,7 @@ machine-$(CONFIG_ARCH_OMAP2) := omap2 machine-$(CONFIG_ARCH_OMAP3) := omap2 machine-$(CONFIG_ARCH_OMAP4) := omap2 machine-$(CONFIG_ARCH_ORION5X) := orion5x +machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell machine-$(CONFIG_ARCH_PNX4008) := pnx4008 machine-$(CONFIG_ARCH_PRIMA2) := prima2 machine-$(CONFIG_ARCH_PXA) := pxa
arch/arm/mach-picoxcell/Makefile new file +3 -0
@@ -0,0 +1,3 @@ +obj-y := common.o +obj-y += time.o +obj-y += io.o
arch/arm/mach-picoxcell/Makefile.boot new file +1 -0
@@ -0,0 +1 @@ +zreladdr-y := 0x00008000
arch/arm/mach-picoxcell/common.c new file +55 -0
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arch/arm/mach-picoxcell/common.h new file +18 -0
@@ -0,0 +1,18 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +* All enquiries to support at picochip.com +*/ +#ifndef __PICOXCELL_COMMON_H__ +#define __PICOXCELL_COMMON_H__ + +#include <asm/mach/time.h> + +extern struct sys_timer picoxcell_timer; +extern void picoxcell_map_io (void ); + +#endif /* __PICOXCELL_COMMON_H__ */
arch/arm/mach-picoxcell/include/mach/debug-macro.S new file +35 -0
@@ -0,0 +1,35 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ +#include <linux/serial_reg.h> +#include <mach/hardware.h> +#include <mach/map.h> + +#define UART_SHIFT 2 + + .macro addruart, rp, rv + ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) + ldr \rp, =PICOXCELL_UART1_BASE + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm
arch/arm/mach-picoxcell/include/mach/entry-macro.S new file +19 -0
@@ -0,0 +1,19 @@ +/* + * entry-macro.S + * + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * Low-level IRQ helper macros for picoXcell platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> +#include <mach/irqs.h> +#include <mach/map.h> + +#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) +#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) + +#include <asm/entry-macro-vic2.S>
arch/arm/mach-picoxcell/include/mach/gpio.h new file +1 -0
@@ -0,0 +1 @@ +/* empty */
arch/arm/mach-picoxcell/include/mach/hardware.h new file +21 -0
@@ -0,0 +1,21 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This file contains the hardware definitions of the picoXcell SoC devices. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <mach/picoxcell_soc.h> + +#endif
arch/arm/mach-picoxcell/include/mach/io.h new file +29 -0
@@ -0,0 +1,29 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No ioports, but needed for driver compatibility. */ +#define __io (a) __typesafe_io(a) +/* No PCI possible on picoxcell. */ +#define __mem_pci (a) (a) + +#define __arch_ioremap picoxcell_ioremap +#define __arch_iounmap picoxcell_iounmap + +extern void __iomem *picoxcell_ioremap (unsigned long phys,size_t size, +unsigned int type); +extern void picoxcell_iounmap (volatile void __iomem *addr); + +#endif /* __ASM_ARM_ARCH_IO_H */
arch/arm/mach-picoxcell/include/mach/irqs.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This file contains the hardware definitions of the picoXcell SoC devices. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __MACH_IRQS_H +#define __MACH_IRQS_H + +#define ARCH_NR_IRQS 64 +#define NR_IRQS (128 + ARCH_NR_IRQS) + +#define IRQ_VIC0_BASE 0 +#define IRQ_VIC1_BASE 32 + +#endif /* __MACH_IRQS_H */
arch/arm/mach-picoxcell/include/mach/map.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __PICOXCELL_MAP_H__ +#define __PICOXCELL_MAP_H__ + +#define PHYS_TO_IO (x) (((x) & 0x00ffffff) | 0xfe000000) + +#ifdef __ASSEMBLY__ +#define IO_ADDRESS (x) PHYS_TO_IO((x)) +#else +#define IO_ADDRESS (x) (void __iomem __force *)(PHYS_TO_IO((x))) +#endif + +#endif /* __PICOXCELL_MAP_H__ */
arch/arm/mach-picoxcell/include/mach/memory.h new file +1 -0
@@ -0,0 +1 @@ +/* empty */
arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This file contains the hardware definitions of the picoXcell SoC devices. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __PICOXCELL_SOC_H__ +#define __PICOXCELL_SOC_H__ + +#define PICOXCELL_UART1_BASE 0x80230000 +#define PICOXCELL_PERIPH_BASE 0x80000000 +#define PICOXCELL_PERIPH_LENGTH SZ_4M +#define PICOXCELL_VIC0_BASE 0x80060000 +#define PICOXCELL_VIC1_BASE 0x80064000 + +#endif /* __PICOXCELL_SOC_H__ */
arch/arm/mach-picoxcell/include/mach/system.h new file +31 -0
@@ -0,0 +1,31 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle (void ) +{ +/* +* This should do all the clock switching and wait for interrupt +* tricks. +*/ +cpu_do_idle (); +} + +static inline void arch_reset (int mode,const char *cmd) +{ +/* Watchdog reset to go here. */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */
arch/arm/mach-picoxcell/include/mach/timex.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ +#ifndef __TIMEX_H__ +#define __TIMEX_H__ + +/* Bogus value to allow the kernel to compile. */ +#define CLOCK_TICK_RATE 1000000 + +#endif /* __TIMEX_H__ */ +
arch/arm/mach-picoxcell/include/mach/uncompress.h new file +21 -0
@@ -0,0 +1,21 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ +#define putc (c) +#define flush () +#define arch_decomp_setup () +#define arch_decomp_wdog ()
arch/arm/mach-picoxcell/include/mach/vmalloc.h new file +18 -0
@@ -0,0 +1,18 @@ +/* +* Copyright (c) 2011 Picochip Ltd., Jamie Iles +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ +#define VMALLOC_END 0xFE000000UL
arch/arm/mach-picoxcell/io.c new file +56 -0
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arch/arm/mach-picoxcell/time.c new file +132 -0
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Signature · 1 line
1.7.4.1
PATCH v2 2/3 picoxcell: add the DTS for pc3x2 and pc3x3 devices
In reply to Jamie IlesThis describes the basic hierarchy of picoxcell pc3x3 devices including clocks and bus interconnect. Some onchip devices are currently omitted as there haven't been bindings created for them.
v2: - change timer compatible strings to be more soc specific
- split vic node into 2 devices
--- arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 249 ++++++++++++++++++++++ arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 365 ++++++++++++++++++++++++++++++++ 2 files changed, 614 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/picoxcell-pc3x2.dtsi create mode 100644 arch/arm/boot/dts/picoxcell-pc3x3.dtsi
arch/arm/boot/dts/picoxcell-pc3x2.dtsi new file +249 -0
@@ -0,0 +1,249 @@ +/* + * Copyright (C) 2011 Picochip, Jamie Iles + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/include/ "skeleton.dtsi" +/ { + model = "Picochip picoXcell PC3X2"; + compatible = "picochip,pc3x2"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu at 0 { + compatible = "arm,1176jz-s"; + clock-frequency = <400000000>; + reg = <0>; + d-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-line-size = <32>; + i-cache-size = <32768>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pclk: clock at 0 { + compatible = "fixed-clock"; + clock-outputs = "bus", "pclk"; + clock-frequency = <200000000>; + ref-clock = <&ref_clk>, "ref"; + }; + }; + + paxi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x80000000 0x400000>; + + emac: gem at 30000 { + compatible = "cadence,gem"; + reg = <0x30000 0x10000>; + interrupts = <31>; + }; + + dmac1: dmac at 40000 { + compatible = "snps,dw-dmac"; + reg = <0x40000 0x10000>; + interrupts = <25>; + }; + + dmac2: dmac at 50000 { + compatible = "snps,dw-dmac"; + reg = <0x50000 0x10000>; + interrupts = <26>; + }; + + vic0: interrupt-controller at 60000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0x60000 0x1000>; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller at 64000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0x64000 0x1000>; + #interrupt-cells = <1>; + }; + + fuse: picoxcell-fuse at 80000 { + compatible = "picoxcell,fuse-pc3x2"; + reg = <0x80000 0x10000>; + }; + + ssi: picoxcell-spi at 90000 { + compatible = "picoxcell,spi"; + reg = <0x90000 0x10000>; + interrupt-parent = <&vic0>; + interrupts = <10>; + }; + + ipsec: spacc at 100000 { + compatible = "picochip,spacc-ipsec"; + reg = <0x100000 0x10000>; + interrupt-parent = <&vic0>; + interrupts = <24>; + ref-clock = <&pclk>, "ref"; + }; + + srtp: spacc at 140000 { + compatible = "picochip,spacc-srtp"; + reg = <0x140000 0x10000>; + interrupt-parent = <&vic0>; + interrupts = <23>; + }; + + l2_engine: spacc at 180000 { + compatible = "picochip,spacc-l2"; + reg = <0x180000 0x10000>; + interrupt-parent = <&vic0>; + interrupts = <22>; + ref-clock = <&pclk>, "ref"; + }; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x200000 0x80000>; + + rtc0: rtc at 00000 { + compatible = "picochip,pc3x2-rtc"; + clock-freq = <200000000>; + reg = <0x00000 0xf>; + interrupt-parent = <&vic1>; + interrupts = <8>; + }; + + timer0: timer at 10000 { + compatible = "picochip,pc3x2-timer"; + interrupt-parent = <&vic0>; + interrupts = <4>; + clock-freq = <200000000>; + reg = <0x10000 0x14>; + }; + + timer1: timer at 10014 { + compatible = "picochip,pc3x2-timer"; + interrupt-parent = <&vic0>; + interrupts = <5>; + clock-freq = <200000000>; + reg = <0x10014 0x14>; + }; + + timer2: timer at 10028 { + compatible = "picochip,pc3x2-timer"; + interrupt-parent = <&vic0>; + interrupts = <6>; + clock-freq = <200000000>; + reg = <0x10028 0x14>; + }; + + timer3: timer at 1003c { + compatible = "picochip,pc3x2-timer"; + interrupt-parent = <&vic0>; + interrupts = <7>; + clock-freq = <200000000>; + reg = <0x1003c 0x14>; + }; + + gpio: gpio at 20000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x20000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-io-width = <4>; + + banka: gpio-controller at 0 { + compatible = "snps,dw-apb-gpio-bank"; + gpio-controller; + #gpio-cells = <2>; + gpio-generic,nr-gpio = <8>; + + regoffset-dat = <0x50>; + regoffset-set = <0x00>; + regoffset-dirout = <0x04>; + }; + + bankb: gpio-controller at 1 { + compatible = "snps,dw-apb-gpio-bank"; + gpio-controller; + #gpio-cells = <2>; + gpio-generic,nr-gpio = <8>; + + regoffset-dat = <0x54>; + regoffset-set = <0x0c>; + regoffset-dirout = <0x10>; + }; + }; + + uart0: uart at 30000 { + compatible = "ns8250dw"; + reg = <0x30000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <10>; + clock-frequency = <3686400>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + uart1: uart at 40000 { + compatible = "ns8250dw"; + reg = <0x40000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <9>; + clock-frequency = <3686400>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + wdog: watchdog at 50000 { + compatible = "snps,dw-apb-wdg"; + reg = <0x50000 0x10000>; + interrupt-parent = <&vic0>; + interrupts = <11>; + bus-clock = <&pclk>, "bus"; + }; + }; + }; + + rwid-axi { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + ebi at 50000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x40000000 0x08000000 + 1 0 0x48000000 0x08000000 + 2 0 0x50000000 0x08000000 + 3 0 0x58000000 0x08000000>; + }; + + axi2pico at c0000000 { + compatible = "picochip,axi2pico-pc3x2"; + reg = <0xc0000000 0x10000>; + interrupts = <13 14 15 16 17 18 19 20 21>; + }; + }; +};
arch/arm/boot/dts/picoxcell-pc3x3.dtsi new file +365 -0
365 lines not on this page · raw message
Signature · 1 line
1.7.4.1
PATCH v2 2/3 picoxcell: add the DTS for pc3x2 and pc3x3 devices
Hi Jamies,
Quoted 82 lines
+ ? ? ? clocks {
+ ? ? ? ? ? ? ? #address-cells = <1>;
+ ? ? ? ? ? ? ? #size-cells = <1>;
+ ? ? ? ? ? ? ? ranges;(quoted diff) +78
-0+ + ? ? ? ? ? ? ? clkgate: clkgate at 800a0048 { + ? ? ? ? ? ? ? ? ? ? ? #address-cells = <1>; + ? ? ? ? ? ? ? ? ? ? ? #size-cells = <0>; + ? ? ? ? ? ? ? ? ? ? ? reg = <0x800a0048 4>; + ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-clk-gate"; + + ? ? ? ? ? ? ? ? ? ? ? tzprot_clk: clock at 0 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <0>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? spi_clk: clock at 1 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <1>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? dmac0_clk: clock at 2 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <2>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? dmac1_clk: clock at 3 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <3>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ebi_clk: clock at 4 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <4>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ipsec_clk: clock at 5 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <5>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? l2_clk: clock at 6 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <6>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? trng_clk: clock at 7 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <7>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? fuse_clk: clock at 8 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <8>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? };
Review
Quoted 10 lines
(quoted diff) +10
-0+ + ? ? ? ? ? ? ? ? ? ? ? otp_clk: clock at 9 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "picochip,pc3x3-gated-clk"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-disable-bit = <9>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <200000000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ref-clock = <&ref_clk>, "ref"; + ? ? ? ? ? ? ? ? ? ? ? }; + ? ? ? ? ? ? ? }; +
did i miss anything? i didn't find who is the ref_clk. ref_clk should be the source of the clock who reference it. For example:
/* external oscillator */
osc: oscillator {
compatible = "fixed-clock";
frequency = <32678>;
clock-outputs = "osc";};
/* phase-locked-loop device, generates a higher frequency clock
* from the external oscillator reference */
pll: pll {
compatible = "some-pll-interface"
ref-clock = <&osc>, "osc";
reg = <0x4c000 0x1000>;
clock-outputs = "pll", "pll-switched";
};osc is the source of pll. Then it is the ref-clock of pll.
Thanks
Barry
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
In reply to Jamie IlesThe PC7302 board can be populated with either a PC3X2 or PC3X3 device. Add DTS files for both variants of the PC7302.
--- arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts | 87 ++++++++++++++++++++++++ arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts | 93 ++++++++++++++++++++++++++ 2 files changed, 180 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts create mode 100644 arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts new file +87 -0
@@ -0,0 +1,87 @@ +/* + * Copyright (C) 2011 Picochip, Jamie Iles + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/include/ "picoxcell-pc3x2.dtsi" +/ { + model = "Picochip PC7302 (PC3X2)"; + compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2"; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + linux,stdout-path = &uart0; + }; + + clocks { + ref_clk: clock at 1 { + compatible = "fixed-clock"; + clock-outputs = "ref"; + clock-frequency = <20000000>; + }; + }; + + rwid-axi { + ebi at 50000000 { + nand: gpio-nand at 2,0 { + compatible = "gpio-control-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <2 0x0000 0x1000>; + bus-clock = <&pclk>, "bus"; + gpio-control-nand,io-sync-reg = + <0x00000000 0x80220000>; + + gpios = <&banka 1 0 /* rdy */ + &banka 2 0 /* nce */ + &banka 3 0 /* ale */ + &banka 4 0 /* cle */ + 0 /* nwp */>; + + boot at 100000 { + label = "Boot"; + reg = <0x100000 0x80000>; + }; + + redundant-boot at 200000 { + label = "Redundant Boot"; + reg = <0x200000 0x80000>; + }; + + boot-env at 300000 { + label = "Boot Evironment"; + reg = <0x300000 0x20000>; + }; + + redundant-boot-env at 320000 { + label = "Redundant Boot Environment"; + reg = <0x300000 0x20000>; + }; + + kernel at 380000 { + label = "Kernel"; + reg = <0x380000 0x800000>; + }; + + fs at b80000 { + label = "File System"; + reg = <0xb80000 0xf480000>; + }; + }; + }; + }; +};
arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts new file +93 -0
93 lines not on this page · raw message
Signature · 1 line
1.7.4.1
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
2011/8/24 Jamie Iles <[email protected]>:
Quoted 135 lines
The PC7302 board can be populated with either a PC3X2 or PC3X3 device. Add DTS files for both variants of the PC7302.
Signed-off-by Jamie Iles <[email protected]>---
?arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts | ? 87 ++++++++++++++++++++++++ ?arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts | ? 93 ++++++++++++++++++++++++++ ?2 files changed, 180 insertions(+), 0 deletions(-)
?create mode 100644arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts?create mode 100644arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dtsarch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts new file +87
-0@@ -0,0 +1,87 @@ +/* + * ?Copyright (C) 2011 Picochip, Jamie Iles + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/include/ "picoxcell-pc3x2.dtsi" +/ { + ? ? ? model = "Picochip PC7302 (PC3X2)"; + ? ? ? compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2"; + + ? ? ? memory { + ? ? ? ? ? ? ? device_type = "memory"; + ? ? ? ? ? ? ? reg = <0x0 0x08000000>; + ? ? ? }; + + ? ? ? chosen { + ? ? ? ? ? ? ? bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + ? ? ? ? ? ? ? linux,stdout-path = &uart0; + ? ? ? }; + + ? ? ? clocks { + ? ? ? ? ? ? ? ref_clk: clock at 1 { + ? ? ? ? ? ? ? ? ? ? ? compatible = "fixed-clock"; + ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "ref"; + ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <20000000>; + ? ? ? ? ? ? ? }; + ? ? ? }; + + ? ? ? rwid-axi { + ? ? ? ? ? ? ? ebi at 50000000 { + ? ? ? ? ? ? ? ? ? ? ? nand: gpio-nand at 2,0 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? compatible = "gpio-control-nand"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? #address-cells = <1>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? #size-cells = <1>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <2 0x0000 0x1000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bus-clock = <&pclk>, "bus"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? gpio-control-nand,io-sync-reg = + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? <0x00000000 0x80220000>; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? gpios = <&banka 1 0 ? ? /* rdy */ + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?&banka 2 0 ? ? /* nce */ + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?&banka 3 0 ? ? /* ale */ + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?&banka 4 0 ? ? /* cle */ + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?0 ? ? ? ? ? ? ?/* nwp */>; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? boot at 100000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "Boot"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0x100000 0x80000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? redundant-boot at 200000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "Redundant Boot"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0x200000 0x80000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? boot-env at 300000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "Boot Evironment"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0x300000 0x20000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? redundant-boot-env at 320000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "Redundant Boot Environment"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0x300000 0x20000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? kernel at 380000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "Kernel"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0x380000 0x800000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? fs at b80000 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? label = "File System"; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg = <0xb80000 0xf480000>; + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? }; + ? ? ? ? ? ? ? ? ? ? ? }; + ? ? ? ? ? ? ? }; + ? ? ? }; +};arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts new file +25
-0@@ -0,0 +1,93 @@ +/* + * ?Copyright (C) 2011 Picochip, Jamie Iles + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/include/ "picoxcell-pc3x3.dtsi" +/ { + ? ? ? model = "Picochip PC7302 (PC3X3)"; + ? ? ? compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3"; + + ? ? ? memory { + ? ? ? ? ? ? ? device_type = "memory"; + ? ? ? ? ? ? ? reg = <0x0 0x08000000>; + ? ? ? }; + + ? ? ? chosen {
arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts line 35
Quoted 10 lines
arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts new file +10
-0+ ? ? ? ? ? ? ? bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + ? ? ? ? ? ? ? linux,stdout-path = &uart0; + ? ? ? }; + + ? ? ? clocks { + ? ? ? ? ? ? ? ref_clk: clock at 10 { + ? ? ? ? ? ? ? ? ? ? ? compatible = "fixed-clock"; + ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "ref"; + ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <20000000>; + ? ? ? ? ? ? ? };
ok. find it. is its name just "ref_clk"? could it be a pll/osc or some meaningful name?
arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts line 43
Quoted 8 lines
arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts new file +8
-0+ + ? ? ? ? ? ? ? clkgate: clkgate at 800a0048 { + ? ? ? ? ? ? ? ? ? ? ? clock at 4 { + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? picochip,clk-no-disable; + ? ? ? ? ? ? ? ? ? ? ? }; + ? ? ? ? ? ? ? }; + ? ? ? }; +
Thanks
barry
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
Quoted 1 line · Barry Song
2011/8/24 Jamie Iles <[email protected]>:
[...]
Quoted 9 lines
Quoted 6 lines
+ ? ? ? clocks {
+ ? ? ? ? ? ? ?ref_clk: clock at 10 {
+ ? ? ? ? ? ? ? ? ? ? ? compatible = "fixed-clock";
+ ? ? ? ? ? ? ? ? ? ? ? clock-outputs = "ref";
+ ? ? ? ? ? ? ? ? ? ? ? clock-frequency = <20000000>;
+ ? ? ? ? ? ? ? };ok. find it. is its name just "
ref_clk"? could it be a pll/osc or some meaningful name?
Well it's the board reference clock. Typically this is a crystal, but can also be an accurate, external reference or a VCTCXO so it didn't feel right to encode that into the name for the SoC DTSI. I guess it could be called board_clk if that makes things easier though.
Jamie
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
In reply to Jamie Ilesarch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts line 28
Quoted 4 lines · Jamie Iles
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts new file +4
-0+ chosen { + bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + linux,stdout-path = &uart0; + };
Hrm... we don't normally put the bootargs in the device-tree.
Either you have a way to pass it from a previous firmware (which can then slap it into the device-tree at runtime), or you can have a way to compile it in the kernel image but the device-tree isn't the right place for it.
Cheers,
Ben.
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
Quoted 9 lines · Benjamin Herrenschmidt
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts line 28
Quoted 4 lines · Jamie Iles
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts new file +4
-0+ chosen { + bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + linux,stdout-path = &uart0; + };Hrm... we don't normally put the bootargs in the device-tree.
Quoted 4 lines
Either you have a way to pass it from a previous firmware (which can then slap it into the device-tree at runtime), or you can have a way to compile it in the kernel image but the device-tree isn't the right place for it.
OK, that's fair enough. A few other ARM platforms (tegra, prima2 and zynq) have bootargs in the chosen node and that's where I got it from, but our bootloader has fdt support so this can easily be removed.
Thanks,
Jamie
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
2011/9/15 Jamie Iles <[email protected]>:
Quoted 10 lines · Benjamin Herrenschmidt
Quoted 9 lines · Jamie Iles
Quoted 5 lines
+ ? chosen {
+ ? ? ? ? ? bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048";
+ ? ? ? ? ? linux,stdout-path = &uart0;
+ ? };Hrm... we don't normally put the bootargs in the device-tree.
Quoted 8 lines
Quoted 4 lines
Either you have a way to pass it from a previous firmware (which can then slap it into the device-tree at runtime), or you can have a way to compile it in the kernel image but the device-tree isn't the right place for it.
OK, that's fair enough. ?A few other ARM platforms (tegra, prima2 and zynq) have bootargs in the chosen node and that's where I got it from, but our bootloader has fdt support so this can easily be removed.
some powerpc platforms also do that:
asp834x-redboot.dts: bootargs = "console=ttyS0,38400
root=/dev/mtdblock3 rootfstype=jffs2";gamecube.dts: bootargs = "root=/dev/gcnsda2 rootwait udbg-immortal";prpmc2800.dts: bootargs = "ip=on";rainier.dts: bootargs = "console=ttyS0,115200";sequoia.dts: bootargs = "console=ttyS0,115200";virtex440-ml507.dts: bootargs = "console=ttyS0 root=/dev/ram";virtex440-ml510.dts: bootargs = "console=ttyS0 root=/dev/ram";wii.dts: bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
if we have no bootargs in bootloader, kernel will use that one in DT.
Quoted 4 lines
Thanks,
Jamie
-barry
PATCH v2 3/3 picoxcell: add the DTS for the PC7302 board
Quoted 16 lines · Barry Song
2011/9/15 Jamie Iles <[email protected]>:
Quoted 15 lines · Benjamin Herrenschmidt
Quoted 13 lines · Jamie Iles
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts line 28
Quoted 5 lines
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts new file +4
-0+ chosen { + bootargs = "console=ttyS0,115200 earlyprintk loglevel=9 root=ubi0:rootfs rw rootfstype=ubifs ubi.mtd=5,2048"; + linux,stdout-path = &uart0; + };Hrm... we don't normally put the bootargs in the device-tree.
Either you have a way to pass it from a previous firmware (which can then slap it into the device-tree at runtime), or you can have a way to compile it in the kernel image but the device-tree isn't the right place for it.
Quoted 5 lines
Quoted 3 lines
OK, that's fair enough. A few other ARM platforms (tegra, prima2 and zynq) have bootargs in the chosen node and that's where I got it from, but our bootloader has fdt support so this can easily be removed.
some powerpc platforms also do that:
Right, I never said I was perfect :-)
Quoted 11 lines
asp834x-redboot.dts: bootargs = "console=ttyS0,38400
root=/dev/mtdblock3 rootfstype=jffs2";gamecube.dts: bootargs = "root=/dev/gcnsda2 rootwait udbg-immortal";prpmc2800.dts: bootargs = "ip=on";rainier.dts: bootargs = "console=ttyS0,115200";sequoia.dts: bootargs = "console=ttyS0,115200";virtex440-ml507.dts: bootargs = "console=ttyS0 root=/dev/ram";virtex440-ml510.dts: bootargs = "console=ttyS0 root=/dev/ram";wii.dts: bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";if we have no bootargs in bootloader, kernel will use that one in DT.
Cheers,
Ben.
v2 cover Initial support for Picochip picoxcell
In reply to Jamie IlesQuoted 8 lines · Jamie Iles
This series adds support for Picochip picoXcell (PC3X2 and PC3X3) ARM1176JZ-S based devices. This is a device tree only platform and currently supports interrupt controllers and UARTs.
This series is based off of Grant's devicetree/test branch and also uses Russell's io and gpio cleanup patches to remove the definition of
IO_SPACE_LIMITand trivial gpio definitions.
Quoted 5 lines
Changes since v1:
- Cleanup empty headers
- Useof_platform_populate()and the default match table
- Split the VIC's into separate device nodes
ping?
Jamie
v2 cover Initial support for Picochip picoxcell
In reply to Jamie IlesQuoted 10 lines · Jamie Iles
This series adds support for Picochip picoXcell (PC3X2 and PC3X3) ARM1176JZ-S based devices. This is a device tree only platform and currently supports interrupt controllers and UARTs.
This series is based off of Grant's devicetree/test branch and also uses Russell's io and gpio cleanup patches to remove the definition of
IO_SPACE_LIMITand trivial gpio definitions.Changes since v1:
Quoted 8 lines
- Cleanup empty headers
- Useof_platform_populate()and the default match table
- Split the VIC's into separate device nodesJamie Iles (3):
picoxcell: support for Picochip picoxcell devices
picoxcell: add the DTS for pc3x2 and pc3x3 devices
picoxcell: add the DTS for the PC7302 board
Hi Arnd,
Is there likely to be any chance of getting support for picoxcell merged? This series can now be based on top of Nicolas' static IO mapping patches to remove some more code but I'm not sure what else I can do to make them easier to review!
Thanks,
Jamie
v2 cover Initial support for Picochip picoxcell
Quoted 7 lines · Jamie Iles
Hi Arnd,
Is there likely to be any chance of getting support for picoxcell merged? This series can now be based on top of Nicolas' static IO mapping patches to remove some more code but I'm not sure what else I can do to make them easier to review!
Hi Jamie,
I think you did everything right, but I haven't gotten to do a proper review, which is entirely my fault.
Please send out the current version to the mailing list again and put me on Cc, so it shows up in my inbox. In my extremely brief review I found no show stoppers, so I'm sure we can find a way to get it into 3.2.
Do you have a git tree that I can pull?
Arnd