ASoC: tlv320aic23: Clear TLV320AIC23_MS_MASTER bit for slave mode
Subsystems (3)
PATCH 1/2 ASoC: tlv320aic23: Clear TLV320AIC23_MS_MASTER bit for slave mode
According to the datasheet:
Digital Audio Interface Format (07h) register:
BIT6: Master/slave mode
0: Slave
1: Master
Current code sets TLV320AIC23_MS_MASTER bit for master mode, but does not clear it for slave mode.
--- sound/soc/codecs/tlv320aic23.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
sound/soc/codecs/tlv320aic23.c +1 -0
@@ -430,6 +430,7 @@ static int tlv320aic23_set_dai_fmt(struct snd_soc_dai *codec_dai, iface_reg |=TLV320AIC23_MS_MASTER ;break ;case SND_SOC_DAIFMT_CBS_CFS : + iface_reg &= ~TLV320AIC23_MS_MASTER ;break ;default :return -EINVAL ;
Signature · 1 line
1.7.5.4
PATCH 2/2 ASoC: tlv320aic3x: Clear BIT_CLK_MASTER and WORD_CLK_MASTER bits for for slave mode
According to the datasheet:
Page0 / Register8: Audio Serial Data interface Control Register A BIT 7: Bit Clock Directional Control
0: Bit clock is an input (slave mode)
1: Bit clock is an output (master mode)
BIT 6: Word Clock Directional Control
0: Word clock is an input (slave mode)
1: Word clock is an output (master mode)
Current code sets BIT_CLK_MASTER and WORD_CLK_MASTER bits for master mode, but does not clear these bits for slave mode.
--- sound/soc/codecs/tlv320aic3x.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
sound/soc/codecs/tlv320aic3x.c +1 -0
@@ -1021,6 +1021,7 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai,break ;case SND_SOC_DAIFMT_CBS_CFS : aic3x->master =0 ; + iface_areg &= ~(BIT_CLK_MASTER |WORD_CLK_MASTER );break ;default :return -EINVAL ;
Signature · 1 line
1.7.5.4
Re: [PATCH 2/2] ASoC: tlv320aic3x: Clear BIT_CLK_MASTER and WORD_CLK_MASTER bits for for slave mode
Quoted 25 lines · Axel Lin
According to the datasheet:
Page0 / Register8: Audio Serial Data interface Control Register A BIT 7: Bit Clock Directional Control
0: Bit clock is an input (slave mode)
1: Bit clock is an output (master mode)BIT 6: Word Clock Directional Control
0: Word clock is an input (slave mode)
1: Word clock is an output (master mode)Current code sets
BIT_CLK_MASTERandWORD_CLK_MASTERbits for master mode, but does not clear these bits for slave mode.Signed-off-by Axel Lin <[email protected]>---
sound/soc/codecs/tlv320aic3x.c | 1 +1 files changed, 1 insertions(+), 0 deletions(-)sound/soc/codecs/tlv320aic3x.c +0
-0@@ -1021,6 +1021,7 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai, break;
Quoted 12 lines
case
SND_SOC_DAIFMT_CBS_CFS:
aic3x->master = 0;
+iface_areg&= ~(BIT_CLK_MASTER |WORD_CLK_MASTER); break;
default:
return-EINVAL;
--
1.7.5.4
Both
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Re: [PATCH 2/2] ASoC: tlv320aic3x: Clear BIT_CLK_MASTER and WORD_CLK_MASTER bits for for slave mode
In reply to Axel LinQuoted 11 lines · Axel Lin
According to the datasheet:
Page0 / Register8: Audio Serial Data interface Control Register A BIT 7: Bit Clock Directional Control
0: Bit clock is an input (slave mode)
1: Bit clock is an output (master mode)BIT 6: Word Clock Directional Control
0: Word clock is an input (slave mode)
1: Word clock is an output (master mode)
Quoted 8 lines
Current code sets
BIT_CLK_MASTERandWORD_CLK_MASTERbits for master mode, but does not clear these bits for slave mode.Signed-off-by Axel Lin <[email protected]>--- sound/soc/codecs/tlv320aic3x.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
This is not entirely true - there is this fussy '& 0x3f' operation that does clear those bits a few code lines above your change. Now we can rid of it thanks to your patch, hopefully for iface_breg too (in case if you are going to send an another patch as this is applied) :-)
Signature · 1 line
Jarkko
Mark Brown
AppliedQuoted 4 lines · Axel Lin
According to the datasheet:
Digital Audio Interface Format (07h) register:
BIT6: Master/slave mode
Applied both, thanks.