Add Renesas R8A7794 USB/VIN PFC support
Subsystems (3)
cover Add Renesas R8A7794 USB/VIN PFC support
Hello.
Here's the set of 2 patches against the 'devel' branch of Linus Walleij's
'linux-pinctrl.git' repo. Here we add the PFC support for the Renesas R8A7794 SoC's USB and VIN devices.
[1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups [2/2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
WBR, Sergei
PATCH 1/2 pinctrl: sh-pfc: r8a7794: add USB pin groups
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
--- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +30 -0
@@ -2770,6 +2770,24 @@ static const unsigned int sdhi2_wp_pins[static const unsigned int sdhi2_wp_mux[] = {SD2_WP_MARK , }; +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { +RCAR_GP_PIN (5 ,24 ),/* PWEN */ +RCAR_GP_PIN (5 ,25 ),/* OVC */ +}; +static const unsigned int usb0_mux[] = { +USB0_PWEN_MARK , +USB0_OVC_MARK , +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { +RCAR_GP_PIN (5 ,26 ),/* PWEN */ +RCAR_GP_PIN (5 ,27 ),/* OVC */ +}; +static const unsigned int usb1_mux[] = { +USB1_PWEN_MARK , +USB1_OVC_MARK , +};static const struct sh_pfc_pin_group pinmux_groups[] = {SH_PFC_PIN_GROUP (eth_link),
@@ -2945,6 +2963,8 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_ctrl),SH_PFC_PIN_GROUP (sdhi2_cd ),SH_PFC_PIN_GROUP (sdhi2_wp ), +SH_PFC_PIN_GROUP (usb0 ), + SH_PFC_PIN_GROUP(usb1), };static const char *const eth_groups[] = {
@@ -3219,6 +3239,14 @@ static const char * const sdhi2_groups[] "sdhi2_wp", }; +static const char *const usb0_groups[] = { +"usb0" , +}; + +static const char *const usb1_groups[] = { +"usb1" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),
@@ -3253,6 +3281,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi0),SH_PFC_FUNCTION (sdhi1 ),SH_PFC_FUNCTION (sdhi2 ), +SH_PFC_FUNCTION (usb0 ), + SH_PFC_FUNCTION(usb1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups
Hi Sergei,
Thank you for the patch.
Quoted 7 lines · On Wednesday 19 August 2015 01:26:55 Sergei Shtylyov wrote:
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Shinobu Uehara <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>
Quoted 68 lines
--- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)Index:
renesas/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
===================================================================drivers/pinctrl/sh-pfc/pfc-r8a7794.c +30
-2@@ -2770,6 +2770,24 @@ static const unsigned int sdhi2_wp_pins[static const unsigned int sdhi2_wp_mux[] = {SD2_WP_MARK , }; +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { +RCAR_GP_PIN(5, 24), /* PWEN */ + RCAR_GP_PIN(5, 25), /* OVC */ +}; +static const unsigned int usb0_mux[] = { +USB0_PWEN_MARK , +USB0_OVC_MARK , +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { +RCAR_GP_PIN(5, 26), /* PWEN */ + RCAR_GP_PIN(5, 27), /* OVC */ +}; +static const unsigned int usb1_mux[] = { +USB1_PWEN_MARK , +USB1_OVC_MARK , +};static const struct sh_pfc_pin_group pinmux_groups[] = {SH_PFC_PIN_GROUP (eth_link),@@ -2945,6 +2963,8 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_ctrl),SH_PFC_PIN_GROUP (sdhi2_cd ),SH_PFC_PIN_GROUP (sdhi2_wp ), +SH_PFC_PIN_GROUP (usb0 ), + SH_PFC_PIN_GROUP(usb1), };static const char *const eth_groups[] = {@@ -3219,6 +3239,14 @@ static const char * const sdhi2_groups[] "sdhi2_wp", }; +static const char *const usb0_groups[] = { +"usb0" , +}; + +static const char *const usb1_groups[] = { +"usb1" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),@@ -3253,6 +3281,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi0),SH_PFC_FUNCTION (sdhi1 ),SH_PFC_FUNCTION (sdhi2 ), +SH_PFC_FUNCTION (usb0 ), + SH_PFC_FUNCTION(usb1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Signature · 3 lines
Regards, Laurent Pinchart
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups
Hello.
Quoted 1 line · Laurent Pinchart
Thank you for the patch.
My pleasure. :-)
Quoted 10 lines · On Wednesday 19 August 2015 01:26:55 Sergei Shtylyov wrote:
Quoted 7 lines
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Shinobu Uehara <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>Acked-by Laurent Pinchart <[email protected]>
Thank you!
How about the VIN patch? :-)
MBR, Sergei
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups
Hi Sergei,
Quoted 10 lines · On Thursday 20 August 2015 15:59:46 Sergei Shtylyov wrote:
Quoted 1 line · Laurent Pinchart
Thank you for the patch.
My pleasure. :-)
Quoted 5 lines · On Wednesday 19 August 2015 01:26:55 Sergei Shtylyov wrote:
Quoted 4 lines
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
Signed-off-by Shinobu Uehara <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>Acked-by Laurent Pinchart <[email protected]>Thank you!
How about the VIN patch? :-)
I was hoping someone else would review that one :-) Geert, would you have a bit of bandwidth to spare ?
Signature · 3 lines
Regards, Laurent Pinchart
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups
Quoted 13 lines · Laurent Pinchart
Quoted 13 lines
Quoted 1 line
Thank you for the patch.
My pleasure. :-)
Quoted 9 lines · On Wednesday 19 August 2015 01:26:55 Sergei Shtylyov wrote:
Quoted 7 lines
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Shinobu Uehara <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
Acked-by Laurent Pinchart <[email protected]>Thank you!
How about the VIN patch? :-)I was hoping someone else would review that one :-) Geert, would you have a bit of bandwidth to spare ?
The MAINTAINERS file still has you as the Renesas PFC maintainer not Geert. ;-)
MBR, Sergei
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7794: add USB pin groups
In reply to Sergei ShtylyovQuoted 7 lines · Sergei Shtylyov
From: Shinobu Uehara <[email protected]>
Add USB0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Shinobu Uehara <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>
Patch applied with Laurent's ACK.
Yours,
Linus Walleij
PATCH 2/2 pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovFrom: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
--- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 203 +++++++++++++++++++++++++++++++++++ 1 file changed, 203 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +203 -0
@@ -2789,6 +2789,167 @@ static const unsigned int usb1_mux[] = { USB1_OVC_MARK, }; +union vin_data { +unsigned int data24[24 ]; +unsigned int data20[20 ]; +unsigned int data16[16 ]; +unsigned int data12[12 ]; +unsigned int data10[10 ]; +unsigned int data8[8 ]; +}; + +#define VIN_DATA_PIN_GROUP (n, s) \ + { \ + .name = #n#s, \ + .pins = n##_pins.data##s, \ + .mux = n##_mux.data##s, \ + .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ + } + +/* - VIN0 ------------------------------------------------------------------- */ +static const union vin_data vin0_data_pins = { + .data24 = { +/* B */ +RCAR_GP_PIN (3 ,1 ),RCAR_GP_PIN (3 ,2 ), +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,13 ),RCAR_GP_PIN (3 ,14 ), +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,21 ),RCAR_GP_PIN (3 ,22 ), +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), + }, +}; +static const union vin_data vin0_data_mux = { + .data24 = { +/* B */ +VI0_DATA0_VI0_B0_MARK ,VI0_DATA1_VI0_B1_MARK , +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G0_MARK ,VI0_G1_MARK , +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R0_MARK ,VI0_R1_MARK , +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , + }, +}; +static const unsigned int vin0_data18_pins[] = { +/* B */ +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), +}; +static const unsigned int vin0_data18_mux[] = { +/* B */ +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , +}; +static const unsigned int vin0_sync_pins[] = { +RCAR_GP_PIN (3 ,11 ),/* HSYNC */ +RCAR_GP_PIN (3 ,12 ),/* VSYNC */ +}; +static const unsigned int vin0_sync_mux[] = { +VI0_HSYNC_N_MARK , +VI0_VSYNC_N_MARK , +}; +static const unsigned int vin0_field_pins[] = { +RCAR_GP_PIN (3 ,10 ), +}; +static const unsigned int vin0_field_mux[] = { +VI0_FIELD_MARK , +}; +static const unsigned int vin0_clkenb_pins[] = { +RCAR_GP_PIN (3 ,9 ), +}; +static const unsigned int vin0_clkenb_mux[] = { +VI0_CLKENB_MARK , +}; +static const unsigned int vin0_clk_pins[] = { +RCAR_GP_PIN (3 ,0 ), +}; +static const unsigned int vin0_clk_mux[] = { +VI0_CLK_MARK , +}; + +/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +}; +static const unsigned int vin1_data8_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +}; +static const unsigned int vin1_sync_pins[] = { +RCAR_GP_PIN (5 ,22 ),/* HSYNC */ +RCAR_GP_PIN (5 ,23 ),/* VSYNC */ +}; +static const unsigned int vin1_sync_mux[] = { +VI1_HSYNC_N_MARK , +VI1_VSYNC_N_MARK , +}; +static const unsigned int vin1_field_pins[] = { +RCAR_GP_PIN (5 ,21 ), +}; +static const unsigned int vin1_field_mux[] = { +VI1_FIELD_MARK , +}; +static const unsigned int vin1_clkenb_pins[] = { +RCAR_GP_PIN (5 ,20 ), +}; +static const unsigned int vin1_clkenb_mux[] = { +VI1_CLKENB_MARK , +}; +static const unsigned int vin1_clk_pins[] = { +RCAR_GP_PIN (5 ,11 ), +}; +static const unsigned int vin1_clk_mux[] = { +VI1_CLK_MARK , +}; +static const unsigned int vin1_g_b_pins[] = { +/* G */ +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), +}; +static const unsigned int vin1_g_b_mux[] = { +/* G */ +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , +}; +static const struct sh_pfc_pin_group pinmux_groups[] = {SH_PFC_PIN_GROUP (eth_link),SH_PFC_PIN_GROUP (eth_magic),
@@ -2965,6 +3126,23 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_wp),SH_PFC_PIN_GROUP (usb0),SH_PFC_PIN_GROUP (usb1), +VIN_DATA_PIN_GROUP (vin0_data,24 ), +VIN_DATA_PIN_GROUP (vin0_data,20 ), +SH_PFC_PIN_GROUP (vin0_data18), +VIN_DATA_PIN_GROUP (vin0_data,16 ), +VIN_DATA_PIN_GROUP (vin0_data,12 ), +VIN_DATA_PIN_GROUP (vin0_data,10 ), +VIN_DATA_PIN_GROUP (vin0_data,8 ), +SH_PFC_PIN_GROUP (vin0_sync), +SH_PFC_PIN_GROUP (vin0_field), +SH_PFC_PIN_GROUP (vin0_clkenb), +SH_PFC_PIN_GROUP (vin0_clk), +SH_PFC_PIN_GROUP (vin1_data8), +SH_PFC_PIN_GROUP (vin1_sync), +SH_PFC_PIN_GROUP (vin1_field), +SH_PFC_PIN_GROUP (vin1_clkenb), +SH_PFC_PIN_GROUP (vin1_clk), + SH_PFC_PIN_GROUP(vin1_g_b), }; static const char * const eth_groups[] = {
@@ -3247,6 +3425,29 @@ static const char * const usb1_groups[] "usb1", }; +static const char *const vin0_groups[] = { +"vin0_data24" , +"vin0_data20" , +"vin0_data18" , +"vin0_data16" , +"vin0_data12" , +"vin0_data10" , +"vin0_data8" , +"vin0_sync" , +"vin0_field" , +"vin0_clkenb" , +"vin0_clk" , +}; + +static const char *const vin1_groups[] = { +"vin1_data8" , +"vin1_sync" , +"vin1_field" , +"vin1_clkenb" , +"vin1_clk" , +"vin1_g_b" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),
@@ -3283,6 +3484,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi2),SH_PFC_FUNCTION (usb0 ),SH_PFC_FUNCTION (usb1 ), +SH_PFC_FUNCTION (vin0 ), + SH_PFC_FUNCTION(vin1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Re: [PATCH 2/2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Hi (Tovaritsj?) Sergei, Matsuoka-san,
Quoted 7 lines · Sergei Shtylyov
From: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Koji Matsuoka <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>
Thanks for your patch!
Quoted 12 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +6
-0@@ -2789,6 +2789,167 @@ static const unsigned int usb1_mux[] = { USB1_OVC_MARK, }; +union vin_data { +unsigned int data24[24 ]; +unsigned int data20[20 ]; +unsigned int data16[16 ]; +unsigned int data12[12 ]; +unsigned int data10[10 ];
drivers/pinctrl/sh-pfc/pfc-r8a7794.c static const unsigned int usb1_mux[] = { · line 2807
Quoted 10 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +10
-0+unsigned int data8[8 ]; +}; + +#define VIN_DATA_PIN_GROUP (n, s) \ + { \ + .name = #n#s, \ + .pins = n##_pins.data##s, \ + .mux = n##_mux.data##s, \ + .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ + }
As this is the third occurrence of these 2 definitions, perhaps they should be moved to sh_pfc.h?
drivers/pinctrl/sh-pfc/pfc-r8a7794.c static const unsigned int usb1_mux[] = { · line 2951
Quoted 12 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +11
-0+/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_g_b_pins[] = { +/* G */ +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), +}; +static const unsigned int vin1_g_b_mux[] = { +/* G */ +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , +};
This is the green channel, to augment red and blue in vin_data8*? If yes, would it make sense to have a separate vin1_data12* section, combining them?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 2/2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Hello.
Quoted 1 line · Geert Uytterhoeven
Hi (Tovaritsj?) Sergei,
Tovarishch. :-)
Quoted 29 lines
Matsuoka-san,
Quoted 7 lines
From: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Koji Matsuoka <[email protected]>[Sergei: rebased, renamed, added changelog.]Signed-off-by Sergei Shtylyov <[email protected]>Thanks for your patch!
Quoted 17 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +11
-0@@ -2789,6 +2789,167 @@ static const unsigned int usb1_mux[] = { USB1_OVC_MARK, }; +union vin_data { +unsigned int data24[24 ]; +unsigned int data20[20 ]; +unsigned int data16[16 ]; +unsigned int data12[12 ]; +unsigned int data10[10 ]; +unsigned int data8[8 ]; +}; + +#define VIN_DATA_PIN_GROUP (n, s) \ + { \
Quoted 8 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c static const unsigned int usb1_mux[] = { · line 2807
Quoted 5 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +5
-0+ .name = #n#s, \ + .pins = n##_pins.data##s, \ + .mux = n##_mux.data##s, \ + .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ + }As this is the third occurrence of these 2 definitions, perhaps they should be moved to
sh_pfc.h?
I'll look into this.
Quoted 14 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c static const unsigned int usb1_mux[] = { · line 2951
Quoted 12 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +11
-0+/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_g_b_pins[] = { +/* G */ +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), +}; +static const unsigned int vin1_g_b_mux[] = { +/* G */ +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , +};This is the green channel, to augment red and blue in vin_data8*?
I have no idea, even after rummaging in the BT.* specs mentioned in the
manuals. ITU-R BT.656 only describes 8- and 10-bit interfaces. Matsuoka-san, any idea?
Quoted 2 lines
If yes, would it make sense to have a separate vin1_data12* section, combining them?
Most probably.
Quoted 3 lines
Gr{oetje,eeting}s,
Geert
MBR, Sergei
PATCH 1/1 pinctrl: sh-pfc: r8a779[01]: move 'union vin_data' to shared header file
In reply to Sergei ShtylyovR8A7790/1 PFC drivers use almost identical 'union vin_data' and completely identical VIN_DATA_PIN_GROUP() macro; we thus can move them into the shared header file...
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 18 ------------------ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 18 ------------------ drivers/pinctrl/sh-pfc/sh_pfc.h | 18 ++++++++++++++++++ 3 files changed, 18 insertions(+), 36 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3625,24 +3625,6 @@ static const unsigned int usb2_mux[] = {
USB2_PWEN_MARK, USB2_OVC_MARK,
};
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
- unsigned int data4[4];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -3986,24 +3986,6 @@ static const unsigned int usb1_mux[] = {
USB1_PWEN_MARK,
USB1_OVC_MARK,
};
-
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h +++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -52,6 +52,24 @@ struct sh_pfc_pin_group {
unsigned int nr_pins;
};
+#define VIN_DATA_PIN_GROUP(n, s) \
+ { \
+ .name = #n#s, \
+ .pins = n##_pins.data##s, \
+ .mux = n##_mux.data##s, \
+ .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
+ }
+
+union vin_data {
+ unsigned int data24[24];
+ unsigned int data20[20];
+ unsigned int data16[16];
+ unsigned int data12[12];
+ unsigned int data10[10];
+ unsigned int data8[8];
+ unsigned int data4[4];
+};
+
#define SH_PFC_FUNCTION(n) \
{ \
.name = #n, \
Re: [PATCH] pinctrl: sh-pfc: r8a779[01]: move 'union vin_data' to shared header file
Quoted 6 lines · Sergei Shtylyov
R8A7790/1 PFC drivers use almost identical 'union
vin_data' and completely identicalVIN_DATA_PIN_GROUP()macro; we thus can move them into the shared header file...Suggested-by Geert Uytterhoeven <[email protected]>Signed-off-by Sergei Shtylyov <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH v2 1/1 pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovFrom: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group.]
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo. It depends on the patch I've just posted in order to build.
Changes in version 2:
- relied on the 'struct vin_data' and #define VIN_DATA_PIN_GROUP() moved to the common header file;
- added to the VI1_DATA8/9/10/11 pin group VI1_DATA[0-7] pins and renamed/moved this pin group.
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 192 +++++++++++++++++++++++++++++++++++ 1 file changed, 192 insertions(+)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -2789,6 +2789,156 @@ static const unsigned int usb1_mux[] = {
USB1_OVC_MARK,
};
+/* - VIN0 ------------------------------------------------------------------- */ +static const union vin_data vin0_data_pins = {
+ .data24 = {
+ /* B */
+ RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2),
+ RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4),
+ RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
+ RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
+ /* G */
+ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
+ RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
+ RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 18),
+ RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20),
+ /* R */
+ RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22),
+ RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 24),
+ RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26),
+ RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28),
+ },
+};
+static const union vin_data vin0_data_mux = {
+ .data24 = {
+ /* B */
+ VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK,
+ VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
+ VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
+ VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
+ /* G */
+ VI0_G0_MARK, VI0_G1_MARK,
+ VI0_G2_MARK, VI0_G3_MARK,
+ VI0_G4_MARK, VI0_G5_MARK,
+ VI0_G6_MARK, VI0_G7_MARK,
+ /* R */
+ VI0_R0_MARK, VI0_R1_MARK,
+ VI0_R2_MARK, VI0_R3_MARK,
+ VI0_R4_MARK, VI0_R5_MARK,
+ VI0_R6_MARK, VI0_R7_MARK,
+ },
+};
+static const unsigned int vin0_data18_pins[] = {
+ /* B */
+ RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4),
+ RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
+ RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
+ /* G */
+ RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
+ RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 18),
+ RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20),
+ /* R */
+ RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 24),
+ RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26),
+ RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28),
+};
+static const unsigned int vin0_data18_mux[] = {
+ /* B */
+ VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
+ VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
+ VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
+ /* G */
+ VI0_G2_MARK, VI0_G3_MARK,
+ VI0_G4_MARK, VI0_G5_MARK,
+ VI0_G6_MARK, VI0_G7_MARK,
+ /* R */
+ VI0_R2_MARK, VI0_R3_MARK,
+ VI0_R4_MARK, VI0_R5_MARK,
+ VI0_R6_MARK, VI0_R7_MARK,
+};
+static const unsigned int vin0_sync_pins[] = {
+ RCAR_GP_PIN(3, 11), /* HSYNC */
+ RCAR_GP_PIN(3, 12), /* VSYNC */
+};
+static const unsigned int vin0_sync_mux[] = {
+ VI0_HSYNC_N_MARK,
+ VI0_VSYNC_N_MARK,
+};
+static const unsigned int vin0_field_pins[] = {
+ RCAR_GP_PIN(3, 10),
+};
+static const unsigned int vin0_field_mux[] = {
+ VI0_FIELD_MARK,
+};
+static const unsigned int vin0_clkenb_pins[] = {
+ RCAR_GP_PIN(3, 9),
+};
+static const unsigned int vin0_clkenb_mux[] = {
+ VI0_CLKENB_MARK,
+};
+static const unsigned int vin0_clk_pins[] = {
+ RCAR_GP_PIN(3, 0),
+};
+static const unsigned int vin0_clk_mux[] = {
+ VI0_CLK_MARK,
+};
+
+/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = {
+ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
+ RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
+ RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17),
+ RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19),
+};
+static const unsigned int vin1_data8_mux[] = {
+ VI1_DATA0_MARK, VI1_DATA1_MARK,
+ VI1_DATA2_MARK, VI1_DATA3_MARK,
+ VI1_DATA4_MARK, VI1_DATA5_MARK,
+ VI1_DATA6_MARK, VI1_DATA7_MARK,
+};
+static const unsigned int vin1_data12_pins[] = {
+ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
+ RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
+ RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17),
+ RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19),
+ RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11),
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+};
+static const unsigned int vin1_data12_mux[] = {
+ VI1_DATA0_MARK, VI1_DATA1_MARK,
+ VI1_DATA2_MARK, VI1_DATA3_MARK,
+ VI1_DATA4_MARK, VI1_DATA5_MARK,
+ VI1_DATA6_MARK, VI1_DATA7_MARK,
+ VI1_DATA8_MARK, VI1_DATA9_MARK,
+ VI1_DATA10_MARK, VI1_DATA11_MARK,
+};
+static const unsigned int vin1_sync_pins[] = {
+ RCAR_GP_PIN(5, 22), /* HSYNC */
+ RCAR_GP_PIN(5, 23), /* VSYNC */
+};
+static const unsigned int vin1_sync_mux[] = {
+ VI1_HSYNC_N_MARK,
+ VI1_VSYNC_N_MARK,
+};
+static const unsigned int vin1_field_pins[] = {
+ RCAR_GP_PIN(5, 21),
+};
+static const unsigned int vin1_field_mux[] = {
+ VI1_FIELD_MARK,
+};
+static const unsigned int vin1_clkenb_pins[] = {
+ RCAR_GP_PIN(5, 20),
+};
+static const unsigned int vin1_clkenb_mux[] = {
+ VI1_CLKENB_MARK,
+};
+static const unsigned int vin1_clk_pins[] = {
+ RCAR_GP_PIN(5, 11),
+};
+static const unsigned int vin1_clk_mux[] = {
+ VI1_CLK_MARK,
+};
+
static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(eth_link),
SH_PFC_PIN_GROUP(eth_magic),
@@ -2965,6 +3115,23 @@ static const struct sh_pfc_pin_group pin
SH_PFC_PIN_GROUP(sdhi2_wp),
SH_PFC_PIN_GROUP(usb0),
SH_PFC_PIN_GROUP(usb1),
+ VIN_DATA_PIN_GROUP(vin0_data, 24),
+ VIN_DATA_PIN_GROUP(vin0_data, 20),
+ SH_PFC_PIN_GROUP(vin0_data18),
+ VIN_DATA_PIN_GROUP(vin0_data, 16),
+ VIN_DATA_PIN_GROUP(vin0_data, 12),
+ VIN_DATA_PIN_GROUP(vin0_data, 10),
+ VIN_DATA_PIN_GROUP(vin0_data, 8),
+ SH_PFC_PIN_GROUP(vin0_sync),
+ SH_PFC_PIN_GROUP(vin0_field),
+ SH_PFC_PIN_GROUP(vin0_clkenb),
+ SH_PFC_PIN_GROUP(vin0_clk),
+ SH_PFC_PIN_GROUP(vin1_data8),
+ SH_PFC_PIN_GROUP(vin1_data12),
+ SH_PFC_PIN_GROUP(vin1_sync),
+ SH_PFC_PIN_GROUP(vin1_field),
+ SH_PFC_PIN_GROUP(vin1_clkenb),
+ SH_PFC_PIN_GROUP(vin1_clk),
};
static const char * const eth_groups[] = {
@@ -3247,6 +3414,29 @@ static const char * const usb1_groups[]
"usb1",
};
+static const char * const vin0_groups[] = {
+ "vin0_data24",
+ "vin0_data20",
+ "vin0_data18",
+ "vin0_data16",
+ "vin0_data12",
+ "vin0_data10",
+ "vin0_data8",
+ "vin0_sync",
+ "vin0_field",
+ "vin0_clkenb",
+ "vin0_clk",
+};
+
+static const char * const vin1_groups[] = {
+ "vin1_data8",
+ "vin1_data12",
+ "vin1_sync",
+ "vin1_field",
+ "vin1_clkenb",
+ "vin1_clk",
+};
+
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0),
@@ -3283,6 +3473,8 @@ static const struct sh_pfc_function pinm
SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(vin0),
+ SH_PFC_FUNCTION(vin1),
};
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Re: [PATCH v2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Hi Sergei,
Quoted 13 lines · Sergei Shtylyov
From: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Koji Matsuoka <[email protected]>[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group.]
Signed-off-by Sergei Shtylyov <[email protected]>---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo. It depends on the patch I've just posted in order to build.
Quoted 5 lines
Changes in version 2:
- relied on the 'structvin_data' and #defineVIN_DATA_PIN_GROUP()moved to the common header file;
- added to the VI1_DATA8/9/10/11 pin group VI1_DATA[0-7] pins and renamed/moved this pin group.
Thanks for the update!
Quoted 27 lines
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 192 +++++++++++++++++++++++++++++++++++ 1 file changed, 192 insertions(+)Index:
linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c=================================> ---linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7794.c+++linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c(quoted diff) +19
-0@@ -2789,6 +2789,156 @@ static const unsigned int usb1_mux[] = { +/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), +}; +static const unsigned int vin1_data8_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK, + VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, +}; +static const unsigned int vin1_data12_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11),
Review static const unsigned int usb1_mux[] = { · line 2818
Quoted 10 lines
(quoted diff) +10
-0+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_data12_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK, + VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, + VI1_DATA8_MARK, VI1_DATA9_MARK, + VI1_DATA10_MARK, VI1_DATA11_MARK, +};
According to Table 26.2, VIN Channel 1 on R-Car E2 supports 8, 10, and 12 bit input data. Can you please add data10, too?
Thanks again!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovHi Sergei,
Quoted 19 lines · Sergei Shtylyov
(quoted diff) +19
-0+/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), +}; +static const unsigned int vin1_data8_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK, + VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, +}; +static const unsigned int vin1_data12_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11),
Review
Quoted 10 lines
(quoted diff) +10
-0+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_data12_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK, + VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, + VI1_DATA8_MARK, VI1_DATA9_MARK, + VI1_DATA10_MARK, VI1_DATA11_MARK, +};
Given Laurent asked to slightly rework this series, perhaps vin1_data*[] can use a union to decrease memory usage, too?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Hello.
Quoted 24 lines · Geert Uytterhoeven
Quoted 24 lines
(quoted diff) +24
-0+/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), +}; +static const unsigned int vin1_data8_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK, + VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, +}; +static const unsigned int vin1_data12_pins[] = { + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), + RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15), + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), + RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11), + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_data12_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, + VI1_DATA2_MARK, VI1_DATA3_MARK,
Quoted 8 lines
Review
Quoted 5 lines
(quoted diff) +5
-0+ VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, + VI1_DATA8_MARK, VI1_DATA9_MARK, + VI1_DATA10_MARK, VI1_DATA11_MARK, +};Given Laurent asked to slightly rework this series, perhaps vin1_data*[] can use a union to decrease memory usage, too?
You're right -- using 'union vin_data' would save some memory now that we
have 3 pairs of arrays.
Quoted 3 lines
Gr{oetje,eeting}s,
Geert
MBR, Sergei
PATCH v3 1/1 pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovFrom: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "vin1_data10" pin group.]
---
Changes in version 3:
- added "vin1_data10" pin group.
Changes in version 2:
- relied on the 'struct vin_data' and #define VIN_DATA_PIN_GROUP() moved to the common header file;
- added to the VI1_DATA8/9/10/11 pin group VI1_DATA[0-7] pins and renamed/moved this pin group.
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 208 +++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +208 -0
@@ -2789,6 +2789,170 @@ static const unsigned int usb1_mux[] = { USB1_OVC_MARK, }; +/* - VIN0 ------------------------------------------------------------------- */ +static const union vin_data vin0_data_pins = { + .data24 = { +/* B */ +RCAR_GP_PIN (3 ,1 ),RCAR_GP_PIN (3 ,2 ), +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,13 ),RCAR_GP_PIN (3 ,14 ), +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,21 ),RCAR_GP_PIN (3 ,22 ), +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), + }, +}; +static const union vin_data vin0_data_mux = { + .data24 = { +/* B */ +VI0_DATA0_VI0_B0_MARK ,VI0_DATA1_VI0_B1_MARK , +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G0_MARK ,VI0_G1_MARK , +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R0_MARK ,VI0_R1_MARK , +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , + }, +}; +static const unsigned int vin0_data18_pins[] = { +/* B */ +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), +}; +static const unsigned int vin0_data18_mux[] = { +/* B */ +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , +}; +static const unsigned int vin0_sync_pins[] = { +RCAR_GP_PIN (3 ,11 ),/* HSYNC */ +RCAR_GP_PIN (3 ,12 ),/* VSYNC */ +}; +static const unsigned int vin0_sync_mux[] = { +VI0_HSYNC_N_MARK , +VI0_VSYNC_N_MARK , +}; +static const unsigned int vin0_field_pins[] = { +RCAR_GP_PIN (3 ,10 ), +}; +static const unsigned int vin0_field_mux[] = { +VI0_FIELD_MARK , +}; +static const unsigned int vin0_clkenb_pins[] = { +RCAR_GP_PIN (3 ,9 ), +}; +static const unsigned int vin0_clkenb_mux[] = { +VI0_CLKENB_MARK , +}; +static const unsigned int vin0_clk_pins[] = { +RCAR_GP_PIN (3 ,0 ), +}; +static const unsigned int vin0_clk_mux[] = { +VI0_CLK_MARK , +}; + +/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +}; +static const unsigned int vin1_data8_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +}; +static const unsigned int vin1_data10_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +}; +static const unsigned int vin1_data10_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +VI1_DATA8_MARK ,VI1_DATA9_MARK , +}; +static const unsigned int vin1_data12_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), +}; +static const unsigned int vin1_data12_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , +}; +static const unsigned int vin1_sync_pins[] = { +RCAR_GP_PIN (5 ,22 ),/* HSYNC */ +RCAR_GP_PIN (5 ,23 ),/* VSYNC */ +}; +static const unsigned int vin1_sync_mux[] = { +VI1_HSYNC_N_MARK , +VI1_VSYNC_N_MARK , +}; +static const unsigned int vin1_field_pins[] = { +RCAR_GP_PIN (5 ,21 ), +}; +static const unsigned int vin1_field_mux[] = { +VI1_FIELD_MARK , +}; +static const unsigned int vin1_clkenb_pins[] = { +RCAR_GP_PIN (5 ,20 ), +}; +static const unsigned int vin1_clkenb_mux[] = { +VI1_CLKENB_MARK , +}; +static const unsigned int vin1_clk_pins[] = { +RCAR_GP_PIN (5 ,11 ), +}; +static const unsigned int vin1_clk_mux[] = { +VI1_CLK_MARK , +}; +static const struct sh_pfc_pin_group pinmux_groups[] = {SH_PFC_PIN_GROUP (eth_link),SH_PFC_PIN_GROUP (eth_magic),
@@ -2965,6 +3129,24 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_wp),SH_PFC_PIN_GROUP (usb0),SH_PFC_PIN_GROUP (usb1), +VIN_DATA_PIN_GROUP (vin0_data,24 ), +VIN_DATA_PIN_GROUP (vin0_data,20 ), +SH_PFC_PIN_GROUP (vin0_data18), +VIN_DATA_PIN_GROUP (vin0_data,16 ), +VIN_DATA_PIN_GROUP (vin0_data,12 ), +VIN_DATA_PIN_GROUP (vin0_data,10 ), +VIN_DATA_PIN_GROUP (vin0_data,8 ), +SH_PFC_PIN_GROUP (vin0_sync), +SH_PFC_PIN_GROUP (vin0_field), +SH_PFC_PIN_GROUP (vin0_clkenb), +SH_PFC_PIN_GROUP (vin0_clk), +SH_PFC_PIN_GROUP (vin1_data8), +SH_PFC_PIN_GROUP (vin1_data10), +SH_PFC_PIN_GROUP (vin1_data12), +SH_PFC_PIN_GROUP (vin1_sync), +SH_PFC_PIN_GROUP (vin1_field), +SH_PFC_PIN_GROUP (vin1_clkenb), + SH_PFC_PIN_GROUP(vin1_clk), }; static const char * const eth_groups[] = {
@@ -3247,6 +3429,30 @@ static const char * const usb1_groups[] "usb1", }; +static const char *const vin0_groups[] = { +"vin0_data24" , +"vin0_data20" , +"vin0_data18" , +"vin0_data16" , +"vin0_data12" , +"vin0_data10" , +"vin0_data8" , +"vin0_sync" , +"vin0_field" , +"vin0_clkenb" , +"vin0_clk" , +}; + +static const char *const vin1_groups[] = { +"vin1_data8" , +"vin1_data10" , +"vin1_data12" , +"vin1_sync" , +"vin1_field" , +"vin1_clkenb" , +"vin1_clk" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),
@@ -3283,6 +3489,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi2),SH_PFC_FUNCTION (usb0 ),SH_PFC_FUNCTION (usb1 ), +SH_PFC_FUNCTION (vin0 ), + SH_PFC_FUNCTION(vin1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Re: [PATCH v3] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Quoted 4 lines · Sergei Shtylyov
From: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Quoted 8 lines
Signed-off-by Koji Matsuoka <[email protected]>[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "
vin1_data10" pin group.]Signed-off-by Sergei Shtylyov <[email protected]>---
Changes in version 3:
- added "vin1_data10" pin group.
Sorry, posted from a wrong file. The patch itself was OK though.
MBR, Sergei
PATCH v3 1/1 pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovFrom: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "vin1_data10" pin group.]
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo. It depends on the patch moving 'union vin_data' to shared header file in order to build.
Changes in version 3:
- added "vin1_data10" pin group.
Changes in version 2:
- relied on the 'struct vin_data' and #define VIN_DATA_PIN_GROUP() moved to the common header file;
- added to the VI1_DATA8/9/10/11 pin group VI1_DATA[0-7] pins and renamed/moved this pin group.
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 208 +++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +208 -0
@@ -2789,6 +2789,170 @@ static const unsigned int usb1_mux[] = { USB1_OVC_MARK, }; +/* - VIN0 ------------------------------------------------------------------- */ +static const union vin_data vin0_data_pins = { + .data24 = { +/* B */ +RCAR_GP_PIN (3 ,1 ),RCAR_GP_PIN (3 ,2 ), +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,13 ),RCAR_GP_PIN (3 ,14 ), +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,21 ),RCAR_GP_PIN (3 ,22 ), +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), + }, +}; +static const union vin_data vin0_data_mux = { + .data24 = { +/* B */ +VI0_DATA0_VI0_B0_MARK ,VI0_DATA1_VI0_B1_MARK , +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G0_MARK ,VI0_G1_MARK , +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R0_MARK ,VI0_R1_MARK , +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , + }, +}; +static const unsigned int vin0_data18_pins[] = { +/* B */ +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), +}; +static const unsigned int vin0_data18_mux[] = { +/* B */ +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , +}; +static const unsigned int vin0_sync_pins[] = { +RCAR_GP_PIN (3 ,11 ),/* HSYNC */ +RCAR_GP_PIN (3 ,12 ),/* VSYNC */ +}; +static const unsigned int vin0_sync_mux[] = { +VI0_HSYNC_N_MARK , +VI0_VSYNC_N_MARK , +}; +static const unsigned int vin0_field_pins[] = { +RCAR_GP_PIN (3 ,10 ), +}; +static const unsigned int vin0_field_mux[] = { +VI0_FIELD_MARK , +}; +static const unsigned int vin0_clkenb_pins[] = { +RCAR_GP_PIN (3 ,9 ), +}; +static const unsigned int vin0_clkenb_mux[] = { +VI0_CLKENB_MARK , +}; +static const unsigned int vin0_clk_pins[] = { +RCAR_GP_PIN (3 ,0 ), +}; +static const unsigned int vin0_clk_mux[] = { +VI0_CLK_MARK , +}; + +/* - VIN1 ----------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +}; +static const unsigned int vin1_data8_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +}; +static const unsigned int vin1_data10_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +}; +static const unsigned int vin1_data10_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +VI1_DATA8_MARK ,VI1_DATA9_MARK , +}; +static const unsigned int vin1_data12_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), +}; +static const unsigned int vin1_data12_mux[] = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , +}; +static const unsigned int vin1_sync_pins[] = { +RCAR_GP_PIN (5 ,22 ),/* HSYNC */ +RCAR_GP_PIN (5 ,23 ),/* VSYNC */ +}; +static const unsigned int vin1_sync_mux[] = { +VI1_HSYNC_N_MARK , +VI1_VSYNC_N_MARK , +}; +static const unsigned int vin1_field_pins[] = { +RCAR_GP_PIN (5 ,21 ), +}; +static const unsigned int vin1_field_mux[] = { +VI1_FIELD_MARK , +}; +static const unsigned int vin1_clkenb_pins[] = { +RCAR_GP_PIN (5 ,20 ), +}; +static const unsigned int vin1_clkenb_mux[] = { +VI1_CLKENB_MARK , +}; +static const unsigned int vin1_clk_pins[] = { +RCAR_GP_PIN (5 ,11 ), +}; +static const unsigned int vin1_clk_mux[] = { +VI1_CLK_MARK , +}; +static const struct sh_pfc_pin_group pinmux_groups[] = {SH_PFC_PIN_GROUP (eth_link),SH_PFC_PIN_GROUP (eth_magic),
@@ -2965,6 +3129,24 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_wp),SH_PFC_PIN_GROUP (usb0),SH_PFC_PIN_GROUP (usb1), +VIN_DATA_PIN_GROUP (vin0_data,24 ), +VIN_DATA_PIN_GROUP (vin0_data,20 ), +SH_PFC_PIN_GROUP (vin0_data18), +VIN_DATA_PIN_GROUP (vin0_data,16 ), +VIN_DATA_PIN_GROUP (vin0_data,12 ), +VIN_DATA_PIN_GROUP (vin0_data,10 ), +VIN_DATA_PIN_GROUP (vin0_data,8 ), +SH_PFC_PIN_GROUP (vin0_sync), +SH_PFC_PIN_GROUP (vin0_field), +SH_PFC_PIN_GROUP (vin0_clkenb), +SH_PFC_PIN_GROUP (vin0_clk), +SH_PFC_PIN_GROUP (vin1_data8), +SH_PFC_PIN_GROUP (vin1_data10), +SH_PFC_PIN_GROUP (vin1_data12), +SH_PFC_PIN_GROUP (vin1_sync), +SH_PFC_PIN_GROUP (vin1_field), +SH_PFC_PIN_GROUP (vin1_clkenb), + SH_PFC_PIN_GROUP(vin1_clk), }; static const char * const eth_groups[] = {
@@ -3247,6 +3429,30 @@ static const char * const usb1_groups[] "usb1", }; +static const char *const vin0_groups[] = { +"vin0_data24" , +"vin0_data20" , +"vin0_data18" , +"vin0_data16" , +"vin0_data12" , +"vin0_data10" , +"vin0_data8" , +"vin0_sync" , +"vin0_field" , +"vin0_clkenb" , +"vin0_clk" , +}; + +static const char *const vin1_groups[] = { +"vin1_data8" , +"vin1_data10" , +"vin1_data12" , +"vin1_sync" , +"vin1_field" , +"vin1_clkenb" , +"vin1_clk" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),
@@ -3283,6 +3489,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi2),SH_PFC_FUNCTION (usb0 ),SH_PFC_FUNCTION (usb1 ), +SH_PFC_FUNCTION (vin0 ), + SH_PFC_FUNCTION(vin1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Re: [PATCH v3] pinctrl: sh-pfc: r8a7794: add VIN pin groups
Quoted 8 lines · Sergei Shtylyov
From: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Signed-off-by Koji Matsuoka <[email protected]>[Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "
vin1_data10" pin group.]Signed-off-by Sergei Shtylyov <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH v2 1/1 pinctrl: sh-pfc: r8a779[01]: move 'union vin_data' to shared header file
In reply to Sergei ShtylyovR8A7790/1 PFC drivers use almost identical 'union vin_data' and completely identical VIN_DATA_PIN_GROUP() macro; we thus can move them into the shared header file...
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.
Changed in version 2:
- removed leftover empty line from the R8A7790 driver;
- added Geert's ACK.
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 19 ------------------- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 18 ------------------ drivers/pinctrl/sh-pfc/sh_pfc.h | 18 ++++++++++++++++++ 3 files changed, 18 insertions(+), 37 deletions(-)
Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7790.c =================================--- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3624,25 +3624,6 @@ static const unsigned int usb2_pins[] static const unsigned int usb2_mux[] = {
USB2_PWEN_MARK, USB2_OVC_MARK,
};
-
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
- unsigned int data4[4];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7791.c =================================--- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -3986,24 +3986,6 @@ static const unsigned int usb1_mux[] = {
USB1_PWEN_MARK,
USB1_OVC_MARK,
};
-
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: renesas/drivers/pinctrl/sh-pfc/sh_pfc.h
=================================--- renesas.orig/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ renesas/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -52,6 +52,24 @@ struct sh_pfc_pin_group {
unsigned int nr_pins;
};
+#define VIN_DATA_PIN_GROUP(n, s) \
+ { \
+ .name = #n#s, \
+ .pins = n##_pins.data##s, \
+ .mux = n##_mux.data##s, \
+ .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
+ }
+
+union vin_data {
+ unsigned int data24[24];
+ unsigned int data20[20];
+ unsigned int data16[16];
+ unsigned int data12[12];
+ unsigned int data10[10];
+ unsigned int data8[8];
+ unsigned int data4[4];
+};
+
#define SH_PFC_FUNCTION(n) \
{ \
.name = #n, \
Re: [PATCH v2] pinctrl: sh-pfc: r8a779[01]: move 'union vin_data' to shared header file
Hi Sergei,
Thank you for the patch.
Quoted 85 lines · On Wednesday 23 September 2015 01:06:21 Sergei Shtylyov wrote:
R8A7790/1 PFC drivers use almost identical 'union
vin_data' and completely identicalVIN_DATA_PIN_GROUP()macro; we thus can move them into the shared header file...Suggested-by Geert Uytterhoeven <[email protected]>Signed-off-by Sergei Shtylyov <[email protected]>---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.Changed in version 2:
- removed leftover empty line from the R8A7790 driver;
- added Geert's ACK.drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 19 ------------------- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 18 ------------------ drivers/pinctrl/sh-pfc/sh_pfc.h | 18 ++++++++++++++++++ 3 files changed, 18 insertions(+), 37 deletions(-)Index:
renesas/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
===================================================================drivers/pinctrl/sh-pfc/pfc-r8a7790.c +0
-19@@ -3624,25 +3624,6 @@ static const unsigned int usb2_pins[] =static const unsigned int usb2_mux[] = {USB2_PWEN_MARK ,USB2_OVC_MARK , }; - -union vin_data { -unsigned int data24[24 ]; -unsigned int data20[20 ]; -unsigned int data16[16 ]; -unsigned int data12[12 ]; -unsigned int data10[10 ]; -unsigned int data8[8 ]; -unsigned int data4[4 ]; -}; - -#define VIN_DATA_PIN_GROUP (n, s) \ - { \ - .name = #n#s, \ - .pins = n##_pins.data##s, \ - .mux = n##_mux.data##s, \ - .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ - } -/* - VIN0 -------------------------------------------------------------- */ static const union vin_data vin0_data_pins = { .data24 = {Index:
renesas/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
===================================================================drivers/pinctrl/sh-pfc/pfc-r8a7791.c +0
-18@@ -3986,24 +3986,6 @@ static const unsigned int usb1_mux[] = {USB1_PWEN_MARK , USB1_OVC_MARK, }; - -union vin_data { -unsigned int data24[24 ]; -unsigned int data20[20 ]; -unsigned int data16[16 ]; -unsigned int data12[12 ]; -unsigned int data10[10 ]; -unsigned int data8[8 ]; -}; - -#define VIN_DATA_PIN_GROUP (n, s) \ - { \ - .name = #n#s, \ - .pins = n##_pins.data##s, \ - .mux = n##_mux.data##s, \ - .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ - } -/* - VIN0 -------------------------------------------------------------- */ static const union vin_data vin0_data_pins = { .data24 = {Index:
renesas/drivers/pinctrl/sh-pfc/sh_pfc.h
===================================================================
drivers/pinctrl/sh-pfc/sh_pfc.h struct sh_pfc_pin_group { · line 53
Quoted 2 lines
drivers/pinctrl/sh-pfc/sh_pfc.h +0
-0@@ -52,6 +52,24 @@ struct sh_pfc_pin_group {unsigned int nr_pins; };
The sh_pfc.h file is getting a bit messy, so I'd just add a comment here to tell what the macro and union are about.
Apart from that,
Quoted 21 lines
drivers/pinctrl/sh-pfc/sh_pfc.h +18
-0+#define VIN_DATA_PIN_GROUP (n, s) \ + { \ + .name = #n#s, \ + .pins = n##_pins.data##s, \ + .mux = n##_mux.data##s, \ + .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ + } + +union vin_data { +unsigned int data24[24 ]; +unsigned int data20[20 ]; +unsigned int data16[16 ]; +unsigned int data12[12 ]; +unsigned int data10[10 ]; +unsigned int data8[8 ]; +unsigned int data4[4 ]; +}; +#define SH_PFC_FUNCTION (n) \ { \ .name = #n, \
Signature · 3 lines
Regards, Laurent Pinchart
PATCH v3 1/1 pinctrl: sh-pfc: r8a779[01]: move 'union vin_data' to shared header file
In reply to Sergei ShtylyovR8A7790/1 PFC drivers use almost identical 'union vin_data' and completely identical VIN_DATA_PIN_GROUP() macro; we thus can move them into the shared header file...
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.
Changes in version 3:
- added a comment to the common header file;
- added Laurent's ACK.
Changes in version 2:
- removed leftover empty line from the R8A7790 driver;
- added Geert's ACK.
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 19 ------------------- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 18 ------------------ drivers/pinctrl/sh-pfc/sh_pfc.h | 23 +++++++++++++++++++++++ 3 files changed, 23 insertions(+), 37 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3624,25 +3624,6 @@ static const unsigned int usb2_pins[] static const unsigned int usb2_mux[] = {
USB2_PWEN_MARK, USB2_OVC_MARK,
};
-
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
- unsigned int data4[4];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -3986,24 +3986,6 @@ static const unsigned int usb1_mux[] = {
USB1_PWEN_MARK,
USB1_OVC_MARK,
};
-
-union vin_data {
- unsigned int data24[24];
- unsigned int data20[20];
- unsigned int data16[16];
- unsigned int data12[12];
- unsigned int data10[10];
- unsigned int data8[8];
-};
-
-#define VIN_DATA_PIN_GROUP(n, s) \
- { \
- .name = #n#s, \
- .pins = n##_pins.data##s, \
- .mux = n##_mux.data##s, \
- .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
- }
-
/* - VIN0 ------------------------------------------------------------------- */ static const union vin_data vin0_data_pins = {
.data24 = {
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h +++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -52,6 +52,29 @@ struct sh_pfc_pin_group {
unsigned int nr_pins;
};
+/*
+ * Using union vin_data saves memory occupied by the VIN data pins.
+ * VIN_DATA_PIN_GROUP() is a macro used to describe the VIN pin groups
+ * in this case.
+ */
+#define VIN_DATA_PIN_GROUP(n, s) \
+ { \
+ .name = #n#s, \
+ .pins = n##_pins.data##s, \
+ .mux = n##_mux.data##s, \
+ .nr_pins = ARRAY_SIZE(n##_pins.data##s), \
+ }
+
+union vin_data {
+ unsigned int data24[24];
+ unsigned int data20[20];
+ unsigned int data16[16];
+ unsigned int data12[12];
+ unsigned int data10[10];
+ unsigned int data8[8];
+ unsigned int data4[4];
+};
+
#define SH_PFC_FUNCTION(n) \
{ \
.name = #n, \
PATCH v4 1/1 pinctrl: sh-pfc: r8a7794: add VIN pin groups
In reply to Sergei ShtylyovFrom: Koji Matsuoka <[email protected]>
Add VIN0/1 pin groups to R8A7794 PFC driver.
Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "vin1_data10" pin group, used 'union vin_data' and VIN_DATA_PIN_GROUP() macro to describe VIN1 pins, reversed the order of the VIN1 pin groups, removed unneeded empty lines, fixed VIN1 separator comment.
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo. It depends on the patch moving 'union vin_data' to shared header file in order to build.
Changes in version 4:
- made use of the 'union vin_data' and VIN_DATA_PIN_GROUP() macro to describe the VIN1 pins;
- listed the VIN1 data pin groups in reverse order;
- removed empty lines before VIN0/1 pin data;
- fixed the VIN1 separator comment.
Changes in version 3:
- added "vin1_data10" pin group.
Changes in version 2:
- relied on the 'struct vin_data' and #define VIN_DATA_PIN_GROUP() moved to the common header file;
- added to the VI1_DATA8/9/10/11 pin group VI1_DATA[0-7] pins and renamed/moved this pin group.
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 184 +++++++++++++++++++++++++++++++++++ 1 file changed, 184 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7794.c +184 -0
@@ -2774,6 +2774,146 @@ static const unsigned int usb1_mux[] = {USB1_PWEN_MARK , USB1_OVC_MARK, }; +/* - VIN0 ------------------------------------------------------------------- */ +static const union vin_data vin0_data_pins = { + .data24 = { +/* B */ +RCAR_GP_PIN (3 ,1 ),RCAR_GP_PIN (3 ,2 ), +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,13 ),RCAR_GP_PIN (3 ,14 ), +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,21 ),RCAR_GP_PIN (3 ,22 ), +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), + }, +}; +static const union vin_data vin0_data_mux = { + .data24 = { +/* B */ +VI0_DATA0_VI0_B0_MARK ,VI0_DATA1_VI0_B1_MARK , +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G0_MARK ,VI0_G1_MARK , +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R0_MARK ,VI0_R1_MARK , +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , + }, +}; +static const unsigned int vin0_data18_pins[] = { +/* B */ +RCAR_GP_PIN (3 ,3 ),RCAR_GP_PIN (3 ,4 ), +RCAR_GP_PIN (3 ,5 ),RCAR_GP_PIN (3 ,6 ), +RCAR_GP_PIN (3 ,7 ),RCAR_GP_PIN (3 ,8 ), +/* G */ +RCAR_GP_PIN (3 ,15 ),RCAR_GP_PIN (3 ,16 ), +RCAR_GP_PIN (3 ,17 ),RCAR_GP_PIN (3 ,18 ), +RCAR_GP_PIN (3 ,19 ),RCAR_GP_PIN (3 ,20 ), +/* R */ +RCAR_GP_PIN (3 ,23 ),RCAR_GP_PIN (3 ,24 ), +RCAR_GP_PIN (3 ,25 ),RCAR_GP_PIN (3 ,26 ), +RCAR_GP_PIN (3 ,27 ),RCAR_GP_PIN (3 ,28 ), +}; +static const unsigned int vin0_data18_mux[] = { +/* B */ +VI0_DATA2_VI0_B2_MARK ,VI0_DATA3_VI0_B3_MARK , +VI0_DATA4_VI0_B4_MARK ,VI0_DATA5_VI0_B5_MARK , +VI0_DATA6_VI0_B6_MARK ,VI0_DATA7_VI0_B7_MARK , +/* G */ +VI0_G2_MARK ,VI0_G3_MARK , +VI0_G4_MARK ,VI0_G5_MARK , +VI0_G6_MARK ,VI0_G7_MARK , +/* R */ +VI0_R2_MARK ,VI0_R3_MARK , +VI0_R4_MARK ,VI0_R5_MARK , +VI0_R6_MARK ,VI0_R7_MARK , +}; +static const unsigned int vin0_sync_pins[] = { +RCAR_GP_PIN (3 ,11 ),/* HSYNC */ +RCAR_GP_PIN (3 ,12 ),/* VSYNC */ +}; +static const unsigned int vin0_sync_mux[] = { +VI0_HSYNC_N_MARK , +VI0_VSYNC_N_MARK , +}; +static const unsigned int vin0_field_pins[] = { +RCAR_GP_PIN (3 ,10 ), +}; +static const unsigned int vin0_field_mux[] = { +VI0_FIELD_MARK , +}; +static const unsigned int vin0_clkenb_pins[] = { +RCAR_GP_PIN (3 ,9 ), +}; +static const unsigned int vin0_clkenb_mux[] = { +VI0_CLKENB_MARK , +}; +static const unsigned int vin0_clk_pins[] = { +RCAR_GP_PIN (3 ,0 ), +}; +static const unsigned int vin0_clk_mux[] = { +VI0_CLK_MARK , +}; +/* - VIN1 ------------------------------------------------------------------- */ +static const union vin_data vin1_data_pins = { + .data12 = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,13 ), +RCAR_GP_PIN (5 ,14 ),RCAR_GP_PIN (5 ,15 ), +RCAR_GP_PIN (5 ,16 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ), +RCAR_GP_PIN (1 ,10 ),RCAR_GP_PIN (1 ,11 ), +RCAR_GP_PIN (1 ,12 ),RCAR_GP_PIN (1 ,13 ), + }, +}; +static const union vin_data vin1_data_mux = { + .data12 = { +VI1_DATA0_MARK ,VI1_DATA1_MARK , +VI1_DATA2_MARK ,VI1_DATA3_MARK , +VI1_DATA4_MARK ,VI1_DATA5_MARK , +VI1_DATA6_MARK ,VI1_DATA7_MARK , +VI1_DATA8_MARK ,VI1_DATA9_MARK , +VI1_DATA10_MARK ,VI1_DATA11_MARK , + }, +}; +static const unsigned int vin1_sync_pins[] = { +RCAR_GP_PIN (5 ,22 ),/* HSYNC */ +RCAR_GP_PIN (5 ,23 ),/* VSYNC */ +}; +static const unsigned int vin1_sync_mux[] = { +VI1_HSYNC_N_MARK , +VI1_VSYNC_N_MARK , +}; +static const unsigned int vin1_field_pins[] = { +RCAR_GP_PIN (5 ,21 ), +}; +static const unsigned int vin1_field_mux[] = { +VI1_FIELD_MARK , +}; +static const unsigned int vin1_clkenb_pins[] = { +RCAR_GP_PIN (5 ,20 ), +}; +static const unsigned int vin1_clkenb_mux[] = { +VI1_CLKENB_MARK , +}; +static const unsigned int vin1_clk_pins[] = { +RCAR_GP_PIN (5 ,11 ), +}; +static const unsigned int vin1_clk_mux[] = { +VI1_CLK_MARK , +};static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(eth_link),
@@ -2949,6 +3089,24 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (sdhi2_wp),SH_PFC_PIN_GROUP (usb0),SH_PFC_PIN_GROUP (usb1), +VIN_DATA_PIN_GROUP (vin0_data,24 ), +VIN_DATA_PIN_GROUP (vin0_data,20 ), +SH_PFC_PIN_GROUP (vin0_data18), +VIN_DATA_PIN_GROUP (vin0_data,16 ), +VIN_DATA_PIN_GROUP (vin0_data,12 ), +VIN_DATA_PIN_GROUP (vin0_data,10 ), +VIN_DATA_PIN_GROUP (vin0_data,8 ), +SH_PFC_PIN_GROUP (vin0_sync), +SH_PFC_PIN_GROUP (vin0_field), +SH_PFC_PIN_GROUP (vin0_clkenb), +SH_PFC_PIN_GROUP (vin0_clk), +VIN_DATA_PIN_GROUP (vin1_data,12 ), +VIN_DATA_PIN_GROUP (vin1_data,10 ), +VIN_DATA_PIN_GROUP (vin1_data,8 ), +SH_PFC_PIN_GROUP (vin1_sync), +SH_PFC_PIN_GROUP (vin1_field), +SH_PFC_PIN_GROUP (vin1_clkenb), + SH_PFC_PIN_GROUP(vin1_clk), }; static const char * const eth_groups[] = {
@@ -3229,6 +3387,30 @@ static const char * const usb1_groups[] "usb1", }; +static const char *const vin0_groups[] = { +"vin0_data24" , +"vin0_data20" , +"vin0_data18" , +"vin0_data16" , +"vin0_data12" , +"vin0_data10" , +"vin0_data8" , +"vin0_sync" , +"vin0_field" , +"vin0_clkenb" , +"vin0_clk" , +}; + +static const char *const vin1_groups[] = { +"vin1_data12" , +"vin1_data10" , +"vin1_data8" , +"vin1_sync" , +"vin1_field" , +"vin1_clkenb" , +"vin1_clk" , +}; +static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (eth),SH_PFC_FUNCTION (hscif0),
@@ -3265,6 +3447,8 @@ static const struct sh_pfc_function pinmSH_PFC_FUNCTION (sdhi2),SH_PFC_FUNCTION (usb0 ),SH_PFC_FUNCTION (usb1 ), +SH_PFC_FUNCTION (vin0 ), + SH_PFC_FUNCTION(vin1), };static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PATCH 1/1 pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
In reply to Sergei ShtylyovAdd the EtherAVB pin groups to the R8A7791 PFC driver.
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 92 +++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+)
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +92 -0
@@ -1740,6 +1740,82 @@ static const unsigned int audio_clkout_m AUDIO_CLKOUT_MARK, }; +/* - AVB -------------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = { +RCAR_GP_PIN (5 ,14 ), +}; +static const unsigned int avb_link_mux[] = { +AVB_LINK_MARK , +}; +static const unsigned int avb_magic_pins[] = { +RCAR_GP_PIN (5 ,11 ), +}; +static const unsigned int avb_magic_mux[] = { +AVB_MAGIC_MARK , +}; +static const unsigned int avb_phy_int_pins[] = { +RCAR_GP_PIN (5 ,16 ), +}; +static const unsigned int avb_phy_int_mux[] = { +AVB_PHY_INT_MARK , +}; +static const unsigned int avb_mdio_pins[] = { +RCAR_GP_PIN (5 ,12 ),RCAR_GP_PIN (5 ,9 ), +}; +static const unsigned int avb_mdio_mux[] = { +AVB_MDC_MARK ,AVB_MDIO_MARK , +}; +static const unsigned int avb_mii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_mii_mux[] = { +AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK , +AVB_RXD3_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_TX_EN_MARK ,AVB_TX_CLK_MARK , +AVB_COL_MARK , +}; +static const unsigned int avb_gmii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ),RCAR_GP_PIN (5 ,22 ),RCAR_GP_PIN (5 ,23 ), +RCAR_GP_PIN (5 ,24 ),RCAR_GP_PIN (5 ,25 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ),RCAR_GP_PIN (5 ,4 ),RCAR_GP_PIN (5 ,5 ), +RCAR_GP_PIN (5 ,6 ),RCAR_GP_PIN (5 ,7 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,30 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,27 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_gmii_mux[] = { +AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK ,AVB_TXD4_MARK ,AVB_TXD5_MARK , +AVB_TXD6_MARK ,AVB_TXD7_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK , +AVB_RXD3_MARK ,AVB_RXD4_MARK ,AVB_RXD5_MARK , +AVB_RXD6_MARK ,AVB_RXD7_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_GTX_CLK_MARK ,AVB_GTXREFCLK_MARK , +AVB_TX_EN_MARK ,AVB_TX_ER_MARK ,AVB_TX_CLK_MARK , +AVB_COL_MARK , +}; +/* - CAN -------------------------------------------------------------------- */ static const unsigned int can0_data_pins[] = {
@@ -4258,6 +4334,12 @@ static const struct sh_pfc_pin_group pinSH_PFC_PIN_GROUP (audio_clk_b_b),SH_PFC_PIN_GROUP (audio_clk_c),SH_PFC_PIN_GROUP (audio_clkout), +SH_PFC_PIN_GROUP (avb_link), +SH_PFC_PIN_GROUP (avb_magic), +SH_PFC_PIN_GROUP (avb_phy_int), +SH_PFC_PIN_GROUP (avb_mdio), +SH_PFC_PIN_GROUP (avb_mii), +SH_PFC_PIN_GROUP (avb_gmii),SH_PFC_PIN_GROUP (can0_data),SH_PFC_PIN_GROUP (can0_data_b), SH_PFC_PIN_GROUP(can0_data_c),
@@ -4597,6 +4679,15 @@ static const char * const audio_clk_grou "audio_clkout", }; +static const char *const avb_groups[] = { +"avb_link" , +"avb_magic" , +"avb_phy_int" , +"avb_mdio" , +"avb_mii" , +"avb_gmii" , +}; +static const char *const can0_groups[] = {"can0_data" ,"can0_data_b" ,
@@ -5081,6 +5172,7 @@ static const char * const vin2_groups[]static const struct sh_pfc_function pinmux_functions[] = {SH_PFC_FUNCTION (audio_clk), +SH_PFC_FUNCTION (avb),SH_PFC_FUNCTION (can0),SH_PFC_FUNCTION (can1),SH_PFC_FUNCTION (du),
Re: [PATCH] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Hi Sergei,
Quoted 1 line · Sergei Shtylyov
Add the EtherAVB pin groups to the R8A7791 PFC driver.
Thanks for your patch!
Quoted 12 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +12
-0+static const unsigned int avb_mii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_mii_mux[] = {
drivers/pinctrl/sh-pfc/pfc-r8a7791.c static const unsigned int audio_clkout_m · line 1789
Quoted 10 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +10
-0+AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK , +AVB_RXD3_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_TX_EN_MARK ,AVB_TX_CLK_MARK , + AVB_COL_MARK, +};
The MII pin list include RX_ER, but not TX_ER...
Quoted 18 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +18
-0+static const unsigned int avb_gmii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ),RCAR_GP_PIN (5 ,22 ),RCAR_GP_PIN (5 ,23 ), +RCAR_GP_PIN (5 ,24 ),RCAR_GP_PIN (5 ,25 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ),RCAR_GP_PIN (5 ,4 ),RCAR_GP_PIN (5 ,5 ), +RCAR_GP_PIN (5 ,6 ),RCAR_GP_PIN (5 ,7 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,30 ),RCAR_GP_PIN (5 ,17 ), +RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,27 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_gmii_mux[] = { +AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK ,AVB_TXD4_MARK ,AVB_TXD5_MARK , +AVB_TXD6_MARK ,AVB_TXD7_MARK ,
drivers/pinctrl/sh-pfc/pfc-r8a7791.c static const unsigned int audio_clkout_m · line 1817
Quoted 10 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +10
-0+ +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK , +AVB_RXD3_MARK ,AVB_RXD4_MARK ,AVB_RXD5_MARK , +AVB_RXD6_MARK ,AVB_RXD7_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_GTX_CLK_MARK ,AVB_GTXREFCLK_MARK , +AVB_TX_EN_MARK ,AVB_TX_ER_MARK ,AVB_TX_CLK_MARK , + AVB_COL_MARK, +};
... while the GMII pin list includes both RX_ER and TX_ER. Is that correct? Should it be the other way around?
Section "45A.3.13.1 MII Frame Transmission/Reception Timing" of the R-Car Gen2 datasheet shows timing diagrams for both AVB_TX_ER and AVB_RX_ER, so I'd expect both pins to be needed for MII.
Unfortunately Section "45A.3.13.2 GMII Frame Reception Timing" shows timing diagrams for receive only (thus involving AVB_RX_ER only), so I'm not sure the AVB_TX_ER pin is actually needed for GMII.
I don't have schematics for any R-Car Gen2 board that has AVB support, so I can't check myself how the MII/GMII is really wired.
Note that this also applies to the existing AVB pinmux data in pfc-r8a7790.c.
Can you please check/clarify? I'm not an Ethernet PHY expert.
Thanks again!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Hello.
Quoted 20 lines · Geert Uytterhoeven
Quoted 1 line
Add the EtherAVB pin groups to the R8A7791 PFC driver.
Thanks for your patch!
Quoted 16 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +16
-0+static const unsigned int avb_mii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_mii_mux[] = { +AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK ,
Quoted 8 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c static const unsigned int audio_clkout_m · line 1789
Quoted 6 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +6
-0+AVB_RXD3_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_TX_EN_MARK ,AVB_TX_CLK_MARK , + AVB_COL_MARK, +};The MII pin list include
RX_ER, but notTX_ER...
Wikipedia tells me TX_ER is optional for MII.
Quoted 6 lines
... while the GMII pin list includes both
RX_ERandTX_ER. Is that correct? Should it be the other way around?Section "45A.3.13.1 MII Frame Transmission/Reception Timing" of the R-Car Gen2 datasheet shows timing diagrams for both
AVB_TX_ERandAVB_RX_ER, so I'd expect both pins to be needed for MII.
Hm, interesting...
Quoted 3 lines
Unfortunately Section "45A.3.13.2 GMII Frame Reception Timing" shows timing diagrams for receive only (thus involving
AVB_RX_ERonly), so I'm not sure theAVB_TX_ERpin is actually needed for GMII.
It is.
Quoted 2 lines
I don't have schematics for any R-Car Gen2 board that has AVB support, so I can't check myself how the MII/GMII is really wired.
The standard Lager/Porter boards require some modification to use an an
AVB daughter board, AFAIK.
Quoted 1 line
Note that this also applies to the existing AVB pinmux data in
pfc-r8a7790.c.
And we haven't really tested MII, only GMII.
[...]
Quoted 3 lines
Gr{oetje,eeting}s,
Geert
MBR, Sergei
Re: [PATCH] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Hi Sergei,
Quoted 30 lines · Sergei Shtylyov
Quoted 20 lines · Geert Uytterhoeven
Quoted 1 line
Add the EtherAVB pin groups to the R8A7791 PFC driver.
Thanks for your patch!
Quoted 16 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +16
-0+static const unsigned int avb_mii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_mii_mux[] = { +AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK ,Quoted 8 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c static const unsigned int audio_clkout_m · line 1789
Quoted 6 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +6
-0+AVB_RXD3_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_TX_EN_MARK ,AVB_TX_CLK_MARK , + AVB_COL_MARK, +};The MII pin list include
RX_ER, but notTX_ER...
Quoted 1 line
Wikipedia tells me
TX_ERis optional for MII.
OK. So it may make sense to have a separate pinmux group for it.
BTW, I've just noticed the R-Car Gen2 sh_eth Ethernet (which does 10/100 only) doesn't have the pin.
Quoted 13 lines
Quoted 9 lines
... while the GMII pin list includes both
RX_ERandTX_ER. Is that correct?
Should it be the other way around?Section "45A.3.13.1 MII Frame Transmission/Reception Timing" of the R-Car Gen2
datasheet shows timing diagrams for bothAVB_TX_ERandAVB_RX_ER, so I'd expect
both pins to be needed for MII.Hm, interesting...
Quoted 7 lines
Quoted 5 lines
Unfortunately Section "45A.3.13.2 GMII Frame Reception Timing" shows timing
diagrams for receive only (thus involvingAVB_RX_ERonly), so I'm not sure theAVB_TX_ERpin is actually needed for GMII.It is.
OK.
Quoted 6 lines
Quoted 3 lines
I don't have schematics for any R-Car Gen2 board that has AVB support, so I
can't check myself how the MII/GMII is really wired.The standard Lager/Porter boards require some modification to use an an
AVB daughter board, AFAIK.
Do you have schematics for those?
Quoted 4 lines
Quoted 2 lines
Note that this also applies to the existing AVB pinmux data in
pfc-r8a7790.c.And we haven't really tested MII, only GMII.
So I guess the daughterboard uses both RX_ER and TX_ER?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Quoted 29 lines · Geert Uytterhoeven
Quoted 29 lines
Quoted 28 lines
Quoted 1 line
Add the EtherAVB pin groups to the R8A7791 PFC driver.
Thanks for your patch!
Quoted 12 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +12
-0+static const unsigned int avb_mii_pins[] = { +RCAR_GP_PIN (5 ,18 ),RCAR_GP_PIN (5 ,19 ),RCAR_GP_PIN (5 ,20 ), +RCAR_GP_PIN (5 ,21 ), + +RCAR_GP_PIN (5 ,0 ),RCAR_GP_PIN (5 ,1 ),RCAR_GP_PIN (5 ,2 ), +RCAR_GP_PIN (5 ,3 ), + +RCAR_GP_PIN (5 ,8 ),RCAR_GP_PIN (5 ,13 ),RCAR_GP_PIN (5 ,10 ), +RCAR_GP_PIN (5 ,15 ),RCAR_GP_PIN (5 ,26 ),RCAR_GP_PIN (5 ,28 ), +RCAR_GP_PIN (5 ,29 ), +}; +static const unsigned int avb_mii_mux[] = {drivers/pinctrl/sh-pfc/pfc-r8a7791.c static const unsigned int audio_clkout_m · line 1789
Quoted 10 lines
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +10
-0+AVB_TXD0_MARK ,AVB_TXD1_MARK ,AVB_TXD2_MARK , +AVB_TXD3_MARK , + +AVB_RXD0_MARK ,AVB_RXD1_MARK ,AVB_RXD2_MARK , +AVB_RXD3_MARK , + +AVB_RX_ER_MARK ,AVB_RX_CLK_MARK ,AVB_RX_DV_MARK , +AVB_CRS_MARK ,AVB_TX_EN_MARK ,AVB_TX_CLK_MARK , + AVB_COL_MARK, +};The MII pin list include
RX_ER, but notTX_ER...
Quoted 3 lines
Quoted 1 line
Wikipedia tells me
TX_ERis optional for MII.OK. So it may make sense to have a separate pinmux group for it.
Hm... since this is MAC-to-PHY signal, I'd prefer just adding it to the
MII group... but you may have a point here.
Quoted 2 lines
BTW, I've just noticed the R-Car Gen2
sh_ethEthernet (which does 10/100 only) doesn't have the pin.
Th EtherMAC only support RMII which doesn't have this signal at all.
Quoted 12 lines
Quoted 11 lines
Quoted 9 lines
... while the GMII pin list includes both
RX_ERandTX_ER. Is that correct?
Should it be the other way around?Section "45A.3.13.1 MII Frame Transmission/Reception Timing" of the R-Car Gen2
datasheet shows timing diagrams for bothAVB_TX_ERandAVB_RX_ER, so I'd expect
both pins to be needed for MII.Hm, interesting...
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
I don't have schematics for any R-Car Gen2 board that has AVB support, so I
can't check myself how the MII/GMII is really wired.The standard Lager/Porter boards require some modification to use an an
AVB daughter board, AFAIK.Do you have schematics for those?
Daughterboards, you mean? Yes. There are 2 of them, one with Gigabit PHY,
the other with 100 Mbit one (I don't have that one and haven't tested it).
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines
Note that this also applies to the existing AVB pinmux data in
pfc-r8a7790.c.And we haven't really tested MII, only GMII.
So I guess the daughterboard uses both
RX_ERandTX_ER?
Yes, for the one with Gigabit PHY and no, for the one with 100 Mbit (that
one doesn't even seem to have RX_ER connected to anything).
Quoted 3 lines
Gr{oetje,eeting}s,
Geert
MBR, Sergei
Re: [PATCH] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Quoted 4 lines · Sergei Shtylyov
Quoted 1 line
So I guess the daughterboard uses both
RX_ERandTX_ER?Yes, for the one with Gigabit PHY and no, for the one with 100 Mbit (that
one doesn't even seem to haveRX_ERconnected to anything).
Which means the pin could be used for something else, modulo the fact that it's part of the avb_mii group, and thus configured for avb...
Thanks for checking!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH v2 1/1 pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
In reply to Sergei ShtylyovAdd the EtherAVB pin groups to the R8A7791 PFC driver.
Also add the copyright for all the Cogent Embedded's past work on this file.
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.
Changes in version 2:
- added AVB_TX_ER pin to the AVB MII group;
- added Cogent Embedded's copyright;
- refreshed the patch.
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 93 +++++++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c =================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -2,6 +2,7 @@
* r8a7791 processor support - PFC hardware block.
*
* Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2014-2015 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
@@ -1725,6 +1726,82 @@ static const unsigned int audio_clkout_m
AUDIO_CLKOUT_MARK,
};
+/* - AVB -------------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = {
+ RCAR_GP_PIN(5, 14),
+};
+static const unsigned int avb_link_mux[] = {
+ AVB_LINK_MARK,
+};
+static const unsigned int avb_magic_pins[] = {
+ RCAR_GP_PIN(5, 11),
+};
+static const unsigned int avb_magic_mux[] = {
+ AVB_MAGIC_MARK,
+};
+static const unsigned int avb_phy_int_pins[] = {
+ RCAR_GP_PIN(5, 16),
+};
+static const unsigned int avb_phy_int_mux[] = {
+ AVB_PHY_INT_MARK,
+};
+static const unsigned int avb_mdio_pins[] = {
+ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 9),
+};
+static const unsigned int avb_mdio_mux[] = {
+ AVB_MDC_MARK, AVB_MDIO_MARK,
+};
+static const unsigned int avb_mii_pins[] = {
+ RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20),
+ RCAR_GP_PIN(5, 21),
+
+ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+ RCAR_GP_PIN(5, 3),
+
+ RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 10),
+ RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27),
+ RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 29),
+};
+static const unsigned int avb_mii_mux[] = {
+ AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+ AVB_TXD3_MARK,
+
+ AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+ AVB_RXD3_MARK,
+
+ AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+ AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK,
+ AVB_TX_CLK_MARK, AVB_COL_MARK,
+};
+static const unsigned int avb_gmii_pins[] = {
+ RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20),
+ RCAR_GP_PIN(5, 21), RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23),
+ RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+
+ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+ RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5),
+ RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7),
+
+ RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 10),
+ RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 17),
+ RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), RCAR_GP_PIN(5, 28),
+ RCAR_GP_PIN(5, 29),
+};
+static const unsigned int avb_gmii_mux[] = {
+ AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+ AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK,
+ AVB_TXD6_MARK, AVB_TXD7_MARK,
+
+ AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+ AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK,
+ AVB_RXD6_MARK, AVB_RXD7_MARK,
+
+ AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+ AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK,
+ AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK,
+ AVB_COL_MARK,
+};
+
/* - CAN -------------------------------------------------------------------- */
static const unsigned int can0_data_pins[] = {
@@ -4260,6 +4337,12 @@ static const struct sh_pfc_pin_group pin
SH_PFC_PIN_GROUP(audio_clk_b_b), SH_PFC_PIN_GROUP(audio_clk_c), SH_PFC_PIN_GROUP(audio_clkout),
+ SH_PFC_PIN_GROUP(avb_link),
+ SH_PFC_PIN_GROUP(avb_magic),
+ SH_PFC_PIN_GROUP(avb_phy_int),
+ SH_PFC_PIN_GROUP(avb_mdio),
+ SH_PFC_PIN_GROUP(avb_mii),
+ SH_PFC_PIN_GROUP(avb_gmii),
SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can0_data_c),
@@ -4601,6 +4684,15 @@ static const char * const audio_clk_grou
"audio_clkout",
};
+static const char * const avb_groups[] = {
+ "avb_link",
+ "avb_magic",
+ "avb_phy_int",
+ "avb_mdio",
+ "avb_mii",
+ "avb_gmii",
+};
+
static const char * const can0_groups[] = {
"can0_data",
"can0_data_b",
@@ -5090,6 +5182,7 @@ static const char * const vin2_groups[]
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(du),
Re: [PATCH v2] pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Quoted 5 lines · Sergei Shtylyov
Add the EtherAVB pin groups to the R8A7791 PFC driver.
Also add the copyright for all the Cogent Embedded's past work on this file.
Signed-off-by Sergei Shtylyov <[email protected]>
Thank you, queued for v4.5.
Quoted 7 lines
---
The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo.Changes in version 2:
- addedAVB_TX_ERpin to the AVB MII group;
- added Cogent Embedded's copyright;
- refreshed the patch.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds