intel: Add support for (possibly) unsynchronized maps.
PATCH 1/1 intel: Add support for (possibly) unsynchronized maps.
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path in GL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
--- intel/intel_bufmgr.h | 2 + intel/intel_bufmgr_gem.c | 72 +++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 67 insertions(+), 7 deletions(-)
intel/intel_bufmgr.h +2 -0
@@ -148,8 +148,10 @@ void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);void drm_intel_bufmgr_gem_enable_fenced_relocs (drm_intel_bufmgr *bufmgr);void drm_intel_bufmgr_gem_set_vma_cache_size (drm_intel_bufmgr *bufmgr,int limit); +int drm_intel_gem_bo_map_unsynchronized (drm_intel_bo *bo);int drm_intel_gem_bo_map_gtt (drm_intel_bo *bo);int drm_intel_gem_bo_unmap_gtt (drm_intel_bo *bo); +int drm_intel_gem_bo_get_reloc_count (drm_intel_bo *bo);void drm_intel_gem_bo_clear_relocs (drm_intel_bo *bo,int start);void drm_intel_gem_bo_start_gtt_access (drm_intel_bo *bo,int write_enable);
intel/intel_bufmgr_gem.c +65 -7
107 lines not on this page · raw message
Signature · 1 line
1.7.9.1
PATCH 1/1 intel: Make use of the new GPU-unsynchronized map functionality in libdrm.
Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
DO NOT PUSH: need to depend on a new libdrm release first.
--- src/mesa/drivers/dri/intel/intel_buffer_objects.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
src/mesa/drivers/dri/intel/intel_buffer_objects.c +3 -1
@@ -367,7 +367,9 @@ intel_bufferobj_map_range(struct gl_context * ctx,return obj->Pointer; } -if (!(access &GL_MAP_READ_BIT )) { +if (access &GL_MAP_UNSYNCHRONIZED_BIT ) +drm_intel_gem_bo_map_unsynchronized (intel_obj->buffer); +else if (!(access &GL_MAP_READ_BIT )) {drm_intel_gem_bo_map_gtt (intel_obj->buffer); }else {drm_intel_bo_map (intel_obj->buffer, (access &GL_MAP_WRITE_BIT ) !=0 );
Signature · 1 line
1.7.9.1
Quoted 3 lines · Eric Anholt
This improves the performance of Mesa's
GL_MAP_UNSYNCHRONIZED_BITpath inGL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
Oh well, weakly coherent wins.
-Chris
Signature · 1 line
Chris Wilson, Intel Open Source Technology Centre
Dear Eric,
Am Freitag, den 24.02.2012, 19:53 -0800 schrieb Eric Anholt:
[…]
Quoted 3 lines
+/**
+ * Performs a mapping of the buffer object like the normal GTT
+ * mapping, but avoiding waiting for the GPU to be done reading from
s/avoiding/avoids/?
intel/intel_bufmgr_gem.c int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) · line 1268
Quoted 12 lines
+ * or rendering to the buffer.
+ *
+ * This is used in the implementation ofGL_ARB_map_buffer_range: The
+ * user asks to create a buffer, then does a mapping, fills some
+ * space, runs a drawing command, then asks to map it again without
+ * synchronizing because it guarantees that it won't write over the
+ * data that the GPU is busy using (or, more specifically, that if it
+ * does write over the data, it acknowledges that rendering is
+ * undefined).
+ */intel/intel_bufmgr_gem.c +2
-0+ +int drm_intel_gem_bo_map_unsynchronized (drm_intel_bo *bo)
[…]
Thanks,
Paul
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 4 lines · Eric Anholt
This improves the performance of Mesa's
GL_MAP_UNSYNCHRONIZED_BITpath inGL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
---
A few questions:
- iirc Ben's non-blocking stuff also worked for non-llc machines - I guess you haven't looked into this because we don't have a non-llc platform that runs ungine?
- in my pwrite experience, writing through cpu maps beats writing through the gtt on llc machines. This has the added benefit that it reduces pressure on the mappable gtt. Have you tried that, too?
Cheers, Daniel
Signature · 3 lines
Daniel Vetter Mail: [email protected] Mobile: +41 (0)79 365 57 48
Quoted 3 lines · Daniel Vetter
- in my pwrite experience, writing through cpu maps beats writing through the gtt on llc machines. This has the added benefit that it reduces pressure on the mappable gtt. Have you tried that, too?
Speaking of which, those wonderful pwrite patches are still MIA? -Chris
Signature · 1 line
Chris Wilson, Intel Open Source Technology Centre
Quoted 10 lines · Daniel Vetter
Quoted 4 lines · Eric Anholt
This improves the performance of Mesa's
GL_MAP_UNSYNCHRONIZED_BITpath inGL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
---A few questions:
- iirc Ben's non-blocking stuff also worked for non-llc machines - I guess you haven't looked into this because we don't have a non-llc platform that runs ungine?
Tropics works on Ironlake, too, it's just slow. Haven't tried earlier.
Quoted 5 lines
- in my pwrite experience, writing through cpu maps beats writing through the gtt on llc machines. This has the added benefit that it reduces pressure on the mappable gtt. Have you tried that, too?
Cheers, Daniel
Quoted 7 lines · On Sun, 26 Feb 2012 12:28:09 -0800 Kenneth Graunke <[email protected]>…
Quoted 6 lines · Daniel Vetter
Quoted 4 lines · Eric Anholt
This improves the performance of Mesa's
GL_MAP_UNSYNCHRONIZED_BITpath inGL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
---
Quoted 6 lines
Quoted 4 lines
A few questions:
- iirc Ben's non-blocking stuff also worked for non-llc machines - I guess you haven't looked into this because we don't have a non-llc platform that runs ungine?Tropics works on Ironlake, too, it's just slow. Haven't tried earlier.
iirc, Eric even started to review those patches.
Quoted 10 lines · Daniel Vetter
Quoted 4 lines · Eric Anholt
This improves the performance of Mesa's
GL_MAP_UNSYNCHRONIZED_BITpath inGL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 2.06236% +/- 0.50272% (n=11).
---A few questions:
- iirc Ben's non-blocking stuff also worked for non-llc machines - I guess you haven't looked into this because we don't have a non-llc platform that runs ungine?
I gave up on Ben's non-blocking stuff for being way too many patches all smashed into one. I wanted a simple fix that could be extended later if other apps have other problems, while completely fixing this app (a ~21ms wait shortly after starting a new frame).
Quoted 3 lines
- in my pwrite experience, writing through cpu maps beats writing through the gtt on llc machines. This has the added benefit that it reduces pressure on the mappable gtt. Have you tried that, too?
I haven't played with that, but it would be fun to at some point once we get there. Right now, the CPU overhead of the app isn't in this path.
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH 1/2 intel: Fix error check for I915_PARAM_HAS_LLC.
In reply to Eric AnholtdrmIoctl returns -1 on error with errno set to the error value. Other users of it in this file just check for != 0, and only use errno when they need to send an error value on to the caller of the API.
--- intel/intel_bufmgr_gem.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
intel/intel_bufmgr_gem.c +1 -1
@@ -2410,7 +2410,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) gp.param =I915_PARAM_HAS_LLC ; ret =drmIoctl (bufmgr_gem->fd,DRM_IOCTL_I915_GETPARAM , &gp); -if (ret == -EINVAL ) { +if (ret !=0 ) {/* Kernel does not supports HAS_LLC query, fallback to GPU * generation detection and assume that we have LLC on GEN6/7 */
Signature · 1 line
1.7.9.1
PATCH 2/2 intel: Add support for (possibly) unsynchronized maps.
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path in GL_ARB_map_buffer_range. Improves Unigine Tropics performance at 1024x768 by 0.958822% +/- 0.118466% (n=48).
v2: Fix comment grammar.
---
Updated commit message for retesting on the previous commit. It turns out last time I tested against 3 mesa commits, the first of which was a 2% win and the drm change (once I'd fixed it up to skip !LLC) didn't work. With the LLC detection fix in place, the new numbers are for the single incremental Mesa commit to use this feature, and it was confirmed to avoid blocking entirely according to perf.
intel/intel_bufmgr.h | 2 + intel/intel_bufmgr_gem.c | 72 +++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 67 insertions(+), 7 deletions(-)
intel/intel_bufmgr.h +2 -0
@@ -148,8 +148,10 @@ void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);void drm_intel_bufmgr_gem_enable_fenced_relocs (drm_intel_bufmgr *bufmgr);void drm_intel_bufmgr_gem_set_vma_cache_size (drm_intel_bufmgr *bufmgr,int limit); +int drm_intel_gem_bo_map_unsynchronized (drm_intel_bo *bo);int drm_intel_gem_bo_map_gtt (drm_intel_bo *bo);int drm_intel_gem_bo_unmap_gtt (drm_intel_bo *bo); +int drm_intel_gem_bo_get_reloc_count (drm_intel_bo *bo);void drm_intel_gem_bo_clear_relocs (drm_intel_bo *bo,int start);void drm_intel_gem_bo_start_gtt_access (drm_intel_bo *bo,int write_enable);
intel/intel_bufmgr_gem.c +65 -7
107 lines not on this page · raw message
Signature · 1 line
1.7.9.1