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mx25: add CPU revision 1.2

PATCH New Eric Bénard 3 participants 7 messages Sep 23, 2012 – Sep 25, 2012

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#0 lore raw

PATCH v2 1/2 mx25: add CPU revision 1.2

tested on a MCIMX257CJM4A which now reports :
CPU: Freescale i.MX25 rev1.2 at 399 MHz

---
v2 : rebased against 2012.10-rc1, added Otavio's ack

 arch/arm/cpu/arm926ejs/mx25/generic.c     |    3 +++
 arch/arm/include/asm/arch-mx25/imx-regs.h |    1 +
 2 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +3 -0
index a5c15ce..3b7f327 100644
@@ -140,6 +140,9 @@ u32 get_cpu_rev(void)
 	case 0x01:
 		system_rev |= CHIP_REV_1_1;
 		break;
+	case 0x02:
+		system_rev |= CHIP_REV_1_2;
+		break;
 	default:
 		system_rev |= 0x8000;
 		break;
arch/arm/include/asm/arch-mx25/imx-regs.h +1 -0
index 672f9d7..e780296 100644
@@ -357,5 +357,6 @@ struct aips_regs {
 
 #define CHIP_REV_1_0		0x10
 #define CHIP_REV_1_1		0x11
+#define CHIP_REV_1_2		0x12
 
 #endif				/* _IMX_REGS_H */
Signature · 1 line
1.7.7.6
#1 lore raw

PATCH v2 2/2 add Eukrea's CPUIMX25

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested but disabled until Beno?t's fix gets applied)

bootlog :
U-Boot 2012.10-rc1-00003-gdd12be5 (Sep 23 2012 - 13:53:21)

CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR

DRAM:  64 MiB
NAND:  256 MiB
MMC:
In:    serial
Out:   serial
Err:   serial
Net:   FEC
Hit any key to stop autoboot:  0

---
v2: rebased against 2012.10-rc1, disabled eSDHC until proper fix
from Beno?t gets applied, updated bootlog.

 MAINTAINERS                               |    2 +
 board/eukrea/cpuimx25/Makefile            |   44 +++++++
 board/eukrea/cpuimx25/config.mk           |    5 +
 board/eukrea/cpuimx25/cpuimx25.c          |  123 ++++++++++++++++++
 board/eukrea/cpuimx25/imximage.cfg        |   55 ++++++++
 board/eukrea/cpuimx25/lowlevel_init.S     |  113 ++++++++++++++++
 boards.cfg                                |    2 +
 include/configs/cpuimx25.h                |  198 +++++++++++++++++++++++++++++
 nand_spl/board/eukrea/cpuimx25/Makefile   |   79 ++++++++++++
 nand_spl/board/eukrea/cpuimx25/config.mk  |    1 +
 nand_spl/board/eukrea/cpuimx25/u-boot.lds |   83 ++++++++++++
 11 files changed, 705 insertions(+), 0 deletions(-)
 create mode 100644 board/eukrea/cpuimx25/Makefile
 create mode 100644 board/eukrea/cpuimx25/config.mk
 create mode 100644 board/eukrea/cpuimx25/cpuimx25.c
 create mode 100644 board/eukrea/cpuimx25/imximage.cfg
 create mode 100644 board/eukrea/cpuimx25/lowlevel_init.S
 create mode 100644 include/configs/cpuimx25.h
 create mode 100644 nand_spl/board/eukrea/cpuimx25/Makefile
 create mode 100644 nand_spl/board/eukrea/cpuimx25/config.mk
 create mode 100644 nand_spl/board/eukrea/cpuimx25/u-boot.lds
MAINTAINERS +2 -0
index aa54fe1..94e759f 100644
@@ -606,6 +606,8 @@ Eric Benard <[email protected]>
 	cpuat91		ARM920T
 	cpu9260		ARM926EJS (AT91SAM9260 SoC)
 	cpu9G20		ARM926EJS (AT91SAM9G20 SoC)
+	cpuimx25	i.MX25
+	cpuimx25nand	i.MX25
 
 Ajay Bhargav <[email protected]>
 
board/eukrea/cpuimx25/Makefile new file +44 -0

44 lines not on this page · raw message

board/eukrea/cpuimx25/config.mk new file +5 -0
new file mode 100644
index 0000000..18b2883
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+CONFIG_SYS_TEXT_BASE = 0x810c0000
+else
+CONFIG_SYS_TEXT_BASE = 0x81200000
+endif
board/eukrea/cpuimx25/cpuimx25.c new file +123 -0

123 lines not on this page · raw message

board/eukrea/cpuimx25/imximage.cfg new file +55 -0

55 lines not on this page · raw message

board/eukrea/cpuimx25/lowlevel_init.S new file +113 -0

113 lines not on this page · raw message

boards.cfg +2 -0
index 091c79f..2cd6e4d 100644
@@ -176,6 +176,8 @@ dockstar                     arm         arm926ejs   -                   Seagate
 tk71                         arm         arm926ejs   tk71                karo           kirkwood
 devkit3250                   arm         arm926ejs   devkit3250          timll          lpc32xx
 jadecpu                      arm         arm926ejs   jadecpu             syteco         mb86r0x
+cpuimx25                     arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:IMX_CONFIG=board/eukrea/cpuimx25/imximage.cfg
+cpuimx25nand                 arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:NAND_U_BOOT
 mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25		mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
 tx25                         arm         arm926ejs   tx25                karo           mx25
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
include/configs/cpuimx25.h new file +198 -0

198 lines not on this page · raw message

nand_spl/board/eukrea/cpuimx25/Makefile new file +79 -0

79 lines not on this page · raw message

nand_spl/board/eukrea/cpuimx25/config.mk new file +1 -0
new file mode 100644
index 0000000..68afbf1
@@ -0,0 +1 @@
+PAD_TO	:= 2048
nand_spl/board/eukrea/cpuimx25/u-boot.lds new file +83 -0

83 lines not on this page · raw message

Signature · 1 line
1.7.7.6
#2 lore raw

PATCH v2 2/2 add Eukrea's CPUIMX25

Quoted 360 lines · Eric B?nard

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested but disabled until Beno?t's fix gets applied)

bootlog :
U-Boot 2012.10-rc1-00003-gdd12be5 (Sep 23 2012 - 13:53:21)

CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR

DRAM:  64 MiB
NAND:  256 MiB
MMC:
In:    serial
Out:   serial
Err:   serial
Net:   FEC
Hit any key to stop autoboot:  0

---
v2: rebased against 2012.10-rc1, disabled eSDHC until proper fix
from Beno?t gets applied, updated bootlog.

  MAINTAINERS                               |    2 +
  board/eukrea/cpuimx25/Makefile            |   44 +++++++
  board/eukrea/cpuimx25/config.mk           |    5 +
  board/eukrea/cpuimx25/cpuimx25.c          |  123 ++++++++++++++++++
  board/eukrea/cpuimx25/imximage.cfg        |   55 ++++++++
  board/eukrea/cpuimx25/lowlevel_init.S     |  113 ++++++++++++++++
  boards.cfg                                |    2 +
  include/configs/cpuimx25.h                |  198 +++++++++++++++++++++++++++++
  nand_spl/board/eukrea/cpuimx25/Makefile   |   79 ++++++++++++
  nand_spl/board/eukrea/cpuimx25/config.mk  |    1 +
  nand_spl/board/eukrea/cpuimx25/u-boot.lds |   83 ++++++++++++
  11 files changed, 705 insertions(+), 0 deletions(-)

create mode 100644 board/eukrea/cpuimx25/Makefile create mode 100644 board/eukrea/cpuimx25/config.mk create mode 100644 board/eukrea/cpuimx25/cpuimx25.c create mode 100644 board/eukrea/cpuimx25/imximage.cfg create mode 100644 board/eukrea/cpuimx25/lowlevel_init.S create mode 100644 include/configs/cpuimx25.h create mode 100644 nand_spl/board/eukrea/cpuimx25/Makefile create mode 100644 nand_spl/board/eukrea/cpuimx25/config.mk create mode 100644 nand_spl/board/eukrea/cpuimx25/u-boot.lds

MAINTAINERS +2 -0
index aa54fe1..94e759f 100644
@@ -606,6 +606,8 @@ Eric Benard<[email protected]>
  	cpuat91		ARM920T
  	cpu9260		ARM926EJS (AT91SAM9260 SoC)
  	cpu9G20		ARM926EJS (AT91SAM9G20 SoC)
+	cpuimx25	i.MX25
+	cpuimx25nand	i.MX25
 
  Ajay Bhargav<[email protected]>
 
board/eukrea/cpuimx25/Makefile new file +44 -0
new file mode 100644
index 0000000..46131fd
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+# Author: John Rigby<[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= cpuimx25.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
board/eukrea/cpuimx25/config.mk new file +5 -0
new file mode 100644
index 0000000..18b2883
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+CONFIG_SYS_TEXT_BASE = 0x810c0000
+else
+CONFIG_SYS_TEXT_BASE = 0x81200000
+endif
board/eukrea/cpuimx25/cpuimx25.c new file +123 -0
new file mode 100644
index 0000000..72fa8a5
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique<www.eukrea.com>
+ * Eric Benard<[email protected]>
+ *
+ * Based on tx25.c:
+ *   Author: John Rigby<[email protected]>
+ *
+ * Based on imx27lite.c:
+ *   Copyright (C) 2008,2009 Eric Jarrige<[email protected]>
+ *   Copyright (C) 2009 Ilya Yanok<[email protected]>
+ * And:
+ *   RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include<common.h>
+#include<asm/io.h>
+#include<asm/arch/imx-regs.h>
+#include<asm/arch/imx25-pinmux.h>
+#include<asm/gpio.h>
+#include<asm/arch/sys_proto.h>
+#include<mmc.h>
+#include<fsl_esdhc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+	{IMX_MMC_SDHC1_BASE},
+};
+#endif
+
+int board_init()
+{
+#ifdef CONFIG_MXC_UART
+	mx25_uart1_init_pins();
+#endif
+	/* board id for linux */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+	return 0;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_FEC_MXC
+	mx25_fec_init_pins();
+#endif
+	return 0;
+}
+
+int dram_init(void)
+{
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
+			PHYS_SDRAM_1_SIZE);
+}
+
+int checkboard(void)
+{
+	printf("Eukrea Electromatique CPUIMX25\n");
+	return 0;
+}
+
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	struct gpio_regs *gpio2 = (struct gpio_regs *)IMX_GPIO2_BASE;
+	u32 val;
+
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+	writel(MX25_PIN_MUX_MODE(5),&muxctl->pad_de_b);
+
+	writel(0x0,&padctl->pad_de_b);
+
+	val = readl(&gpio2->gpio_dir)&  ~(1<<  20);
+	writel(val,&gpio2->gpio_dir);
+	val = readl(&gpio2->gpio_dr)&  (1<<  20);
+	return val ? 0 : 1;
+
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_cmd);
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_clk);
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_data0);
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_data1);
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_data2);
+	writel(sdhc1_mux_mode,&muxctl->pad_sd1_data3);
+	return fsl_esdhc_initialize(bis,&esdhc_cfg[0]);
+}
+#endif
board/eukrea/cpuimx25/imximage.cfg new file +55 -0
new file mode 100644
index 0000000..c0b7b20
@@ -0,0 +1,55 @@
+#
+# (C) Copyright 2009
+# Stefano Babic DENX Software Engineering sbabic at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# Refer docs/README.imxmage for more details about how-to configure
+# and create imximage boot image
+#
+# The syntax is taken as close as possible with the kwbimage
+
+# Boot Device : one of
+# nand, sd, spi
+
+BOOT_FROM	nand
+
+# Device Configuration Data (DCD)
+#
+# Each entry must have the format:
+# Addr-type           Address        Value
+#
+# where:
+#	Addr-type register length (1,2 or 4 bytes)
+#	Address	  absolute address of the register
+#	value	  value to be stored in the register
+
+# MDDR init
+DATA 4 0xb8001010 0x00000004
+DATA 4 0xb8001000 0x92100000
+DATA 1 0x80000400 0x12344321
+DATA 4 0xb8001000 0xa2100000
+DATA 4 0x80000000 0x12344321
+DATA 4 0x80000000 0x12344321
+DATA 4 0xb8001000 0xb2100000
+DATA 1 0x80000033 0xda
+DATA 1 0x81000000 0xff
+DATA 4 0xb8001000 0x82216080
+DATA 4 0xb8001004 0x00295729
+DATA 4 0x53f80008 0x20034000
+
+# Enable the clocks
+DATA 4 0x53f8000c 0x1fffffff
+DATA 4 0x53f80010 0xffffffff
+DATA 4 0x53f80014 0xfdfff
board/eukrea/cpuimx25/lowlevel_init.S new file +38 -0
new file mode 100644
index 0000000..76e4e6f
@@ -0,0 +1,113 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique<www.eukrea.com>
+ * Eric Benard<[email protected]>
+ *
+ * Based on tx25 and zmx25:
+ * Author: John Rigby<[email protected]>
+ *
+ * Based on U-Boot and RedBoot sources for several different i.mx
+ * platforms.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include<asm/macro.h>
+#include<asm/arch/macro.h>
+#include<asm/arch/imx-regs.h>
+#include<generated/asm-offsets.h>
+
+.macro init_m3if
+	write32 0xb8003000, 0x1
+.endm
+
+.macro init_clocks
+	write32	0x53f80064, 0x00000000

board/eukrea/cpuimx25/lowlevel_init.S line 48

Quoted 10 lines
board/eukrea/cpuimx25/lowlevel_init.S new file +10 -0
+	write32	0x53f80008, 0x20034000
+
+	/*
+	 * enable all implemented clocks in all three
+	 * clock control registers
+	 */
+	write32	0x53f8000c, 0x1fffffff
+	write32	0x53f80010, 0xffffffff
+	write32	0x53f80014, 0xfdfff
+.endm

Why the clock init is in two places? imximage.cfg and this file. Am I missing something?

~Vikram

#3 lore raw

PATCH v2 2/2 add Eukrea's CPUIMX25

Hi Vikram,

Le Sun, 23 Sep 2012 23:02:18 +0530,
Vikram Narayanan <[email protected]> a ?crit :

Quoted 3 lines

Why the clock init is in two places? imximage.cfg and this file. Am I missing something?

imximage.cfg for internal boot, lowlevel_init.S for external boot.

Eric

#4 lore raw

PATCH v2 2/2 add Eukrea's CPUIMX25

In reply to Eric Bénard
Quoted 9 lines · Eric B?nard

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested but disabled until Beno?t's fix gets applied)

Hi Eric,

Quoted 21 lines

bootlog :
U-Boot 2012.10-rc1-00003-gdd12be5 (Sep 23 2012 - 13:53:21)

CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR

DRAM:  64 MiB
NAND:  256 MiB
MMC:
In:    serial
Out:   serial
Err:   serial
Net:   FEC
Hit any key to stop autoboot:  0

---
v2: rebased against 2012.10-rc1, disabled eSDHC until proper fix
from Beno?t gets applied, updated bootlog.

Quoted 11 lines
 MAINTAINERS                               |    2 +
 board/eukrea/cpuimx25/Makefile            |   44 +++++++
 board/eukrea/cpuimx25/config.mk           |    5 +
 board/eukrea/cpuimx25/cpuimx25.c          |  123 ++++++++++++++++++
 board/eukrea/cpuimx25/imximage.cfg        |   55 ++++++++
 board/eukrea/cpuimx25/lowlevel_init.S     |  113 ++++++++++++++++
 boards.cfg                                |    2 +
 include/configs/cpuimx25.h                |  198 +++++++++++++++++++++++++++++
 nand_spl/board/eukrea/cpuimx25/Makefile   |   79 ++++++++++++
 nand_spl/board/eukrea/cpuimx25/config.mk  |    1 +
 nand_spl/board/eukrea/cpuimx25/u-boot.lds |   83 ++++++++++++

There is a main issue with these patches. According to some discussion in previous threads and hopefully I do not misinterprete Wolfgang's will about the direction that U-Boot will have in future, the nand_spl code is obsolete and it remains for the already supported boards.

However, new boards must implement SPL using the SPL framework. New boards using nand_spl will not be integrated in mainline.

board/eukrea/cpuimx25/config.mk line 5

Quoted 12 lines
(quoted diff) +1 -0
+#########################################################################
board/eukrea/cpuimx25/config.mk new file +5 -0
new file mode 100644
index 0000000..18b2883
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+CONFIG_SYS_TEXT_BASE = 0x810c0000
+else
+CONFIG_SYS_TEXT_BASE = 0x81200000
+endif

config.mk is obsolete in board's directory. We removed most of these config.mk. It must not be used anymore.

board/eukrea/cpuimx25/config.mk

Quoted 3 lines
board/eukrea/cpuimx25/config.mk new file +3 -0
+int board_init()
+{
+#ifdef CONFIG_MXC_UART

Maybe you can drop the #ifdef, CONFIG_MXC_UART should always be set

board/eukrea/cpuimx25/config.mk

Quoted 12 lines
board/eukrea/cpuimx25/config.mk new file +12 -0
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	struct gpio_regs *gpio2 = (struct gpio_regs *)IMX_GPIO2_BASE;
+	u32 val;
+
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+	writel(MX25_PIN_MUX_MODE(5), &muxctl->pad_de_b);

Why is the setup of the iomux here and not in board_mmc_init ?

Quoted 160 lines
board/eukrea/cpuimx25/lowlevel_init.S new file +113 -0
new file mode 100644
index 0000000..76e4e6f
@@ -0,0 +1,113 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <[email protected]>
+ *
+ * Based on tx25 and zmx25:
+ * Author: John Rigby <[email protected]>
+ *
+ * Based on U-Boot and RedBoot sources for several different i.mx
+ * platforms.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/macro.h>
+#include <asm/arch/macro.h>
+#include <asm/arch/imx-regs.h>
+#include <generated/asm-offsets.h>
+
+.macro init_m3if
+	write32 0xb8003000, 0x1
+.endm
+
+.macro init_clocks
+	write32	0x53f80064, 0x00000000
+	write32	0x53f80008, 0x20034000
+
+	/*
+	 * enable all implemented clocks in all three
+	 * clock control registers
+	 */
+	write32	0x53f8000c, 0x1fffffff
+	write32	0x53f80010, 0xffffffff
+	write32	0x53f80014, 0xfdfff
+.endm
+
+.macro init_lpddr
+	/* Skip SDRAM initialization if we run from RAM */
+	cmp	pc, #0x80000000
+	bls	1f
+	cmp	pc, #0x90000000
+	bhi	1f
+
+	mov	pc, lr
+
+1:	ldr	r0, =IMX_ESDRAMC_BASE
+	ldr	r2, =IMX_SDRAM_BANK0_BASE
+
+	/*
+	 * reset SDRAM controller
+	 * then wait for initialization to complete
+	 */
+	ldr	r1, =(1 << 1) | (1 << 2) | (1 << 3)
+	str	r1, [r0, #ESDRAMC_ESDMISC]
+2:	ldr	r3, [r0, #ESDRAMC_ESDMISC]
+	tst	r3, #(1 << 31)
+	beq	2b
+	ldr	r1, =(1 << 2)
+	str	r1, [r0, #ESDRAMC_ESDMISC]
+
+	ldr	r1, =0x00295729
+	str	r1, [r0, #ESDRAMC_ESDCFG0]
+
+	/* control | precharge */
+	ldr	r1, =0x92100000
+	str	r1, [r0, #ESDRAMC_ESDCTL0]
+	/* dram command encoded in address */
+	strb	r1, [r2, #0x400]
+
+	/* auto refresh */
+	ldr	r1, =0xa2100000
+	str	r1, [r0, #ESDRAMC_ESDCTL0]
+	/* read dram twice to auto refresh */
+	str	r3, [r2]
+	str     r3, [r2]
+
+	/* control | load mode */
+	ldr	r1, =0xb2100000
+	str	r1, [r0, #ESDRAMC_ESDCTL0]
+
+	/* mode register of lpddram */
+	strb	r1, [r2, #0x33]
+
+	/* extended mode register of lpddrram */
+	ldr	r2, =0x81000000
+	strb	r1, [r2]
+
+	/* control | normal */
+	ldr	r1, =0x82216080
+	str	r1, [r0, #ESDRAMC_ESDCTL0]
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+	init_aips
+	init_max
+	init_m3if
+	init_clocks
+	init_lpddr
+	mov	pc, lr
boards.cfg +2 -0
index 091c79f..2cd6e4d 100644
@@ -176,6 +176,8 @@ dockstar                     arm         arm926ejs   -                   Seagate
 tk71                         arm         arm926ejs   tk71                karo           kirkwood
 devkit3250                   arm         arm926ejs   devkit3250          timll          lpc32xx
 jadecpu                      arm         arm926ejs   jadecpu             syteco         mb86r0x
+cpuimx25                     arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:IMX_CONFIG=board/eukrea/cpuimx25/imximage.cfg
+cpuimx25nand                 arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:NAND_U_BOOT
 
 
 
include/configs/cpuimx25.h new file +22 -0
new file mode 100644
index 0000000..dc0a1d6
@@ -0,0 +1,198 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <[email protected]>
+ *
+ * Based on tx25.c:
+ * Author: John Rigby <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA

include/configs/cpuimx25.h line 32

Quoted 10 lines
include/configs/cpuimx25.h new file +10 -0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Eukrea CPUIMX25 board - SoC Configuration
+ */
+#define CONFIG_MX25
+#define CONFIG_MX25_CLK32		32768	/* OSC32K frequency */

A recent patch drop this. You should not need it. See commit 1b2080f3388b70c4c37b69830f73a61c50cdd505.

include/configs/cpuimx25.h line 43

Quoted 1 line
include/configs/cpuimx25.h new file +1 -0
+#ifdef CONFIG_NAND_SPL

As I explained, NAND_SPL should not be used for new boards.

include/configs/cpuimx25.h line 97

Quoted 5 lines
include/configs/cpuimx25.h new file +5 -0
+
+/*
+ * MMC
+ */
+#if 0

This is dead code. Drop it.

nand_spl/board/eukrea/cpuimx25/Makefile

Quoted 12 lines
include/configs/cpuimx25.h new file +8 -0
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	(0x53FB4000)
+#define CONFIG_SYS_FSL_ESDHC_NUM	1
+#define CONFIG_SYS_FSL_ESDHC_USE_PIO	1
+#endif
+
+
+
nand_spl/board/eukrea/cpuimx25/Makefile new file +0 -0
new file mode 100644
index 0000000..d8b19c6

Sorry, not accepted anymore.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#5 lore raw

PATCH v2 2/2 add Eukrea's CPUIMX25

Hi Stefano,

Le Sun, 23 Sep 2012 19:46:50 +0200,
Stefano Babic <[email protected]> a ?crit :

Quoted 4 lines
Quoted 3 lines
 nand_spl/board/eukrea/cpuimx25/Makefile   |   79 ++++++++++++
 nand_spl/board/eukrea/cpuimx25/config.mk  |    1 +
 nand_spl/board/eukrea/cpuimx25/u-boot.lds |   83 ++++++++++++
Quoted 8 lines

There is a main issue with these patches. According to some discussion in previous threads and hopefully I do not misinterprete Wolfgang's will about the direction that U-Boot will have in future, the nand_spl code is obsolete and it remains for the already supported boards.

However, new boards must implement SPL using the SPL framework. New boards using nand_spl will not be integrated in mainline.

else that would have been to easy ;-)
OK I'll look at this SPL framework based on your serie introducing woorburn board,

Thanks !
Eric

#6 lore raw

PATCH v2 1/2 mx25: add CPU revision 1.2

In reply to Eric Bénard
Quoted 6 lines · Eric B?nard

tested on a MCIMX257CJM4A which now reports :
CPU: Freescale i.MX25 rev1.2 at 399 MHz

---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================