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fsmc: Skip BBT scan for bad block management

PATCH New Vipin Kumar 2 participants 4 messages Dec 6, 2012 – Dec 8, 2012

Subsystems (2)
Memory technology devices (MTD) NAND flash
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Vipin Kumar

author
#0 lore raw

PATCH 1/1 fsmc: Skip BBT scan for bad block management

This patch forces to read the bad block marker from location 0 in large page nand devices and location 5 in small page devices.

Signed-off-by Vipin Kumar <[email protected]>
Reviewed-by Shiraz Hashim <[email protected]>
---
 drivers/mtd/nand/fsmc_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/nand/fsmc_nand.c +1 -1
index 7a61d88..bce4298 100644
@@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand)
 	writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
 			&fsmc_regs_p->attrib);
 
-	nand->options = 0;
+	nand->options = NAND_SKIP_BBTSCAN;
 #if defined(CONFIG_SYS_FSMC_NAND_16BIT)
 	nand->options |= NAND_BUSWIDTH_16;
 #endif
Signature · 1 line
1.8.0
#1 lore raw

PATCH 1/1 fsmc: Skip BBT scan for bad block management

Quoted 16 lines · Vipin Kumar

This patch forces to read the bad block marker from location 0 in large page
nand devices and location 5 in small page devices.

Signed-off-by Vipin Kumar <[email protected]>
Reviewed-by Shiraz Hashim <[email protected]>
---
 drivers/mtd/nand/fsmc_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/nand/fsmc_nand.c +0 -0
index 7a61d88..bce4298 100644

drivers/mtd/nand/fsmc_nand.c int fsmc_nand_init(struct nand_chip *nand) · line 439

Quoted 8 lines
drivers/mtd/nand/fsmc_nand.c +1 -1
@@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand)
 	writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
 			&fsmc_regs_p->attrib);
 
-	nand->options = 0;
+	nand->options = NAND_SKIP_BBTSCAN;
 #if defined(CONFIG_SYS_FSMC_NAND_16BIT)
 	nand->options |= NAND_BUSWIDTH_16;
 #endif

I don't think this will change the bad block marker behavior -- just whether you use a BBT. Why do you need this? Why not NAND_USE_FLASH_BBT instead?

-Scott

author
#2 lore raw

PATCH 1/1 fsmc: Skip BBT scan for bad block management

Quoted 20 lines · Scott Wood
Quoted 19 lines · Vipin Kumar

This patch forces to read the bad block marker from location 0 in large page
nand devices and location 5 in small page devices.

Signed-off-by Vipin Kumar<[email protected]>
Reviewed-by Shiraz Hashim<[email protected]>
---
  drivers/mtd/nand/fsmc_nand.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/nand/fsmc_nand.c +0 -0
index 7a61d88..bce4298 100644
@@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand)
  	writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
  			&fsmc_regs_p->attrib);
Quoted 10 lines

drivers/mtd/nand/fsmc_nand.c int fsmc_nand_init(struct nand_chip *nand) · line 439

Quoted 5 lines
drivers/mtd/nand/fsmc_nand.c +1 -1
-	nand->options = 0;
+	nand->options = NAND_SKIP_BBTSCAN;
  #if defined(CONFIG_SYS_FSMC_NAND_16BIT)
  	nand->options |= NAND_BUSWIDTH_16;
  #endif

I don't think this will change the bad block marker behavior -- just whether you use a BBT. Why do you need this? Why not NAND_USE_FLASH_BBT instead?

It's because the BootROM which is fused in the device itself (ie non-modifiable) is going to read the bad block markers from the oob area.

Which means that anything written via u-boot is non-readable if it uses flash bbt

Quoted 2 lines

-Scott

#3 lore raw

PATCH 1/1 fsmc: Skip BBT scan for bad block management

Quoted 32 lines · Vipin Kumar
Quoted 20 lines · Scott Wood
Quoted 19 lines · Vipin Kumar

This patch forces to read the bad block marker from location 0 in large page
nand devices and location 5 in small page devices.

Signed-off-by Vipin Kumar<[email protected]>
Reviewed-by Shiraz Hashim<[email protected]>
---
  drivers/mtd/nand/fsmc_nand.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/nand/fsmc_nand.c +0 -0
index 7a61d88..bce4298 100644
@@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand)
  	writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
  			&fsmc_regs_p->attrib);
Quoted 10 lines

drivers/mtd/nand/fsmc_nand.c int fsmc_nand_init(struct nand_chip *nand) · line 439

Quoted 5 lines
drivers/mtd/nand/fsmc_nand.c +1 -1
-	nand->options = 0;
+	nand->options = NAND_SKIP_BBTSCAN;
  #if defined(CONFIG_SYS_FSMC_NAND_16BIT)
  	nand->options |= NAND_BUSWIDTH_16;
  #endif

I don't think this will change the bad block marker behavior -- just whether you use a BBT. Why do you need this? Why not NAND_USE_FLASH_BBT instead?

Quoted 6 lines

It's because the BootROM which is fused in the device itself (ie non-modifiable) is going to read the bad block markers from the oob area.

Which means that anything written via u-boot is non-readable if it uses flash bbt

The factory bad block markers will still be there. The BBT is based on those markers, so you'll still avoid them when writing your boot image. So I don't follow why you're having trouble with your current settings. The main difference that NAND_SKIP_BBTSCAN makes is whether you scan for bad blocks up front, or whether you check each block on demand (and don't cache the results for next time).

Is your concern blocks that get marked bad later on -- not by the factory? In that case, you're still writing real bad block markers with "nand->options = 0". It's only when you specify NAND_USE_FLASH_BBT that you'll be updating an on-flash BBT instead of writing bad block markers.

Do you really expect to be marking blocks bad in your boot image? Normally that happens as part of a filesystem (or block management layer such as ubi) that does active bad-block management.

BTW, I've found an on-chip BBT to be nice during development. A bug in the NAND driver can cause the filesystem to mark every block as bad. If you wipe the BBT, you still keep the factory bad block information. If you have to scrub everything, you lose that.

-Scott