mx6: Add workaround for ARM errata

From: Fabio Estevam <[email protected]>

Add workaround for the following ARM errata: 743622 and 751472.

The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel.

Since imx has been converted to multiplatform in the kernel, we need to apply such workarounds into the bootloader.

Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.

Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad" document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf

---
Following patch has been proposed into arm kernel mailing list:
http://www.spinics.net/lists/arm-kernel/msg214840.html

Changes since v2:
- Use c15 register (which match both the mx6 errata and kernel code) and also put a note to mx6q erratum document.

Changes since v1:
- Use the same style of the erratum in arch/arm/cpu/armv7/mx5/lowlevel_init.S.

 arch/arm/cpu/armv7/mx6/lowlevel_init.S |   10 ++++++++++
 1 file changed, 10 insertions(+)

index acadef2..bf06152 100644
@@ -20,6 +20,16 @@
 
 #include <linux/linkage.h>
 
+.macro init_arm_errata
+	/* ARM erratum ID #743622 */
+	mrc	p15, 0, r10, c15, c0, 1		/* read diagnostic register */
+	orr	r10, r10, #1 << 6		/* set bit #6 */
+	/* ARM erratum ID #751472 */
+	orr	r10, r10, #1 << 11		/* set bit #11 */
+	mcr	p15, 0, r10, c15, c0, 1		/* write diagnostic register */
+.endm
+
 ENTRY(lowlevel_init)
+	init_arm_errata
 	mov pc, lr
 ENDPROC(lowlevel_init)

1.7.9.5

Applied to u-boot-imx (fix), thanks.

Best regards,
Stefano Babic

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