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mxc nand: Add support for i.MX5

PATCH New Marek Vasut 4 participants 12 messages Jan 8, 2013 – Feb 4, 2013

Subsystems (4)
Arm (32-bit) Arm i.MX and Layerscape Memory technology devices (MTD) NAND flash
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Marek Vasut

author
#0 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>
---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219 ++++++++++++++++++++++--------
 include/fsl_nfc.h                        |  149 +++++++++++++-------
 nand_spl/nand_boot_fsl_nfc.c             |  114 ++++++++++++----
 4 files changed, 364 insertions(+), 127 deletions(-)

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on my MX53 board and will hang right after printing "DRAM:" and before printing the CPU info. I suspect it's some kind of unaligned access.

NOTE2: I fixed a few complaints from GCC and rebased on top of master.

arch/arm/include/asm/arch-mx5/imx-regs.h +9 -0
index 1d060fd..6821e75 100644
@@ -234,6 +234,15 @@
 #define CS0_32M_CS1_32M_CS2_32M_CS3_32M		3
 
 /*
+ * SRC register definitions
+ */
+#if defined(CONFIG_MX51)
+#define SRC_SBMR_NF16B		(1 << 2)
+#elif defined(CONFIG_MX53)
+#define SRC_SBMR_NF16B		(1 << 13)
+#endif
+
+/*
  * CSPI register definitions
  */
 #define MXC_ECSPI
drivers/mtd/nand/mxc_nand.c +163 -56

404 lines not on this page · raw message

include/fsl_nfc.h +102 -47

190 lines not on this page · raw message

nand_spl/nand_boot_fsl_nfc.c +90 -24

184 lines not on this page · raw message

Signature · 1 line
1.7.10.4
reviewer
#1 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Quoted 12 lines · Marek Vasut

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>
---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219 ++++++++++++++++++++++--------
 include/fsl_nfc.h                        |  149 +++++++++++++-------
 nand_spl/nand_boot_fsl_nfc.c             |  114 ++++++++++++----
 4 files changed, 364 insertions(+), 127 deletions(-)
Quoted 3 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on my MX53 board and will hang right after printing "DRAM:" and before printing the CPU info. I suspect it's some kind of unaligned access.

I was seeing the same problem and this patch fixed it:
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commit;h=1411fb37b5a8d56bececc5e6ea09d2e0670b9810

Let me know if this fixes the issue you are seeing.

Regards,

Fabio Estevam

author
#2 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Fabio Estevam,

Quoted 20 lines · Marek Vasut
Quoted 14 lines

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219

++++++++++++++++++++++-------- include/fsl_nfc.h
| 149 +++++++++++++------- nand_spl/nand_boot_fsl_nfc.c |
114 ++++++++++++---- 4 files changed, 364 insertions(+), 127 deletions(-)

Quoted 4 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on my MX53 board and will hang right after printing "DRAM:" and before printing the CPU info. I suspect it's some kind of unaligned access.

Quoted 5 lines

I was seeing the same problem and this patch fixed it:
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commit;h=1411fb37b5a8d56becec
c5e6ea09d2e0670b9810

Let me know if this fixes the issue you are seeing.

I have that applied, but still seeing the issue. Maybe there's some additional problem with the NAND driver ?

Best regards,
Marek Vasut

#3 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

In reply to Marek Vasut

Dear Marek Vasut,

Quoted 1 line · Marek Vasut

Subject: [PATCH 1/2] mxc nand: Add support for i.MX5

Where is the 2/2?

Quoted 14 lines

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>
---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219
 ++++++++++++++++++++++--------
 include/fsl_nfc.h                        |  149 +++++++++++++-------
 nand_spl/nand_boot_fsl_nfc.c             |  114 ++++++++++++----
 4 files changed, 364 insertions(+), 127 deletions(-)
Quoted 5 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on
my MX53 board and will hang right after printing "DRAM:" and before printing the
CPU info. I suspect it's some kind of unaligned access.

OK. I'm waiting for your test results. It works for me on i.MX51 with 2012.07.

Quoted 2 lines

NOTE2: I fixed a few complaints from GCC

Which ones? I don't see any such change in this new version.

Quoted 2 lines

and rebased on top of
master.

OK.

[--snip--]

drivers/mtd/nand/mxc_nand.c static int mxc_nand_correct_data(struct mtd_info · line 761

Quoted 7 lines
drivers/mtd/nand/mxc_nand.c +1 -1
@@ -698,7 +757,7 @@ static int mxc_nand_correct_data(struct mtd_info
 *mtd, u_char *dat,
 	 * additional correction.  2-Bit errors cannot be corrected by
 	 * HW ECC, so we need to return failure
 	 */
-	uint16_t ecc_status = readw(&host->regs->ecc_status_result);
+	uint32_t ecc_status = readnfc(&host->regs->ecc_status_result);

        ^

Here it was uint16_t in my last version, and this was correct since this is code for MXC_NFC_V1. This change should not hurt, but it was not necessary.

Is this change related to the GCC complaints that you mentioned?

drivers/mtd/nand/mxc_nand.c static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, · line 763

Quoted 3 lines
drivers/mtd/nand/mxc_nand.c +0 -0
 	if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
 		MTDDEBUG(MTD_DEBUG_LEVEL0,

[--snip--]

The other changes (i.e. the rebase) are fine with me.

Best regards,
Beno?t

author
#4 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Beno?t Th?baudeau,

Quoted 6 lines

Dear Marek Vasut,

Quoted 1 line · Marek Vasut

Subject: [PATCH 1/2] mxc nand: Add support for i.MX5

Where is the 2/2?

Nowhere, it's a typo.

Quoted 14 lines
Quoted 14 lines

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219
 ++++++++++++++++++++++--------
 include/fsl_nfc.h                        |  149 +++++++++++++-------
 nand_spl/nand_boot_fsl_nfc.c             |  114 ++++++++++++----
 4 files changed, 364 insertions(+), 127 deletions(-)
Quoted 8 lines
Quoted 5 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on
my MX53 board and will hang right after printing "DRAM:" and before printing the
CPU info. I suspect it's some kind of unaligned access.

OK. I'm waiting for your test results. It works for me on i.MX51 with 2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board from SD, it hangs. When I load via JTAG, it doesn't hang. I suspect it's something related to the MXC NAND driver, since if the driver is not compiled in, it works like charm both ways.

Otherwise, when booted, the NAND works fine.

I wonder if there's some unaligned access or something happening in the NAND driver. Or maybe some other issue where the code is miscompiled.

Quoted 3 lines
Quoted 1 line

NOTE2: I fixed a few complaints from GCC

Which ones? I don't see any such change in this new version.

This one I think:

354 @@ -1167,8 +1226,8 @@ static struct nand_bbt_descr bbt_mirror_descr = { 355 int board_nand_init(struct nand_chip *this)
356 {
357 struct mtd_info *mtd;
358 -#ifdef MXC_NFC_V2_1
359 - uint16_t tmp;
360 +#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
361 + uint32_t tmp;
362 #endif
363
364 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT

Quoted 14 lines
Quoted 2 lines

and rebased on top of
master.

OK.

[--snip--]

Quoted 7 lines
drivers/mtd/nand/mxc_nand.c +0 -0
@@ -698,7 +757,7 @@ static int mxc_nand_correct_data(struct mtd_info
 *mtd, u_char *dat,
 
 	 * additional correction.  2-Bit errors cannot be corrected by
 	 * HW ECC, so we need to return failure
 	 */
Quoted 7 lines

drivers/mtd/nand/mxc_nand.c static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, · line 760

Quoted 2 lines
drivers/mtd/nand/mxc_nand.c +1 -1
-	uint16_t ecc_status = readw(&host->regs->ecc_status_result);
+	uint32_t ecc_status = readnfc(&host->regs->ecc_status_result);

        ^

Here it was uint16_t in my last version, and this was correct since this is code for MXC_NFC_V1. This change should not hurt, but it was not necessary.

But in case readnfc() results in readl(), u16 is too small.

Quoted 1 line

Is this change related to the GCC complaints that you mentioned?

No, there's one more, see above.

Quoted 7 lines

drivers/mtd/nand/mxc_nand.c static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, · line 763

Quoted 3 lines
drivers/mtd/nand/mxc_nand.c +0 -0
 	if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
 
 		MTDDEBUG(MTD_DEBUG_LEVEL0,

[--snip--]

The other changes (i.e. the rebase) are fine with me.

I hope I didn't screw up the attribution. I used "From:" which I hope is correct.

Quoted 2 lines

Best regards,
Beno?t

Best regards,
Marek Vasut

#5 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Marek Vasut,

Quoted 10 lines · Marek Vasut

Dear Beno?t Th?baudeau,

Quoted 6 lines

Dear Marek Vasut,

Quoted 1 line · Marek Vasut

Subject: [PATCH 1/2] mxc nand: Add support for i.MX5

Where is the 2/2?

Nowhere, it's a typo.

OK.

Quoted 34 lines
Quoted 22 lines
Quoted 15 lines

From: Beno?t Th?baudeau <[email protected]>

Signed-off-by Beno?t Th?baudeau <[email protected]>
Cc Scott Wood <[email protected]>
Cc Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-mx5/imx-regs.h |    9 ++
 drivers/mtd/nand/mxc_nand.c              |  219
 ++++++++++++++++++++++--------
 include/fsl_nfc.h                        |  149
 +++++++++++++-------
 nand_spl/nand_boot_fsl_nfc.c             |  114 ++++++++++++----
 4 files changed, 364 insertions(+), 127 deletions(-)
Quoted 6 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on
my MX53 board and will hang right after printing "DRAM:" and before
printing the
CPU info. I suspect it's some kind of unaligned access.

Quoted 3 lines

OK. I'm waiting for your test results. It works for me on i.MX51 with
2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board from SD, it
hangs. When I load via JTAG, it doesn't hang. I suspect it's something related
to the MXC NAND driver, since if the driver is not compiled in, it works like
charm both ways.

Quoted 5 lines

Otherwise, when booted, the NAND works fine.

I wonder if there's some unaligned access or something happening in the NAND
driver. Or maybe some other issue where the code is miscompiled.

Or there is something wrong with the Flash header or SPL?

Quoted 6 lines
Quoted 3 lines
Quoted 1 line

NOTE2: I fixed a few complaints from GCC

Which ones? I don't see any such change in this new version.

This one I think:

Quoted 12 lines

354 @@ -1167,8 +1226,8 @@ static struct nand_bbt_descr bbt_mirror_descr = {
355 int board_nand_init(struct nand_chip *this) 356 {
357 struct mtd_info *mtd;
358 -#ifdef MXC_NFC_V2_1
359 - uint16_t tmp;
360 +#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
361 + uint32_t tmp;
362 #endif
363
364 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT

This is just the rebase. Or perhaps you started from
http://patchwork.ozlabs.org/patch/177098/ instead of
http://patchwork.ozlabs.org/patch/179176/.

Quoted 24 lines
Quoted 15 lines
Quoted 2 lines

and rebased on top of
master.

OK.

[--snip--]

Quoted 8 lines
(quoted diff) +0 -0
@@ -698,7 +757,7 @@ static int mxc_nand_correct_data(struct

mtd_info
*mtd, u_char *dat,

drivers/mtd/nand/mxc_nand.c +0 -0
 	 * additional correction.  2-Bit errors cannot be corrected by
 	 * HW ECC, so we need to return failure
 	 */
Quoted 8 lines

drivers/mtd/nand/mxc_nand.c static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, · line 760

Quoted 2 lines
drivers/mtd/nand/mxc_nand.c +1 -1
-	uint16_t ecc_status = readw(&host->regs->ecc_status_result);
+	uint32_t ecc_status = readnfc(&host->regs->ecc_status_result);

        ^

Here it was uint16_t in my last version, and this was correct since this is
code for MXC_NFC_V1. This change should not hurt, but it was not necessary.

Quoted 1 line

But in case readnfc() results in readl(), u16 is too small.

readnfc() always results in readw() for MXC_NFC_V1, so u16 is just fine here.

Quoted 8 lines
Quoted 1 line

Is this change related to the GCC complaints that you mentioned?

No, there's one more, see above.

Quoted 4 lines
Quoted 3 lines
drivers/mtd/nand/mxc_nand.c +0 -0
 	if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
 
 		MTDDEBUG(MTD_DEBUG_LEVEL0,
Quoted 7 lines
Quoted 3 lines

[--snip--]

The other changes (i.e. the rebase) are fine with me.

I hope I didn't screw up the attribution. I used "From:" which I hope is
correct.

It's correctly filled, but I don't know if it's used by U-Boot's Git process. I have already seen this "From:" used before.

Best regards,
Beno?t

author
#6 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Beno?t Th?baudeau,

[...]

Quoted 19 lines
Quoted 19 lines
Quoted 10 lines
Quoted 6 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot won't boot on
my MX53 board and will hang right after printing "DRAM:" and before
printing the
CPU info. I suspect it's some kind of unaligned access.

OK. I'm waiting for your test results. It works for me on i.MX51 with
2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board from SD, it
hangs. When I load via JTAG, it doesn't hang. I suspect it's something related
to the MXC NAND driver, since if the driver is not compiled in, it works like
charm both ways.

Quoted 7 lines
Quoted 5 lines

Otherwise, when booted, the NAND works fine.

I wonder if there's some unaligned access or something happening in the NAND
driver. Or maybe some other issue where the code is miscompiled.

Or there is something wrong with the Flash header or SPL?

Flash header? SPL is not used, I boot from SD.

Quoted 19 lines
Quoted 6 lines
Quoted 3 lines
Quoted 1 line

NOTE2: I fixed a few complaints from GCC

Which ones? I don't see any such change in this new version.

This one I think:

Quoted 12 lines

354 @@ -1167,8 +1226,8 @@ static struct nand_bbt_descr bbt_mirror_descr = {
355 int board_nand_init(struct nand_chip *this) 356 {
357 struct mtd_info *mtd;
358 -#ifdef MXC_NFC_V2_1
359 - uint16_t tmp;
360 +#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
361 + uint32_t tmp;
362 #endif
363
364 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT

Quoted 3 lines

This is just the rebase. Or perhaps you started from
http://patchwork.ozlabs.org/patch/177098/ instead of
http://patchwork.ozlabs.org/patch/179176/.

Lemme try the V2, thanks.
[...]

#7 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Marek Vasut,

Quoted 29 lines · Marek Vasut

Dear Beno?t Th?baudeau,

[...]

Quoted 25 lines
Quoted 25 lines
Quoted 8 lines
Quoted 7 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot
won't boot on
my MX53 board and will hang right after printing "DRAM:" and before
printing the
CPU info. I suspect it's some kind of unaligned access.

Quoted 4 lines

OK. I'm waiting for your test results. It works for me on i.MX51
with
2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board
from SD, it
hangs. When I load via JTAG, it doesn't hang. I suspect it's something related
to the MXC NAND driver, since if the driver is not compiled in, it
works like
charm both ways.

Otherwise, when booted, the NAND works fine.

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines

I wonder if there's some unaligned access or something happening in
the NAND
driver. Or maybe some other issue where the code is miscompiled.

Or there is something wrong with the Flash header or SPL?

Flash header?

The IVT from imximage stuff.

Quoted 1 line

SPL is not used, I boot from SD.

OK.

Best regards,
Beno?t

#8 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Hi Marek,

Quoted 37 lines · Beno?t Th?baudeau

Dear Marek Vasut,

Quoted 34 lines · Marek Vasut

Dear Beno?t Th?baudeau,

[...]

Quoted 30 lines
Quoted 29 lines
Quoted 8 lines
Quoted 7 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot
won't boot on
my MX53 board and will hang right after printing "DRAM:" and before
printing the
CPU info. I suspect it's some kind of unaligned access.

Quoted 4 lines

OK. I'm waiting for your test results. It works for me on i.MX51
with
2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board
from SD, it
hangs. When I load via JTAG, it doesn't hang. I suspect it's something related
to the MXC NAND driver, since if the driver is not compiled in, it
works like
charm both ways.

Otherwise, when booted, the NAND works fine.

I wonder if there's some unaligned access or something happening in
the NAND
driver. Or maybe some other issue where the code is miscompiled.

Quoted 5 lines
Quoted 3 lines
Quoted 1 line

Or there is something wrong with the Flash header or SPL?

Flash header?

The IVT from imximage stuff.

Did you have a chance to further investigate this hang issue with non-JTAG boot and the NFC driver compiled in?

Best regards,
Beno?t

author
#9 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Dear Beno?t Th?baudeau,

Quoted 40 lines

Hi Marek,

Quoted 37 lines · Beno?t Th?baudeau

Dear Marek Vasut,

Quoted 34 lines · Marek Vasut

Dear Beno?t Th?baudeau,

[...]

Quoted 30 lines
Quoted 29 lines
Quoted 8 lines
Quoted 7 lines

NOTE: I'm seeing issues when this is compiled into U-Boot. U-Boot
won't boot on
my MX53 board and will hang right after printing "DRAM:" and before
printing the
CPU info. I suspect it's some kind of unaligned access.

Quoted 4 lines

OK. I'm waiting for your test results. It works for me on i.MX51
with
2012.07.

It works with 2013.01-rc1, but I have issues. When I boot the board
from SD, it
hangs. When I load via JTAG, it doesn't hang. I suspect it's something related
to the MXC NAND driver, since if the driver is not compiled in, it
works like
charm both ways.

Otherwise, when booted, the NAND works fine.

I wonder if there's some unaligned access or something happening in
the NAND
driver. Or maybe some other issue where the code is miscompiled.

Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
Quoted 1 line

Or there is something wrong with the Flash header or SPL?

Flash header?

The IVT from imximage stuff.

Did you have a chance to further investigate this hang issue with non-JTAG boot and the NFC driver compiled in?

I recall there being some patch from Scott and there was a guy on IRC who met this issue too (can you join irc? #u-boot @ irc.freenode.net). No activity on this from my side, since the issue magically disappeared once and didn't pop up again (weird, I know).

Best regards,
Marek Vasut

#10 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

Quoted 29 lines · Marek Vasut

Dear Beno?t Th?baudeau,

Quoted 11 lines

Hi Marek,

Quoted 8 lines · Beno?t Th?baudeau

Dear Marek Vasut,

Quoted 5 lines · Marek Vasut

Dear Beno?t Th?baudeau,

[...]

Quoted 1 line
Quoted 1 line

I wonder if there's some unaligned access or something

happening

Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines

in
the NAND
driver. Or maybe some other issue where the code is

miscompiled.

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines

Or there is something wrong with the Flash header or SPL?

Flash header?

The IVT from imximage stuff.

Did you have a chance to further investigate this hang issue with

non-JTAG

Quoted 1 line

boot and the NFC driver compiled in?

Quoted 7 lines

I recall there being some patch from Scott and there was a guy on IRC who met
this issue too (can you join irc? #u-boot @ irc.freenode.net). No activity on
this from my side, since the issue magically disappeared once and didn't pop up
again (weird, I know).

My patch was for a different issue, and it turned out to mainly be bad information in the debug print, rather than actual bad behavior -- though cleanup of page_addr is still warranted.

-Scott

#11 lore raw

PATCH 1/2 mxc nand: Add support for i.MX5

In reply to Benoît Thébaudeau
Quoted 11 lines · Beno?t Th?baudeau

Dear Marek Vasut,

Quoted 1 line · Marek Vasut

I hope I didn't screw up the attribution. I used "From:" which I

hope

Quoted 2 lines

is
correct.

It's correctly filled, but I don't know if it's used by U-Boot's Git process. I
have already seen this "From:" used before.

It is used by git. git format-patch generates it when the patch author is different from the e-mail sender, and git am uses it as the commit author if present.

-Scott