Device tree entry for Freescale TDM controller
Subsystems (2)
PATCH 1/4 Device tree entry for Freescale TDM controller
Added dtsi file for Freescale TDM controller.
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010, P1022 and P1024
--- arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi | 42 +++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +42 -0
@@ -0,0 +1,42 @@ +/* + * PQ3 TDM device tree stub [ controller @ offset 0x16000 ] + * + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + tdm_tx_clk = <2048000>; + interrupts = <62 8 0 0>; + fsl,max-time-slots = <128>; +};
Signature · 1 line
1.7.6.GIT
PATCH 2/4 Device Tree bindings for Freescale TDM controller
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010, P1022 and P1024
--- Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 65 +++++++++++++++++++++ 1 files changed, 65 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
Documentation/devicetree/bindings/tdm/fsl-tdm.txt new file +65 -0
@@ -0,0 +1,65 @@ +===================================================================== +TDM Device Tree Binding +Copyright (C) 2012 Freescale Semiconductor Inc. + +NOTE: The bindings described in this document are preliminary +and subject to change. + +===================================================================== +TDM (Time Division Multiplexing) + +DESCRIPTION + +The TDM is full duplex serial port designed to allow various devices including +digital signal processors (DSPs) to communicate with a variety of serial devices +including industry standard framers, codecs, other DSPs and microprocessors. + +The below properties describe the device tree bindings for Freescale TDM +controller. +This TDM controller is available on various Freescale Processors like +MPC8313, P1020, P1022 and P1010. + +PROPERTIES + + - compatible + Usage: required + Value type: <string> + Definition: Should contain "fsl,tdm1.0". + + - reg + Usage: required + Definition: A standard property. The first reg specifier describes the + TDM registers, and the second describes the TDM DMAC registers. + + - clock-frequency + Usage: optional + Value type: <u32 or u64> + Definition: The frequency at which the TDM block is operating. + + - interrupts + Usage: required + Definition: Definition: Two interrupt specifiers. The first is TDM + error, and the second is TDM EMAC. + + - phy-handle + Usage: optional + Value type: <phandle> + Definition: Phandle of the line controller node or framer node eg. SLIC, + E1/T1 etc. + + - fsl,max-time-slots + Usage: required + Value type: <u32> + Definition: Maximum number of 8-bit time slots in one TDM frame. + This is the maximum number which TDM hardware supports. + +EXAMPLE + + tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + interrupts = <16 8 62 8>; + phy-handle = <&zarlink1>; + fsl,max-time-slots = <128>; + };
Signature · 1 line
1.7.6.GIT
PATCH 3/4 TDM Device Tree entries for various Freescale Platforms
In reply to Sandeep SinghP1010RDB, P1020RDB, P1020MBG-PC, P1022DS, P1020RDB-PC and P1024RDB
In this Patch:
1. TDM node included in <silicon>.dtsi files.
2. Disabled TDM in 36bit configurations because of limitations in TDM hardware block, details mentioned below.
Details of 36bit h/w limitaion:
---------------------------------
TDM DMAC IP does not support more than 32b address. To address memory regions more than 4GB, 4 bits of address were provided in GUTs, which are appended to txns initiated by TDM DMAC. These 4 bits are appended irrespective of the region addressed. When TDM works in DMA mode, the DMA need to access DDR as well as TDM FIFO in CCSR space. So this poses a restriction that if memory region above 4GB need to be accessed, CCSR space should also be mapped into that 4GB region.
In this case DDR is at at first 4G (starting from 0) and CCSR is at
different 4G (0xfffe00000), hence the issue.
--- arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 3 ++- arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 1 + arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 1 + arch/powerpc/boot/dts/p1010rdb_36b.dts | 3 +++ arch/powerpc/boot/dts/p1020mbg-pc_36b.dts | 3 +++ arch/powerpc/boot/dts/p1020rdb-pc_36b.dts | 3 +++ arch/powerpc/boot/dts/p1020rdb_36b.dts | 3 +++ arch/powerpc/boot/dts/p1022ds_36b.dts | 3 +++ arch/powerpc/boot/dts/p1024rdb_36b.dts | 3 +++ 9 files changed, 22 insertions(+), 1 deletions(-)
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +2 -1
@@ -1,7 +1,7 @@ /* * P1010/P1014 Silicon/SoC Device Tree Source (post include) * - * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2011-2012 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met:
@@ -132,6 +132,7 @@ /include/ "pq3-gpio-0.dtsi" /include/ "pq3-sata2-0.dtsi" /include/ "pq3-sata2-1.dtsi" +/include/ "pq3-tdm1.0-0.dtsi" can0: can at 1c000 { compatible = "fsl,p1010-flexcan";
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi +1 -0
@@ -131,6 +131,7 @@ }; /include/ "pq3-gpio-0.dtsi" +/include/ "pq3-tdm1.0-0.dtsi" L2: l2-cache-controller at 20000 { compatible = "fsl,p1020-l2-cache-controller";
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +1 -0
@@ -190,6 +190,7 @@ fsl,fifo-depth = <15>; }; +/include/ "pq3-tdm1.0-0.dtsi" /include/ "pq3-sata2-0.dtsi" /include/ "pq3-sata2-1.dtsi"
arch/powerpc/boot/dts/p1010rdb_36b.dts +3 -0
@@ -52,6 +52,9 @@ board_soc: soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
arch/powerpc/boot/dts/p1020mbg-pc_36b.dts +3 -0
@@ -52,6 +52,9 @@ soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
arch/powerpc/boot/dts/p1020rdb-pc_36b.dts +3 -0
@@ -53,6 +53,9 @@ soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
arch/powerpc/boot/dts/p1020rdb_36b.dts +3 -0
@@ -29,6 +29,9 @@ board_soc: soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
arch/powerpc/boot/dts/p1022ds_36b.dts +3 -0
@@ -51,6 +51,9 @@ board_soc: soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
arch/powerpc/boot/dts/p1024rdb_36b.dts +3 -0
@@ -49,6 +49,9 @@ soc: soc at fffe00000 { ranges = <0x0 0xf 0xffe00000 0x100000>; + tdm at 16000 { + status = "disabled"; + }; }; pci0: pcie at fffe09000 {
Signature · 1 line
1.7.6.GIT
Re: [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms
Quoted 1 line · Sandeep Singh
arch/powerpc/boot/dts/p1022ds_36b.dts| 3 +++
You forgot to update p1022ds_3b.dts.
Quoted 2 lines
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
Do not update the copyright year in patches.
Signature · 2 lines
Timur Tabi Linux kernel developer at Freescale
Re: [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms
Quoted 2 lines · Timur Tabi
You forgot to update
p1022ds_3b.dts.
I meant p1022ds_32b.dts -- the 32-bit DTS for the P1022DS.
Signature · 2 lines
Timur Tabi Linux kernel developer at Freescale
RE: [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms
In reply to Timur TabiQuoted 11 lines
-----Original Message-----
From: Timur Tabi [mailto:[email protected]]
Sent: Friday, March 08, 2013 10:17 PM
To: Singh Sandeep-B37400
Cc: [email protected]; Aggrwal Poonam-B10812
Subject: Re: [PATCH 3/4] TDM Device Tree entries for various Freescale Platforms
=20
On Thu, Mar 7, 2013 at 5:27 AM, Sandeep Singh <[email protected]> wrote:
Quoted 3 lines
Quoted 1 line
arch/powerpc/boot/dts/p1022ds_36b.dts| 3 +++=20
You forgot to updatep1022ds_3b.dts.
p1022ds_32b.dts includes "fsl/p1022si-post.dtsi" which is getting updated.
Quoted 5 lines
=20
Quoted 2 lines
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.=20
Do not update the copyright year in patches.
Ok, will correct this.
Quoted 4 lines
=20
--
Timur Tabi
Linux kernel developer at Freescale
PATCH 4/4 Added device tree entries for Legerity SLIC node on various Freescale Platforms
In reply to Sandeep SinghSLIC device is connected on SPI bus on these platforms
--- arch/powerpc/boot/dts/p1010rdb.dtsi | 13 ++++++++++++- arch/powerpc/boot/dts/p1020mbg-pc.dtsi | 19 +++++++++++++++++++ arch/powerpc/boot/dts/p1020rdb-pc.dtsi | 18 ++++++++++++++++++ arch/powerpc/boot/dts/p1020rdb.dtsi | 17 +++++++++++++++++ arch/powerpc/boot/dts/p1022ds.dtsi | 17 +++++++++++++++++ arch/powerpc/boot/dts/p1024rdb.dtsi | 18 ++++++++++++++++++ 6 files changed, 101 insertions(+), 1 deletions(-)
arch/powerpc/boot/dts/p1010rdb.dtsi +12 -1
@@ -1,7 +1,7 @@ /* * P1010 RDB Device Tree Source stub (no addresses or top-level ranges) * - * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2011-2012 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met:
@@ -184,8 +184,19 @@ label = "SPI Flash JFFS2 RFS"; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <0>; + spi-max-frequency = <8000000>; + }; }; + tdm at 16000 { + num-phy = <1>; + phy-handle = <&tdm_phy_0>; + }; + usb at 22000 { phy_type = "utmi"; dr_mode = "host";
arch/powerpc/boot/dts/p1020mbg-pc.dtsi +19 -0
@@ -93,6 +93,25 @@ }; }; + spi at 7000 { + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; + }; + + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; + }; + mdio at 24000 { phy0: ethernet-phy at 0 { interrupts = <3 1 0 0>;
arch/powerpc/boot/dts/p1020rdb-pc.dtsi +18 -0
@@ -186,6 +186,24 @@ label = "file system jffs2"; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; + + }; + + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; }; usb at 22000 {
arch/powerpc/boot/dts/p1020rdb.dtsi +17 -0
@@ -186,6 +186,23 @@ label = "file system jffs2"; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; + }; + + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; }; usb at 22000 {
arch/powerpc/boot/dts/p1022ds.dtsi +17 -0
@@ -183,6 +183,18 @@ reg = <0x00700000 0x00900000>; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; }; ssi at 15000 {
@@ -191,6 +203,11 @@ fsl,ssi-asynchronous; }; + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; + }; + usb at 22000 { phy_type = "ulpi"; };
arch/powerpc/boot/dts/p1024rdb.dtsi +18 -0
@@ -164,6 +164,19 @@ label = "SPI JFFS2 RFS"; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; + }; i2c at 3000 {
@@ -173,6 +186,11 @@ }; }; + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; + }; + usb at 22000 { phy_type = "ulpi"; };
Signature · 1 line
1.7.6.GIT
PATCH 4/4 Added device tree entries for Legerity SLIC node on various Freescale Platforms
Quoted 26 lines · Sandeep Singh
arch/powerpc/boot/dts/p1024rdb.dtsi +13
-0@@ -164,6 +164,19 @@ label = "SPI JFFS2 RFS"; }; }; + + tdm_phy_0: slic at 0 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <1>; + spi-max-frequency = <8000000>; + }; + + tdm_phy_1: slic at 1 { + compatible = "zarlink,le88266", "tdm-phy-slic"; + reg = <2>; + spi-max-frequency = <8000000>; + }; + }; i2c at 3000 {@@ -173,6 +186,11 @@ };
arch/powerpc/boot/dts/p1024rdb.dtsi line 196
Quoted 10 lines
arch/powerpc/boot/dts/p1024rdb.dtsi +5
-0}; + tdm at 16000 { + num-phy = <2>; + phy-handle = <&tdm_phy_0>, <&tdm_phy_1>; + }; + usb at 22000 { phy_type = "ulpi"; };
Whitespace
What is "tdm-phy-slic"? "num-phy"? Document these in the binding and use proper vendor prefixes.
Why "<&tdm_phy_0>, <&tdm_phy_1>" rather than "<&tdm_phy_0 &tdm_phy_1>"? And can you just use the length of phy-handle rather than having a separate num-phy property?
-Scott
PATCH 1/4 Device tree entry for Freescale TDM controller
In reply to Sandeep SinghI know I'm probably missing something... but... why are these patches copied to the ARM list? They appear to be PowerPC patches.
Quoted 67 lines · Sandeep Singh
Added dtsi file for Freescale TDM controller.
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010, P1022 and P1024Signed-off-by Sandeep Singh <[email protected]>Signed-off-by Poonam Aggrwal <[email protected]>--- arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi | 42 +++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsiarch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +42
-0@@ -0,0 +1,42 @@ +/* + * PQ3 TDM device tree stub [ controller @ offset 0x16000 ] + * + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + tdm_tx_clk = <2048000>; + interrupts = <62 8 0 0>; + fsl,max-time-slots = <128>; +};Signature · 8 lines
1.7.6.GIT _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/4 Device tree entry for Freescale TDM controller
Quoted 10 lines
-----Original Message-----
From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
Sent: Thursday, March 07, 2013 7:04 PM
To: Singh Sandeep-B37400
Cc: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org; Aggrwal Poonam-B10812
Subject: Re: [PATCH 1/4] Device tree entry for Freescale TDM controllerI know I'm probably missing something... but... why are these patches copied to the ARM list? They appear to be PowerPC patches.
There was a request from few ARM Linux developers that they were interested in developing TDM subsystem for ARM and would like to see TDM patches in ARM mailing list. Just trying to oblige
Quoted 91 lines · Sandeep Singh
Quoted 8 lines
Added dtsi file for Freescale TDM controller.
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010,
P1022 and P1024Signed-off-by Sandeep Singh <[email protected]>Signed-off-by Poonam Aggrwal <[email protected]>--- arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi | 42+++++++++++++++++++++++++++
Quoted 10 lines
1 files changed, 42 insertions(+), 0 deletions(-) create mode 100644
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsiarch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +0
-0arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 7
Quoted 7 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +7
-0@@ -0,0 +1,42 @@ +/* + * PQ3 TDM device tree stub [ controller @ offset 0x16000 ] + * + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditionsare met:
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 8
Quoted 1 line
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +1
-0+ * * Redistributions of source code must retain the abovecopyright
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 10
Quoted 2 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +2
-0+ * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the abovecopyright
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 11
Quoted 1 line
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +1
-0+ * notice, this list of conditions and the following disclaimerin the
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 12
Quoted 1 line
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +1
-0+ * documentation and/or other materials provided with thedistribution.
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 14
Quoted 2 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +2
-0+ * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promoteproducts
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 15
Quoted 1 line
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +1
-0+ * derived from this software without specific prior writtenpermission.
Quoted 48 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +39
-1+ * + * + * ALTERNATIVELY, this software may be distributed under the terms of +the + * GNU General Public License ("GPL") as published by the Free +Software + * Foundation, either version 2 of that License or (at your option) +any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND +ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE +FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + tdm_tx_clk = <2048000>; + interrupts = <62 8 0 0>; + fsl,max-time-slots = <128>; +}; --1.7.6.GIT
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PATCH 1/4 Device tree entry for Freescale TDM controller
In reply to Sandeep SinghAny comments on this patch set??
Regards,
Sandeep
Quoted 6 lines
-----Original Message-----
From: Singh Sandeep-B37400
Sent: Thursday, March 07, 2013 4:58 PM
To: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org
Cc: Singh Sandeep-B37400; Aggrwal Poonam-B10812
Subject: [PATCH 1/4] Device tree entry for Freescale TDM controller
PATCH 1/4 Device tree entry for Freescale TDM controller
A gentle reminder.
Any comments are appreciated.
Regards,
Sandeep
Quoted 26 lines
-----Original Message-----
From: Linuxppc-dev [mailto:linuxppc-dev- bounces+sandeep=freescale.com at lists.ozlabs.org] On Behalf Of Singh Sandeep-B37400
Sent: Wednesday, March 20, 2013 4:22 PM
To: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org
Cc: Aggrwal Poonam-B10812
Subject: RE: [PATCH 1/4] Device tree entry for Freescale TDM controllerAny comments on this patch set??
Regards,
SandeepQuoted 6 lines
-----Original Message-----
From: Singh Sandeep-B37400
Sent: Thursday, March 07, 2013 4:58 PM
To: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org
Cc: Singh Sandeep-B37400; Aggrwal Poonam-B10812
Subject: [PATCH 1/4] Device tree entry for Freescale TDM controller_______________________________________________
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PATCH 1/4 Device tree entry for Freescale TDM controller
In reply to Sandeep Singharch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 42
Quoted 8 lines · Sandeep Singh
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +8
-0+tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + tdm_tx_clk = <2048000>; + interrupts = <62 8 0 0>; + fsl,max-time-slots = <128>; +};
tdm_tx_clk isn't in the binding (and should be named fsl,tdm-tx-clk if it is meant to be here at all).
-Scott
PATCH 1/4 Device tree entry for Freescale TDM controller
Quoted 9 lines
-----Original Message-----
From: Wood Scott-B07421
Sent: 29 June 2013 03:46
To: Singh Sandeep-B37400
Cc: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org; Aggrwal Poonam-B10812
Subject: Re: [1/4] Device tree entry for Freescale TDM controllerOn Thu, Mar 07, 2013 at 04:57:45PM +0530, Sandeep Singh wrote:
Quoted 11 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi line 42
Quoted 8 lines
arch/powerpc/boot/dts/fsl/pq3-tdm1.0-0.dtsi new file +8
-0+tdm at 16000 { + compatible = "fsl,tdm1.0"; + reg = <0x16000 0x200 0x2c000 0x2000>; + clock-frequency = <0>; + tdm_tx_clk = <2048000>; + interrupts = <62 8 0 0>; + fsl,max-time-slots = <128>; +};
tdm_tx_clkisn't in the binding (and should be named fsl,tdm-tx-clk if it is meant to be here at all).
I will add it in the binding.
Thanks,
Sandeep
Quoted 2 lines
-Scott