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Initial Device Tree support for S3C64xx

PATCH Superseded Tomasz Figa 7 participants 31 messages Apr 15, 2013 – Apr 25, 2013

Subsystems (10)

v5 of 9 Superseded Latest is v9 →

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#0 lore raw

v5 cover Initial Device Tree support for S3C64xx

This series adds Device Tree support for Samsung S3C64xx SoC series.

It fixes several problems preventing from booting an S3C64xx-based system using Device Tree, adds all the infrastructure for Device Tree-based board support, including mach-s3c64xx-dt and dts include files for S3C64xx SoCs, and basic device tree source for FriendlyARM Mini6410 board.

Current support is very limited and allows only basic bootup with UART and SDHCI, but should be fine as a start and will be extended in future, hopefully with help of S3C64xx board maintainers.

This series depends on my other series reworking samsung-time for multiplatform:
[PATCH v5 00/14] ARM: samsung-time: Prepare for multiplatform support
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/17864

Changes since v4:
- Rebased onto current for-next branch of Kgene's tree
- Added support for pinctrl (driver merged through pinctrl tree)
- Added labels to all nodes that can be overridden from board dts
- Modified board dts to use the &label syntax to reference device nodes

Changes since v3:
- Rebased onto current for-next branch of Kgene's tree
- Updated timer node for next version of samsung-time patches
- Replaced local s3c64xx_dt_init_irq with irqchip_init

Changes since v2:
- Updated timer node for next version of samsung-time patches

Changes since v1:
- Dropped two VIC-related patches that are no longer necessary
- Added Device Tree-based instantation of system timers
- Corrected VIC interrupt specifiers
- Adjusted CPU compatible values and dropped @id

Tomasz Figa (6):
ARM: common: vic: Parse interrupt and resume masks from device tree
ARM: s3c64xx: Skip legacy EINT setup if pinctrl-s3c64xx driver is
present
gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is
present
ARM: s3c64xx: Add board file for boot using Device Tree
ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs
ARM: dts: Add dts file for S3C6410-based Mini6410 board

 Documentation/devicetree/bindings/arm/vic.txt |   6 +
 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/s3c6400.dtsi                |  33 ++
 arch/arm/boot/dts/s3c6410-mini6410.dts        | 168 +++++++
 arch/arm/boot/dts/s3c6410.dtsi                |  33 ++
 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi        | 683 ++++++++++++++++++++++++++
 arch/arm/boot/dts/s3c64xx.dtsi                | 136 +++++
 arch/arm/mach-s3c64xx/Kconfig                 |  16 +
 arch/arm/mach-s3c64xx/Makefile                |   1 +
 arch/arm/mach-s3c64xx/common.c                |  20 +-
 arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c       |  83 ++++
 drivers/gpio/gpio-samsung.c                   |   4 +-
 drivers/irqchip/irq-vic.c                     |   7 +-
 13 files changed, 1188 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/boot/dts/s3c6400.dtsi
 create mode 100644 arch/arm/boot/dts/s3c6410-mini6410.dts
 create mode 100644 arch/arm/boot/dts/s3c6410.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx.dtsi
 create mode 100644 arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
Signature · 1 line
1.8.1.5
#1 lore raw

PATCH v5 1/6 ARM: common: vic: Parse interrupt and resume masks from device tree

This patch extends vic_of_init to parse valid interrupt sources and resume sources masks from device tree.

If mask values are not specified in device tree, all sources are assumed to be valid, as before this patch.

---
 Documentation/devicetree/bindings/arm/vic.txt | 6 ++++++
 drivers/irqchip/irq-vic.c                     | 7 ++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/arm/vic.txt +6 -0
index 266716b..bb7137c 100644
@@ -18,6 +18,9 @@ Required properties:
 Optional properties:
 
 - interrupts : Interrupt source for parent controllers if the VIC is nested.
+- interrupt-mask : Bit mask of valid interrupt sources (defaults to all valid)
+- wakeup-mask : Bit mask of interrupt sources that can wake up the system
+  (defaults to all allowed)
 
 Example:
 
@@ -26,4 +29,7 @@ Example:
 		interrupt-controller;
 		#interrupt-cells = <1>;
 		reg = <0x60000 0x1000>;
+
+		interrupt-mask = <0xffffff7f>;
+		wakeup-mask = <0x0000ff7f>;
 	};
drivers/irqchip/irq-vic.c +6 -1
index 3cf97aa..61602df 100644
@@ -468,6 +468,8 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 int __init vic_of_init(struct device_node *node, struct device_node *parent)
 {
 	void __iomem *regs;
+	u32 interrupt_mask = ~0;
+	u32 wakeup_mask = ~0;
 
 	if (WARN(parent, "non-root VICs are not supported"))
 		return -EINVAL;
@@ -476,10 +478,13 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
 	if (WARN_ON(!regs))
 		return -EIO;
 
+	of_property_read_u32(node, "interrupt-mask", &interrupt_mask);
+	of_property_read_u32(node, "wakeup-mask", &wakeup_mask);
+
 	/*
 	 * Passing 0 as first IRQ makes the simple domain allocate descriptors
 	 */
-	__vic_init(regs, 0, ~0, ~0, node);
+	__vic_init(regs, 0, interrupt_mask, wakeup_mask, node);
 
 	return 0;
 }
Signature · 1 line
1.8.1.5
#2 lore raw

PATCH v5 2/6 ARM: s3c64xx: Skip legacy EINT setup if pinctrl-s3c64xx driver is present

In reply to Tomasz Figa

The new pinctrl-s3c64xx is responsible for EINT handling on DT-enabled platforms.

---
 arch/arm/mach-s3c64xx/common.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)
arch/arm/mach-s3c64xx/common.c +19 -1
index e79ca92..866be9e 100644
@@ -365,7 +365,25 @@ static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
 static int __init s3c64xx_init_irq_eint(void)
 {
 	int irq;
-
+#if defined(CONFIG_PINCTRL_S3C64XX)
+	/*
+	* This gpio driver includes support for device tree support and there
+	* are platforms using it. In order to maintain compatibility with those
+	* platforms, and to allow non-dt Exynos4210 platforms to use this
+	* gpiolib support, a check is added to find out if there is a active
+	* pin-controller driver support available. If it is available, this
+	* gpiolib support is ignored and the gpiolib support available in
+	* pin-controller driver is used. This is a temporary check and will go
+	* away when all of the Exynos4210 platforms have switched to using
+	* device tree and the pin-ctrl driver.
+	*/
+	struct device_node *pctrl_np;
+
+	pctrl_np = of_find_compatible_node(NULL, NULL,
+						"samsung,s3c64xx-pinctrl");
+	if (pctrl_np && of_device_is_available(pctrl_np))
+		return -ENODEV;
+#endif
 	for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
 		irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
 		irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
Signature · 1 line
1.8.1.5
maintainer
#3 lore raw

PATCH v5 2/6 ARM: s3c64xx: Skip legacy EINT setup if pinctrl-s3c64xx driver is present

arch/arm/mach-s3c64xx/common.c static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc) · line 373

Quoted 4 lines · Tomasz Figa
arch/arm/mach-s3c64xx/common.c +4 -0
+	* This gpio driver includes support for device tree support and there
+	* are platforms using it. In order to maintain compatibility with those
+	* platforms, and to allow non-dt Exynos4210 platforms to use this
+	* gpiolib support, a check is added to find out if there is a active

Cut'n'paste error here.
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#4 lore raw

PATCH v5 2/6 ARM: s3c64xx: Skip legacy EINT setup if pinctrl-s3c64xx driver is present

Quoted 5 lines · On Tuesday 16 of April 2013 17:26:43 Mark Brown wrote:
Quoted 4 lines · Tomasz Figa
(quoted diff) +1 -0
+	* This gpio driver includes support for device tree support and

there

(quoted diff) +1 -0
+	* are platforms using it. In order to maintain compatibility with

those + * platforms, and to allow non-dt Exynos4210 platforms to

use

Quoted 1 line
Quoted 1 line

this + * gpiolib support, a check is added to find out if there

is a

Quoted 2 lines
Quoted 1 line

active

Cut'n'paste error here.

<blushed>

Thanks for catching this.

Best regards,
Tomasz

#5 lore raw

PATCH v6 2/6 ARM: s3c64xx: Skip legacy EINT setup if pinctrl-s3c64xx driver is present

In reply to Mark Brown

The new pinctrl-s3c64xx is responsible for EINT handling on DT-enabled platforms.

---
 arch/arm/mach-s3c64xx/common.c | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/mach-s3c64xx/common.c +4 -0
index e79ca92..5053879 100644
@@ -366,6 +366,10 @@ static int __init s3c64xx_init_irq_eint(void)
 {
 	int irq;
 
+	/* On DT-enabled systems EINTs are handled by pinctrl-s3c64xx driver. */
+	if (of_have_populated_dt())
+		return -ENODEV;
+
 	for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
 		irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
 		irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
Signature · 1 line
1.8.1.5
#6 lore raw

PATCH v5 3/6 gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is present

In reply to Tomasz Figa

The new driver handles GPIO on DT-enabled platforms.

---
 drivers/gpio/gpio-samsung.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/gpio/gpio-samsung.c +3 -1
index 99e0fa4..dc06a6f 100644
@@ -3012,7 +3012,7 @@ static __init int samsung_gpiolib_init(void)
 	int i, nr_chips;
 	int group = 0;
 
-#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
+#if defined(CONFIG_PINCTRL_SAMSUNG) || defined(CONFIG_PINCTRL_EXYNOS5440)
 	/*
 	* This gpio driver includes support for device tree support and there
 	* are platforms using it. In order to maintain compatibility with those
@@ -3026,10 +3026,12 @@ static __init int samsung_gpiolib_init(void)
 	*/
 	struct device_node *pctrl_np;
 	static const struct of_device_id exynos_pinctrl_ids[] = {
+		{ .compatible = "samsung,s3c64xx-pinctrl", },
 		{ .compatible = "samsung,exynos4210-pinctrl", },
 		{ .compatible = "samsung,exynos4x12-pinctrl", },
 		{ .compatible = "samsung,exynos5250-pinctrl", },
 		{ .compatible = "samsung,exynos5440-pinctrl", },
+		{ },
 	};
 	for_each_matching_node(pctrl_np, exynos_pinctrl_ids)
 		if (pctrl_np && of_device_is_available(pctrl_np))
Signature · 1 line
1.8.1.5
maintainer
#7 lore raw

PATCH v5 3/6 gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is present

drivers/gpio/gpio-samsung.c static __init int samsung_gpiolib_init(void) · line 3034

Quoted 4 lines · Tomasz Figa
drivers/gpio/gpio-samsung.c +1 -0
 		{ .compatible = "samsung,exynos4x12-pinctrl", },
 		{ .compatible = "samsung,exynos5250-pinctrl", },
 		{ .compatible = "samsung,exynos5440-pinctrl", },
+		{ },

Strictly speaking this is a separate bug fix (though I see that's
already in -next separately anyway so whatever).
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#8 lore raw

PATCH v5 3/6 gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is present

Quoted 9 lines · On Tuesday 16 of April 2013 17:27:50 Mark Brown wrote:

drivers/gpio/gpio-samsung.c static __init int samsung_gpiolib_init(void) · line 3034

Quoted 5 lines · Tomasz Figa
drivers/gpio/gpio-samsung.c +1 -0
 		{ .compatible = "samsung,exynos4x12-pinctrl", },
 		{ .compatible = "samsung,exynos5250-pinctrl", },
 		{ .compatible = "samsung,exynos5440-pinctrl", },
 
+		{ },

Strictly speaking this is a separate bug fix (though I see that's already in -next separately anyway so whatever).

Right. But this fix is so small that I thought it would be a major waste of mail server processing power to send it as a separate patch.

Best regards,
Tomasz

maintainer
#9 lore raw

PATCH v5 3/6 gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is present

Quoted 7 lines · Tomasz Figa
Quoted 2 lines · On Tuesday 16 of April 2013 17:27:50 Mark Brown wrote:

Strictly speaking this is a separate bug fix (though I see that's already in -next separately anyway so whatever).

Right. But this fix is so small that I thought it would be a major waste of mail server processing power to send it as a separate patch.

There's reviewer bandwidth too - one of the things people check for is
that the change is doing what it's supposed to do, extra stuff in there
is usually a red flag.
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#10 lore raw

PATCH v5 3/6 gpio: samsung: Skip legacy GPIO registration if pinctrl-s3c64xx is present

Quoted 6 lines · Mark Brown
Quoted 4 lines · Tomasz Figa
Quoted 2 lines · On Tuesday 16 of April 2013 17:27:50 Mark Brown wrote:

Strictly speaking this is a separate bug fix (though I see that's already in -next separately anyway so whatever).

I agree with this.

Quoted 3 lines
Quoted 2 lines

Right. But this fix is so small that I thought it would be a major waste of mail server processing power to send it as a separate patch.

But the fix would be value...

Quoted 3 lines

There's reviewer bandwidth too - one of the things people check for is that the change is doing what it's supposed to do, extra stuff in there is usually a red flag.

Thanks.

- Kukjin

#11 lore raw

PATCH v5 4/6 ARM: s3c64xx: Add board file for boot using Device Tree

In reply to Tomasz Figa

This patch adds board file that will be used to boot S3C64xx-based boards using Device Tree.

---
 arch/arm/mach-s3c64xx/Kconfig           | 16 +++++++
 arch/arm/mach-s3c64xx/Makefile          |  1 +
 arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c | 83 +++++++++++++++++++++++++++++++++
 3 files changed, 100 insertions(+)
 create mode 100644 arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
arch/arm/mach-s3c64xx/Kconfig +16 -0
index 283cb77..184d53c 100644
@@ -311,3 +311,19 @@ config MACH_WLF_CRAGG_6410
 	select SAMSUNG_GPIO_EXTRA128
 	help
 	  Machine support for the Wolfson Cragganmore S3C6410 variant.
+
+config MACH_S3C64XX_DT
+	bool "Samsung S3C6400/S3C6410 machine using Device Tree"
+	select CLKSRC_OF
+	select CPU_S3C6400
+	select CPU_S3C6410
+	select PINCTRL
+	select PINCTRL_S3C64XX
+	select USE_OF
+	help
+	  Machine support for Samsung S3C6400/S3C6410 machines with Device Tree
+	  enabled.
+	  Select this if a fdt blob is available for your S3C64XX SoC based
+	  board.
+	  Note: This is under development and not all peripherals can be
+	  supported with this machine file.
arch/arm/mach-s3c64xx/Makefile +1 -0
index 31d0c91..5e5eb4b 100644
@@ -57,3 +57,4 @@ obj-$(CONFIG_MACH_SMARTQ7)		+= mach-smartq7.o
 obj-$(CONFIG_MACH_SMDK6400)		+= mach-smdk6400.o
 obj-$(CONFIG_MACH_SMDK6410)		+= mach-smdk6410.o
 obj-$(CONFIG_MACH_WLF_CRAGG_6410)	+= mach-crag6410.o mach-crag6410-module.o
+obj-$(CONFIG_MACH_S3C64XX_DT)		+= mach-s3c64xx-dt.o
arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c new file +83 -0

83 lines not on this page · raw message

Signature · 1 line
1.8.1.5
#12 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

In reply to Tomasz Figa

This patch adds basic device tree definitions for Samsung S3C64xx SoCs.

Since all the SoCs in the series are very similar, the files are created hierarchically - one file for the whole series and then separate files for particular SoCs including the common one.

---
 arch/arm/boot/dts/s3c6400.dtsi         |  33 ++
 arch/arm/boot/dts/s3c6410.dtsi         |  33 ++
 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 683 +++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/s3c64xx.dtsi         | 136 +++++++
 4 files changed, 885 insertions(+)
 create mode 100644 arch/arm/boot/dts/s3c6400.dtsi
 create mode 100644 arch/arm/boot/dts/s3c6410.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx.dtsi
arch/arm/boot/dts/s3c6400.dtsi new file +33 -0
new file mode 100644
index 0000000..76106b8
@@ -0,0 +1,33 @@
+/*
+ * Samsung's S3C6400 SoC device tree source
+ *
+ * Copyright (c) 2013 Tomasz Figa <[email protected]>
+ *
+ * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * S3C6400 SoC. As device tree coverage for S3C6400 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "s3c64xx.dtsi"
+
+/ {
+	compatible = "samsung,s3c6400";
+
+	vic0: interrupt-controller at 71200000 {
+		interrupt-mask = <0xfffffe1f>;
+		wakeup-mask = <0x00200004>;
+	};
+
+	vic1: interrupt-controller at 71300000 {
+		interrupt-mask = <0xffffffff>;
+		wakeup-mask = <0x53020000>;
+	};
+};
arch/arm/boot/dts/s3c6410.dtsi new file +33 -0
new file mode 100644
index 0000000..4a74df9
@@ -0,0 +1,33 @@
+/*
+ * Samsung's S3C6410 SoC device tree source
+ *
+ * Copyright (c) 2013 Tomasz Figa <[email protected]>
+ *
+ * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "s3c64xx.dtsi"
+
+/ {
+	compatible = "samsung,s3c6410";
+
+	vic0: interrupt-controller at 71200000 {
+		interrupt-mask = <0xffffff7f>;
+		wakeup-mask = <0x00200004>;
+	};
+
+	vic1: interrupt-controller at 71300000 {
+		interrupt-mask = <0xffffffff>;
+		wakeup-mask = <0x53020000>;
+	};
+};
arch/arm/boot/dts/s3c64xx-pinctrl.dtsi new file +683 -0

683 lines not on this page · raw message

arch/arm/boot/dts/s3c64xx.dtsi new file +136 -0

136 lines not on this page · raw message

Signature · 1 line
1.8.1.5
#13 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 18 lines · Tomasz Figa

This patch adds basic device tree definitions for Samsung S3C64xx SoCs.

Since all the SoCs in the series are very similar, the files are created hierarchically - one file for the whole series and then separate files for particular SoCs including the common one.

---
 arch/arm/boot/dts/s3c6400.dtsi         |  33 ++
 arch/arm/boot/dts/s3c6410.dtsi         |  33 ++
 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 683 +++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/s3c64xx.dtsi         | 136 +++++++
 4 files changed, 885 insertions(+)
 create mode 100644 arch/arm/boot/dts/s3c6400.dtsi
 create mode 100644 arch/arm/boot/dts/s3c6410.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx.dtsi

[...]

Review

Quoted 2 lines
(quoted diff) +2 -0
+
+	vic0: interrupt-controller at 71200000 {

These nodes should be off a "simple-bus" node.

Rob

Quoted 105 lines
arch/arm/boot/dts/s3c64xx.dtsi new file +104 -0
+		compatible = "arm,pl192-vic";
+		interrupt-controller;
+		reg = <0x71200000 0x1000>;
+		#interrupt-cells = <1>;
+	};
+
+	vic1: interrupt-controller at 71300000 {
+		compatible = "arm,pl192-vic";
+		interrupt-controller;
+		reg = <0x71300000 0x1000>;
+		#interrupt-cells = <1>;
+	};
+
+	pinctrl0: pinctrl at 7f008000 {
+		compatible = "samsung,s3c64xx-pinctrl";
+		reg = <0x7f008000 0x1000>;
+		interrupt-parent = <&vic1>;
+		interrupts = <21>;
+
+		pctrl_int_map: pinctrl-interrupt-map {
+			interrupt-map = <0 &vic0 0>,
+					<1 &vic0 1>,
+					<2 &vic1 0>,
+					<3 &vic1 1>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+
+		wakeup-interrupt-controller {
+			compatible = "samsung,s3c64xx-wakeup-eint";
+			interrupts = <0>, <1>, <2>, <3>;
+			interrupt-parent = <&pctrl_int_map>;
+		};
+	};
+
+	pwm: pwm at 7f006000 {
+		compatible = "samsung,s3c6400-pwm";
+		reg = <0x7f006000 0x1000>;
+		interrupt-parent = <&vic0>;
+		interrupts = <23>, <24>, <25>, <27>, <28>;
+		samsung,pwm-outputs = <0>, <1>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
+
+	uart0: serial at 7f005000 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <5>;
+		status = "disabled";
+	};
+
+	uart1: serial at 7f005400 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005400 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <6>;
+		status = "disabled";
+	};
+
+	uart2: serial at 7f005800 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005800 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <7>;
+		status = "disabled";
+	};
+
+	uart3: serial at 7f005c00 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005c00 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <8>;
+		status = "disabled";
+	};
+
+	sdhci0: sdhci at 7c200000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c200000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <24>;
+		status = "disabled";
+	};
+
+	sdhci1: sdhci at 7c300000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c300000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <25>;
+		status = "disabled";
+	};
+
+	sdhci2: sdhci at 7c400000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c400000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <17>;
+		status = "disabled";
+	};
+};
+
+/include/ "s3c64xx-pinctrl.dtsi"
#14 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 21 lines · On Tuesday 16 of April 2013 08:09:10 Rob Herring wrote:
Quoted 9 lines · Tomasz Figa

This patch adds basic device tree definitions for Samsung S3C64xx SoCs.

Since all the SoCs in the series are very similar, the files are created hierarchically - one file for the whole series and then separate files for particular SoCs including the common one.

---

Quoted 10 lines
 arch/arm/boot/dts/s3c6400.dtsi         |  33 ++
 arch/arm/boot/dts/s3c6410.dtsi         |  33 ++
 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 683
 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/s3c64xx.dtsi        
 | 136 +++++++
 4 files changed, 885 insertions(+)
 create mode 100644 arch/arm/boot/dts/s3c6400.dtsi
 create mode 100644 arch/arm/boot/dts/s3c6410.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx.dtsi
Quoted 6 lines

[...]

Review

Quoted 2 lines
(quoted diff) +2 -0
+
+	vic0: interrupt-controller at 71200000 {

These nodes should be off a "simple-bus" node.

Hmm, is there any reason behind it?

I thought simple bus was just a convenient helper to represent hierarchical bus structures if one has a need to do so.

Best regards,
Tomasz

Quoted 111 lines

Rob

Quoted 94 lines
arch/arm/boot/dts/s3c64xx.dtsi new file +94 -0
+		compatible = "arm,pl192-vic";
+		interrupt-controller;
+		reg = <0x71200000 0x1000>;
+		#interrupt-cells = <1>;
+	};
+
+	vic1: interrupt-controller at 71300000 {
+		compatible = "arm,pl192-vic";
+		interrupt-controller;
+		reg = <0x71300000 0x1000>;
+		#interrupt-cells = <1>;
+	};
+
+	pinctrl0: pinctrl at 7f008000 {
+		compatible = "samsung,s3c64xx-pinctrl";
+		reg = <0x7f008000 0x1000>;
+		interrupt-parent = <&vic1>;
+		interrupts = <21>;
+
+		pctrl_int_map: pinctrl-interrupt-map {
+			interrupt-map = <0 &vic0 0>,
+					<1 &vic0 1>,
+					<2 &vic1 0>,
+					<3 &vic1 1>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			#interrupt-cells = <1>;
+		};
+
+		wakeup-interrupt-controller {
+			compatible = "samsung,s3c64xx-wakeup-eint";
+			interrupts = <0>, <1>, <2>, <3>;
+			interrupt-parent = <&pctrl_int_map>;
+		};
+	};
+
+	pwm: pwm at 7f006000 {
+		compatible = "samsung,s3c6400-pwm";
+		reg = <0x7f006000 0x1000>;
+		interrupt-parent = <&vic0>;
+		interrupts = <23>, <24>, <25>, <27>, <28>;
+		samsung,pwm-outputs = <0>, <1>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
+
+	uart0: serial at 7f005000 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <5>;
+		status = "disabled";
+	};
+
+	uart1: serial at 7f005400 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005400 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <6>;
+		status = "disabled";
+	};
+
+	uart2: serial at 7f005800 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005800 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <7>;
+		status = "disabled";
+	};
+
+	uart3: serial at 7f005c00 {
+		compatible = "samsung,s3c6400-uart";
+		reg = <0x7f005c00 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <8>;
+		status = "disabled";
+	};
+
+	sdhci0: sdhci at 7c200000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c200000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <24>;
+		status = "disabled";
+	};
+
+	sdhci1: sdhci at 7c300000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c300000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <25>;
+		status = "disabled";
+	};
+

arch/arm/boot/dts/s3c64xx.dtsi line 136

Quoted 10 lines
arch/arm/boot/dts/s3c64xx.dtsi new file +10 -0
+	sdhci2: sdhci at 7c400000 {
+		compatible = "samsung,s3c6410-sdhci";
+		reg = <0x7c400000 0x100>;
+		interrupt-parent = <&vic1>;
+		interrupts = <17>;
+		status = "disabled";
+	};
+};
+
+/include/ "s3c64xx-pinctrl.dtsi"

--
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Signature · 3 lines
Tomasz Figa
Samsung Poland R&D Center
SW Solution Development, Kernel and System Framework
#15 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 27 lines · Tomasz Figa
Quoted 26 lines · On Tuesday 16 of April 2013 08:09:10 Rob Herring wrote:
Quoted 19 lines · Tomasz Figa

This patch adds basic device tree definitions for Samsung S3C64xx SoCs.

Since all the SoCs in the series are very similar, the files are created hierarchically - one file for the whole series and then separate files for particular SoCs including the common one.

---

 arch/arm/boot/dts/s3c6400.dtsi         |  33 ++
 arch/arm/boot/dts/s3c6410.dtsi         |  33 ++
 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 683
 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/s3c64xx.dtsi
 | 136 +++++++
 4 files changed, 885 insertions(+)
 create mode 100644 arch/arm/boot/dts/s3c6400.dtsi
 create mode 100644 arch/arm/boot/dts/s3c6410.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/s3c64xx.dtsi

[...]

Quoted 2 lines
(quoted diff) +2 -0
+
+   vic0: interrupt-controller at 71200000 {
Quoted 6 lines
Quoted 1 line

These nodes should be off a "simple-bus" node.

Hmm, is there any reason behind it?

I thought simple bus was just a convenient helper to represent hierarchical bus structures if one has a need to do so.

No. The DT should reflect the bus structure of the chip. How accurately it is done is up to you and the information available, but you have to have a bus of some sort.

There's obvious examples that don't follow this, but I'd like to not have more.

Rob

#16 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 6 lines · Rob Herring
Quoted 6 lines
Quoted 3 lines
Quoted 1 line

+ vic0: interrupt-controller at 71200000 {

These nodes should be off a "simple-bus" node.

Hmm, is there any reason behind it?

Quoted 9 lines
Quoted 2 lines

I thought simple bus was just a convenient helper to represent hierarchical bus structures if one has a need to do so.

No. The DT should reflect the bus structure of the chip. How accurately it is done is up to you and the information available, but you have to have a bus of some sort.

There's obvious examples that don't follow this, but I'd like to not have more.

Tomasz, can you address comments?

Thanks.

- Kukjin

#17 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 11 lines · On Tuesday 23 of April 2013 23:29:32 Kukjin Kim wrote:
Quoted 10 lines · Rob Herring
Quoted 9 lines
Quoted 3 lines
Quoted 1 line

+ vic0: interrupt-controller at 71200000 {

These nodes should be off a "simple-bus" node.

Hmm, is there any reason behind it?

I thought simple bus was just a convenient helper to represent hierarchical
bus structures if one has a need to do so.

Quoted 7 lines
Quoted 6 lines

No. The DT should reflect the bus structure of the chip. How accurately it is done is up to you and the information available, but you have to have a bus of some sort.

There's obvious examples that don't follow this, but I'd like to not have more.

Tomasz, can you address comments?

Please discard this series for now.

I've decided to post it for 3.11, including a driver for Common Clock Framework and several cleanup patches, which I have ready and waiting.

Best regards,

Signature · 3 lines
Tomasz Figa
Samsung Poland R&D Center
SW Solution Development, Kernel and System Framework
#18 lore raw

PATCH v5 5/6 ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs

Quoted 4 lines · Tomasz Figa
Quoted 1 line

Tomasz, can you address comments?

Please discard this series for now.

OK.

Quoted 3 lines

I've decided to post it for 3.11, including a driver for Common Clock Framework and several cleanup patches, which I have ready and waiting.

Sounds good.

Thanks.

- Kukjin

#19 lore raw

PATCH v5 6/6 ARM: dts: Add dts file for S3C6410-based Mini6410 board

In reply to Tomasz Figa

This patch adds basic device tree sources for FriendlyARM Mini6410 board based on Samsung S3C6410 SoC.

---
 arch/arm/boot/dts/Makefile             |   1 +
 arch/arm/boot/dts/s3c6410-mini6410.dts | 168 +++++++++++++++++++++++++++++++++
 2 files changed, 169 insertions(+)
 create mode 100644 arch/arm/boot/dts/s3c6410-mini6410.dts
arch/arm/boot/dts/Makefile +1 -0
index 11fef62..5885c37 100644
@@ -138,6 +138,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
 	hrefprev60.dtb \
 	hrefv60plus.dtb \
 	ccu9540.dtb
+dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
 	r8a7740-armadillo800eva.dtb \
 	sh73a0-kzm9g.dtb \
arch/arm/boot/dts/s3c6410-mini6410.dts new file +168 -0

168 lines not on this page · raw message

Signature · 1 line
1.8.1.5
maintainer
#20 lore raw

v5 cover Initial Device Tree support for S3C64xx

In reply to Tomasz Figa
Quoted 6 lines · Tomasz Figa

This series adds Device Tree support for Samsung S3C64xx SoC series.

It fixes several problems preventing from booting an S3C64xx-based system using Device Tree, adds all the infrastructure for Device Tree-based board support, including mach-s3c64xx-dt and dts include files for S3C64xx SoCs, and basic device tree source for FriendlyARM Mini6410 board.

I tried to test this but the pinctrl driver doesn't build in -next (drivers/pinctrl/pinctrl-s3c64xx.c:418:9: error: undefined identifier 'chained_irq_enter') - will check properly tomorrow, need to leave now. But that's separate anyway. :P

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#21 lore raw

PATCH 1/2 pinctrl: s3c64xx: Fix build error caused by undefined chained_irq_enter

Commit de88cbb7 moved definitions of chained_irq_enter and chained_irq_exit to a generic header, which must be now included instead of the legacy arch-specific one.

This patch fixes build error caused by including the legacy header leading to undefined chained_irq_enter and chained_irq_exit symbols.

---
 drivers/pinctrl/pinctrl-s3c64xx.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/pinctrl/pinctrl-s3c64xx.c +1 -2
index b5d1c4a..89143c9 100644
@@ -22,11 +22,10 @@
 #include <linux/irq.h>
 #include <linux/of_irq.h>
 #include <linux/io.h>
+#include <linux/irqchip/chained_irq.h>
 #include <linux/slab.h>
 #include <linux/err.h>
 
-#include <asm/mach/irq.h>
-
 #include "pinctrl-samsung.h"
 
 #define NUM_EINT0		28
Signature · 1 line
1.8.1.5
#22 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Commit f67faf487 added driver data for Exynos5250, which is available only if CONFIG_PINCTRL_EXYNOS is enabled. However probably due to merge error, the reference to this driver data structure was located outside of relevant ifdef and compiled unconditionally, leading to link error with CONFIG_PINCTRL_EXYNOS.

This patch fixes mentioned link error by moving driver data entry under ifdef CONFIG_PINCTRL_EXYNOS.

---
 drivers/pinctrl/pinctrl-samsung.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pinctrl/pinctrl- renamed from drivers/pinctrl/pinctrl-samsung.c +0 -0

samsung.c
index f95dd69..9763668 100644

drivers/pinctrl/pinctrl-samsung.c +0 -0
@@ -970,13 +970,13 @@ static const struct of_device_id 

samsung_pinctrl_dt_match[] = {
.data = (void *)exynos4210_pin_ctrl },
{ .compatible = "samsung,exynos4x12-pinctrl",
.data = (void *)exynos4x12_pin_ctrl },
+ { .compatible = "samsung,exynos5250-pinctrl",
+ .data = (void *)exynos5250_pin_ctrl },
#endif
#ifdef CONFIG_PINCTRL_S3C64XX
{ .compatible = "samsung,s3c64xx-pinctrl",
.data = s3c64xx_pin_ctrl },
#endif
- { .compatible = "samsung,exynos5250-pinctrl",
- .data = (void *)exynos5250_pin_ctrl },
{},
};
MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);

Signature · 1 line
1.8.1.5
#23 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Quoted 10 lines · Tomasz Figa

Commit f67faf487 added driver data for Exynos5250, which is available only if CONFIG_PINCTRL_EXYNOS is enabled. However probably due to merge error, the reference to this driver data structure was located outside of relevant ifdef and compiled unconditionally, leading to link error with CONFIG_PINCTRL_EXYNOS.

This patch fixes mentioned link error by moving driver data entry under ifdef CONFIG_PINCTRL_EXYNOS.

This does not apply to my "devel" branch in the pinctrl tree.

Could you rebase it on that branch?

Or is the error not even in my tree?

Yours,
Linus Walleij

#24 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Hi Linus,

Quoted 10 lines · On Tuesday 23 of April 2013 14:03:12 Linus Walleij wrote:
Quoted 9 lines · Tomasz Figa

Commit f67faf487 added driver data for Exynos5250, which is available only if CONFIG_PINCTRL_EXYNOS is enabled. However probably due to merge error, the reference to this driver data structure was located outside of relevant ifdef and compiled unconditionally, leading to link error with CONFIG_PINCTRL_EXYNOS.

This patch fixes mentioned link error by moving driver data entry under ifdef CONFIG_PINCTRL_EXYNOS.

Quoted 7 lines
Quoted 1 line

This does not apply to my "devel" branch in the pinctrl tree.

Could you rebase it on that branch?

Or is the error not even in my tree?

This one got sent incorrectly due to my mistake. Please try the correct version:

[PATCH RESEND 2/2] pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Best regards,

Signature · 3 lines
Tomasz Figa
Samsung Poland R&D Center
SW Solution Development, Kernel and System Framework
#25 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Quoted 6 lines · Tomasz Figa
Quoted 4 lines · On Tuesday 23 of April 2013 14:03:12 Linus Walleij wrote:

This does not apply to my "devel" branch in the pinctrl tree.

Could you rebase it on that branch?

Quoted 7 lines
Quoted 1 line

Or is the error not even in my tree?

This one got sent incorrectly due to my mistake. Please try the correct version:

[PATCH RESEND 2/2] pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

This does not apply either.

Can you please test against the "devel" branch in the pinctrl tree?

Yours,
Linus Walleij

#26 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Quoted 11 lines · On Wednesday 24 of April 2013 16:27:09 Linus Walleij wrote:
Quoted 10 lines · Tomasz Figa
Quoted 5 lines · On Tuesday 23 of April 2013 14:03:12 Linus Walleij wrote:

This does not apply to my "devel" branch in the pinctrl tree.

Could you rebase it on that branch?

Or is the error not even in my tree?

This one got sent incorrectly due to my mistake. Please try the correct version:

Quoted 6 lines
Quoted 2 lines

[PATCH RESEND 2/2] pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

This does not apply either.

Can you please test against the "devel" branch in the pinctrl tree?

Right, it does not apply.

Well, actually it does with git am -3, but it is incorrect, since the problem it intends to fix is not present in your tree, but rather is a merge error in linux-next in a merge of Kgene's and your tree...

Best regards,

Signature · 3 lines
Tomasz Figa
Samsung Poland R&D Center
SW Solution Development, Kernel and System Framework
#27 lore raw

PATCH 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

Quoted 17 lines · Tomasz Figa
Quoted 16 lines · On Wednesday 24 of April 2013 16:27:09 Linus Walleij wrote:
Quoted 5 lines · Tomasz Figa
Quoted 4 lines · On Tuesday 23 of April 2013 14:03:12 Linus Walleij wrote:

This does not apply to my "devel" branch in the pinctrl tree.

Could you rebase it on that branch?

Quoted 7 lines
Quoted 1 line

Or is the error not even in my tree?

This one got sent incorrectly due to my mistake. Please try the correct version:

[PATCH RESEND 2/2] pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

This does not apply either.

Quoted 7 lines
Quoted 1 line

Can you please test against the "devel" branch in the pinctrl tree?

Right, it does not apply.

Well, actually it does with git am -3, but it is incorrect, since the problem it intends to fix is not present in your tree, but rather is a merge error in linux-next in a merge of Kgene's and your tree...

Oh. Then you have to send the patch to Stephen Rothwell.

Yours,
Linus Walleij

#28 lore raw

PATCH RESEND 2/2 pinctrl: samsung: Fix link error with CONFIG_PINCTRL_EXYNOS disabled

In reply to Tomasz Figa

Commit f67faf487 added driver data for Exynos5250, which is available only if CONFIG_PINCTRL_EXYNOS is enabled. However probably due to merge error, the reference to this driver data structure was located outside of relevant ifdef and compiled unconditionally, leading to link error with CONFIG_PINCTRL_EXYNOS.

This patch fixes mentioned link error by moving driver data entry under ifdef CONFIG_PINCTRL_EXYNOS.

---
 drivers/pinctrl/pinctrl-samsung.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pinctrl/pinctrl-samsung.c +2 -2
index f95dd69..9763668 100644
@@ -970,13 +970,13 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
 		.data = (void *)exynos4210_pin_ctrl },
 	{ .compatible = "samsung,exynos4x12-pinctrl",
 		.data = (void *)exynos4x12_pin_ctrl },
+	{ .compatible = "samsung,exynos5250-pinctrl",
+		.data = (void *)exynos5250_pin_ctrl },
 #endif
 #ifdef CONFIG_PINCTRL_S3C64XX
 	{ .compatible = "samsung,s3c64xx-pinctrl",
 		.data = s3c64xx_pin_ctrl },
 #endif
-	{ .compatible = "samsung,exynos5250-pinctrl",
-		.data = (void *)exynos5250_pin_ctrl },
 	{},
 };
 MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
Signature · 1 line
1.8.1.5
#29 lore raw

PATCH 1/2 pinctrl: s3c64xx: Fix build error caused by undefined chained_irq_enter

In reply to Tomasz Figa
Quoted 8 lines · Tomasz Figa

Commit de88cbb7 moved definitions of chained_irq_enter and chained_irq_exit to a generic header, which must be now included instead of the legacy arch-specific one.

This patch fixes build error caused by including the legacy header leading to undefined chained_irq_enter and chained_irq_exit symbols.

Patch applied.

Thanks!
Linus Walleij

maintainer
#30 lore raw

v5 cover Initial Device Tree support for S3C64xx

In reply to Tomasz Figa
Quoted 6 lines · Tomasz Figa

This series adds Device Tree support for Samsung S3C64xx SoC series.

It fixes several problems preventing from booting an S3C64xx-based system using Device Tree, adds all the infrastructure for Device Tree-based board support, including mach-s3c64xx-dt and dts include files for S3C64xx SoCs, and basic device tree source for FriendlyARM Mini6410 board.

in the non-DT case :P
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