am335x_evm: Drop useless CONFIG_ENV_IS_NOWHERE

We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define of NOWHERE.

---
 include/configs/am335x_evm.h |    4 ----
 1 file changed, 4 deletions(-)

index ef00306..945ec09 100644
@@ -298,8 +298,6 @@
 #define CONFIG_ENV_OVERWRITE		1
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
-#define CONFIG_ENV_IS_NOWHERE
-
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK

@@ -434,7 +432,6 @@
  * 0x442000 - 0x800000 : Userland
  */
 #if defined(CONFIG_SPI_BOOT)
-# undef CONFIG_ENV_IS_NOWHERE
 # define CONFIG_ENV_IS_IN_SPI_FLASH
 # define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_ENV_OFFSET		(892 << 10) /* 892 KiB in */

@@ -481,7 +478,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
 							   devices */
 #if !defined(CONFIG_SPI_BOOT)
-#undef CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */

1.7.9.5

---
 include/configs/am335x_evm.h |    7 +++++++
 1 file changed, 7 insertions(+)

index 945ec09..004a06a 100644
@@ -436,6 +436,13 @@
 # define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_ENV_OFFSET		(892 << 10) /* 892 KiB in */
 # define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:128k(SPL)," \
+					"128k(SPL.backup1)," \
+					"128k(SPL.backup2)," \
+					"128k(SPL.backup3),384k(u-boot)," \
+					"4k(u-boot-env),3464k(kernel),-(rootfs)"
 #endif /* SPI support */
 
 /* Unsupported features */

1.7.9.5

Tom> Signed-off-by: Tom Rini <[email protected]>
Tom> ---

 Tom>  include/configs/am335x_evm.h |    7 +++++++

Tom> 1 file changed, 7 insertions(+)

Tom> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h Tom> index 945ec09..004a06a 100644
Tom> --- a/include/configs/am335x_evm.h
Tom> +++ b/include/configs/am335x_evm.h
Tom> @@ -436,6 +436,13 @@

 Tom>  # define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
 Tom>  # define CONFIG_ENV_OFFSET		(892 << 10) /* 892 KiB in */
 Tom>  # define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */

Tom> +#define CONFIG_CMD_MTDPARTS
Tom> +#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
Tom> +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(SPL)," \

physmap for a spi flash? I would have expected to see m25p80?

Tom> + "128k(SPL.backup1)," \
Tom> + "128k(SPL.backup2)," \
Tom> + "128k(SPL.backup3),384k(u-boot)," \
Tom> + "4k(u-boot-env),3464k(kernel),-(rootfs)"
Tom> #endif /* SPI support */

Tom> /* Unsupported features */
Tom> --
Tom> 1.7.9.5

Tom> _______________________________________________ Tom> U-Boot mailing list
Tom> U-Boot at lists.denx.de
Tom> http://lists.denx.de/mailman/listinfo/u-boot

Bye, Peter Korsgaard

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Yes, I'd swear it's physmap when I've tested it on the vendor kernel tree.

- --
Tom
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Or I must be misrecalling things, changed.

Tom
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Due to hardware design, we can't have NAND present (as we know of NAND today) when booting from SPI, so disable NAND then as that simplifies logic.

---
 include/configs/am335x_evm.h |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

index 004a06a..90cc1f5 100644
@@ -230,7 +230,9 @@
 /* USB Device Firmware Update support */
 #define CONFIG_DFU_FUNCTION
 #define CONFIG_DFU_MMC
+#ifdef CONFIG_NAND
 #define CONFIG_DFU_NAND
+#endif
 #define CONFIG_CMD_DFU
 #define DFU_ALT_INFO_MMC \
 	"boot part 0 1;" \

@@ -335,6 +337,7 @@
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
 
 #define CONFIG_SPL_BOARD_INIT
+#ifdef CONFIG_NAND
 #define CONFIG_SPL_NAND_AM33XX_BCH
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_BASE

@@ -365,6 +368,7 @@
 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#endif
 
 /*
  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM

@@ -466,7 +470,10 @@
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
+#if !defined(CONFIG_SPI_BOOT)
 #define CONFIG_NAND
+#endif
+
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND

@@ -484,11 +491,9 @@
 							/* CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
 							   devices */
-#if !defined(CONFIG_SPI_BOOT)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 #endif
-#endif
 
 #endif	/* ! __CONFIG_AM335X_EVM_H */

1.7.9.5

Tom> Due to hardware design, we can't have NAND present (as we know of NAND Tom> today) when booting from SPI, so disable NAND then as that simplifies Tom> logic.

Sorry, this description is not clear to me. I didn't check in detail, but as far as I remember the default pins for spi0 don't conflict with gmpc.

It's also not quite clear to me if you refer to SW support for NAND flash or the hardware component when you say 'NAND' above.

Tom> Signed-off-by: Tom Rini <[email protected]>
Tom> ---

 Tom>  include/configs/am335x_evm.h |    9 +++++++--

Tom> 1 file changed, 7 insertions(+), 2 deletions(-)

Tom> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h Tom> index 004a06a..90cc1f5 100644
Tom> --- a/include/configs/am335x_evm.h
Tom> +++ b/include/configs/am335x_evm.h
Tom> @@ -230,7 +230,9 @@

 Tom>  /* USB Device Firmware Update support */
 Tom>  #define CONFIG_DFU_FUNCTION
 Tom>  #define CONFIG_DFU_MMC
 Tom> +#ifdef CONFIG_NAND
 Tom>  #define CONFIG_DFU_NAND
 Tom> +#endif
 Tom>  #define CONFIG_CMD_DFU
 Tom>  #define DFU_ALT_INFO_MMC \
 Tom>  	"boot part 0 1;" \

Tom> @@ -335,6 +337,7 @@
Tom> #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"

Tom> #define CONFIG_SPL_BOARD_INIT
Tom> +#ifdef CONFIG_NAND

 Tom>  #define CONFIG_SPL_NAND_AM33XX_BCH
 Tom>  #define CONFIG_SPL_NAND_SUPPORT
 Tom>  #define CONFIG_SPL_NAND_BASE

Tom> @@ -365,6 +368,7 @@
Tom> #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE

Tom> #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
Tom> +#endif

Tom> /*
Tom> * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
Tom> @@ -466,7 +470,10 @@
Tom> #define CONFIG_PHY_ADDR 0
Tom> #define CONFIG_PHY_SMSC

Tom> +#if !defined(CONFIG_SPI_BOOT)
Tom> #define CONFIG_NAND
Tom> +#endif
Tom> +

 Tom>  /* NAND support */
 Tom>  #ifdef CONFIG_NAND
 Tom>  #define CONFIG_CMD_NAND
 Tom> @@ -484,11 +491,9 @@
 Tom>  							/* CS0 */
 Tom>  #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
 Tom>  							   devices */
 Tom> -#if !defined(CONFIG_SPI_BOOT)
 Tom>  #define CONFIG_ENV_IS_IN_NAND
 Tom>  #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
 Tom>  #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 Tom>  #endif

Tom> -#endif

Tom> #endif /* ! __CONFIG_AM335X_EVM_H */
Tom> --
Tom> 1.7.9.5

Tom> _______________________________________________ Tom> U-Boot mailing list
Tom> U-Boot at lists.denx.de
Tom> http://lists.denx.de/mailman/listinfo/u-boot

Bye, Peter Korsgaard

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Hash: SHA1

OK, good point. I'm talking about HW support, and it should be spelled put better. Note that we're talking about the TI GP EVM, EVM SK, BeagleBone White and BeagleBone Black here, and not custom hardware. The EVM SK does not allow for expansion such as adding NAND/NOR flash and probably not SPI. The GP EVM can have only one of NOR, NAND or SPI flash active based on the profile that is selected for the whole hardware stack. The BeagleBone White may have a "memory cape" installed which in turn can have a NAND, NOR or eMMC board plugged into it. It's not impossible someone could come up with a SPI flash cape and plug the memory cape into that, or come up with a complex breadboard solution. But lets see that happen and work before worrying about that particular permutation.

- --
Tom
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We rework the various board_is_foo() checks to take a pointer to struct am335x_baseboard_id rather than using a local copy in board.c. This allows us to make use of the same checks in mux.c as well as fixing problems when this code could be running from read-only memory.

---
 board/ti/am335x/board.c |   78 ++++++++++++++++-------------------------------
 board/ti/am335x/board.h |   31 +++++++++++++++++++
 board/ti/am335x/mux.c   |   10 +++---
 3 files changed, 62 insertions(+), 57 deletions(-)

index b371376..6f6b5d0 100644
@@ -51,43 +51,10 @@ static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
-static struct am335x_baseboard_id __attribute__((section (".data"))) header;
-
-static inline int board_is_bone(void)
-{
-	return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
-}
-
-static inline int board_is_bone_lt(void)
-{
-	return !strncmp(header.name, "A335BNLT", HDR_NAME_LEN);
-}
-
-static inline int board_is_evm_sk(void)
-{
-	return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
-}
-
-static inline int board_is_idk(void)
-{
-	return !strncmp(header.config, "SKU#02", 6);
-}
-
-static int __maybe_unused board_is_gp_evm(void)
-{
-	return !strncmp("A33515BB", header.name, 8);
-}
-
-int board_is_evm_15_or_later(void)
-{
-	return (!strncmp("A33515BB", header.name, 8) &&
-		strncmp("1.5", header.version, 3) <= 0);
-}
-
 /*
  * Read header information from EEPROM into global structure.
  */
-static int read_eeprom(void)
+static int read_eeprom(struct am335x_baseboard_id *header)
 {
 	/* Check if baseboard eeprom is available */
 	if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {

@@ -97,28 +64,28 @@ static int read_eeprom(void)
 	}
 
 	/* read the eeprom using i2c */
-	if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
-							sizeof(header))) {
+	if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
+				sizeof(struct am335x_baseboard_id))) {
 		puts("Could not read the EEPROM; something fundamentally"
 			" wrong on the I2C bus.\n");
 		return -EIO;
 	}
 
-	if (header.magic != 0xEE3355AA) {
+	if (header->magic != 0xEE3355AA) {
 		/*
 		 * read the eeprom using i2c again,
 		 * but use only a 1 byte address
 		 */
-		if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1,
-					(uchar *)&header, sizeof(header))) {
+		if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
+					sizeof(struct am335x_baseboard_id))) {
 			puts("Could not read the EEPROM; something "
 				"fundamentally wrong on the I2C bus.\n");
 			return -EIO;
 		}
 
-		if (header.magic != 0xEE3355AA) {
+		if (header->magic != 0xEE3355AA) {
 			printf("Incorrect magic number (0x%x) in EEPROM\n",
-					header.magic);
+					header->magic);
 			return -EINVAL;
 		}
 	}

@@ -304,6 +271,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
  */
 void s_init(void)
 {
+	__maybe_unused struct am335x_baseboard_id header;
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */

@@ -362,11 +331,11 @@ void s_init(void)
 	/* Initalize the board header */
 	enable_i2c0_pin_mux();
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-	if (read_eeprom() < 0)
+	if (read_eeprom(&header) < 0)
 		puts("Could not get board ID.\n");
 
 	enable_board_pin_mux(&header);
-	if (board_is_evm_sk()) {
+	if (board_is_evm_sk(&header)) {
 		/*
 		 * EVM SK 1.2A and later use gpio0_7 to enable DDR3.
 		 * This is safe enough to do on older revs.

@@ -375,15 +344,15 @@ void s_init(void)
 		gpio_direction_output(GPIO_DDR_VTT_EN, 1);
 	}
 
-	if (board_is_evm_sk())
+	if (board_is_evm_sk(&header))
 		config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data,
 			   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
-	else if (board_is_bone_lt())
+	else if (board_is_bone_lt(&header))
 		config_ddr(400, MT41K256M16HA125E_IOCTRL_VALUE,
 			   &ddr3_beagleblack_data,
 			   &ddr3_beagleblack_cmd_ctrl_data,
 			   &ddr3_beagleblack_emif_reg_data, 0);
-	else if (board_is_evm_15_or_later())
+	else if (board_is_evm_15_or_later(&header))
 		config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data,
 			   &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);
 	else

@@ -397,10 +366,6 @@ void s_init(void)
  */
 int board_init(void)
 {
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-	if (read_eeprom() < 0)
-		puts("Could not get board ID.\n");
-
 	gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
 
 	gpmc_init();

@@ -413,6 +378,10 @@ int board_late_init(void)
 {
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	char safe_string[HDR_NAME_LEN + 1];
+	struct am335x_baseboard_id header;
+
+	if (read_eeprom(&header) < 0)
+		puts("Could not get board ID.\n");
 
 	/* Now set variables based on the header. */
 	strncpy(safe_string, (char *)header.name, sizeof(header.name));

@@ -476,6 +445,7 @@ int board_eth_init(bd_t *bis)
 	int rv, n = 0;
 	uint8_t mac_addr[6];
 	uint32_t mac_hi, mac_lo;
+	__maybe_unused struct am335x_baseboard_id header;
 
 	/* try reading mac address from efuse */
 	mac_lo = readl(&cdev->macid0l);

@@ -496,7 +466,11 @@ int board_eth_init(bd_t *bis)
 			eth_setenv_enetaddr("ethaddr", mac_addr);
 	}
 
-	if (board_is_bone() || board_is_bone_lt() || board_is_idk()) {
+	if (read_eeprom(&header) < 0)
+		puts("Could not get board ID.\n");
+
+	if (board_is_bone(&header) || board_is_bone_lt(&header) ||
+			board_is_idk(&header)) {
 		writel(MII_MODE_ENABLE, &cdev->miisel);
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_MII;

@@ -524,7 +498,7 @@ int board_eth_init(bd_t *bis)
 #define AR8051_DEBUG_RGMII_CLK_DLY_REG	0x5
 #define AR8051_RGMII_TX_CLK_DLY		0x100
 
-	if (board_is_evm_sk() || board_is_gp_evm()) {
+	if (board_is_evm_sk(&header) || board_is_gp_evm(&header)) {
 		const char *devname;
 		devname = miiphy_get_current_dev();
 

index 48e112e..36ccaec 100644
@@ -37,6 +37,37 @@ struct am335x_baseboard_id {
 	char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
 };
 
+static inline int board_is_bone(struct am335x_baseboard_id *header)
+{
+	return !strncmp(header->name, "A335BONE", HDR_NAME_LEN);
+}
+
+static inline int board_is_bone_lt(struct am335x_baseboard_id *header)
+{
+	return !strncmp(header->name, "A335BNLT", HDR_NAME_LEN);
+}
+
+static inline int board_is_evm_sk(struct am335x_baseboard_id *header)
+{
+	return !strncmp("A335X_SK", header->name, HDR_NAME_LEN);
+}
+
+static inline int board_is_idk(struct am335x_baseboard_id *header)
+{
+	return !strncmp(header->config, "SKU#02", 6);
+}
+
+static inline int board_is_gp_evm(struct am335x_baseboard_id *header)
+{
+	return !strncmp("A33515BB", header->name, HDR_NAME_LEN);
+}
+
+static inline int board_is_evm_15_or_later(struct am335x_baseboard_id *header)
+{
+	return (board_is_gp_evm(header) &&
+		strncmp("1.5", header->version, 3) <= 0);
+}
+
 /*
  * We have three pin mux functions that must exist.  We must be able to enable
  * uart0, for initial output and i2c0 to read the main EEPROM.  We then have a

index 0283708..2e09d98 100644
@@ -262,13 +262,13 @@ static unsigned short detect_daughter_board_profile(void)
 void enable_board_pin_mux(struct am335x_baseboard_id *header)
 {
 	/* Do board-specific muxes. */
-	if (!strncmp(header->name, "A335BONE", HDR_NAME_LEN)) {
+	if (board_is_bone(header)) {
 		/* Beaglebone pinmux */
 		configure_module_pin_mux(i2c1_pin_mux);
 		configure_module_pin_mux(mii1_pin_mux);
 		configure_module_pin_mux(mmc0_pin_mux);
 		configure_module_pin_mux(mmc1_pin_mux);
-	} else if (!strncmp(header->config, "SKU#01", 6)) {
+	} else if (board_is_gp_evm(header)) {
 		/* General Purpose EVM */
 		unsigned short profile = detect_daughter_board_profile();
 		configure_module_pin_mux(rgmii1_pin_mux);

@@ -283,7 +283,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
 			configure_module_pin_mux(mmc1_pin_mux);
 			configure_module_pin_mux(spi0_pin_mux);
 		}
-	} else if (!strncmp(header->config, "SKU#02", 6)) {
+	} else if (board_is_idk(header)) {
 		/*
 		 * Industrial Motor Control (IDK)
 		 * note: IDK console is on UART3 by default.

@@ -292,13 +292,13 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
 		 */
 		configure_module_pin_mux(mii1_pin_mux);
 		configure_module_pin_mux(mmc0_no_cd_pin_mux);
-	} else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) {
+	} else if (board_is_evm_sk(header)) {
 		/* Starter Kit EVM */
 		configure_module_pin_mux(i2c1_pin_mux);
 		configure_module_pin_mux(gpio0_7_pin_mux);
 		configure_module_pin_mux(rgmii1_pin_mux);
 		configure_module_pin_mux(mmc0_pin_mux_sk_evm);
-	} else if (!strncmp(header->name, "A335BNLT", HDR_NAME_LEN)) {
+	} else if (board_is_bone_lt(header)) {
 		/* Beaglebone LT pinmux */
 		configure_module_pin_mux(i2c1_pin_mux);
 		configure_module_pin_mux(mii1_pin_mux);

1.7.9.5

From: Steve Kipisz <[email protected]>

This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed.

---
 arch/arm/cpu/armv7/am33xx/mem.c        |   30 +++++++++++++++++-
 arch/arm/include/asm/arch-am33xx/mem.h |    9 ++++++
 board/ti/am335x/mux.c                  |   53 ++++++++++++++++++++++++++++++++
 boards.cfg                             |    1 +
 include/configs/am335x_evm.h           |   28 +++++++++++++++++
 5 files changed, 120 insertions(+), 1 deletion(-)

index b86b0de..e46201a 100644
@@ -46,6 +46,19 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
 };
 #endif
 
+#if defined(CONFIG_CMD_FLASH)
+static const u32 gpmc_nor[GPMC_MAX_REG] = {
+	STNOR_GPMC_CONFIG1,
+	STNOR_GPMC_CONFIG2,
+	STNOR_GPMC_CONFIG3,
+	STNOR_GPMC_CONFIG4,
+	STNOR_GPMC_CONFIG5,
+	STNOR_GPMC_CONFIG6,
+	STNOR_GPMC_CONFIG7
+};
+
+#define GPMC_CS 0
+#endif
 
 void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
 			u32 size)

@@ -75,16 +88,22 @@ void gpmc_init(void)
 	/* putting a blanket check on GPMC based on ZeBu for now */
 	gpmc_cfg = (struct gpmc *)GPMC_BASE;
 
-#ifdef CONFIG_CMD_NAND
+#if defined(CONFIG_CMD_NAND) || defined(CONFIG_NOR)
 	const u32 *gpmc_config = NULL;
 	u32 base = 0;
 	u32 size = 0;
 #endif
 	/* global settings */
 	writel(0x00000008, &gpmc_cfg->sysconfig);
+#ifdef CONFIG_NOR
+	writel(0x00000000, &gpmc_cfg->irqstatus);
+	writel(0x00000000, &gpmc_cfg->irqenable);
+	writel(0x00000A00, &gpmc_cfg->config);
+#else
 	writel(0x00000100, &gpmc_cfg->irqstatus);
 	writel(0x00000100, &gpmc_cfg->irqenable);
 	writel(0x00000012, &gpmc_cfg->config);
+#endif
 	/*
 	 * Disable the GPMC0 config set by ROM code
 	 */

@@ -98,4 +117,13 @@ void gpmc_init(void)
 	size = PISMO1_NAND_SIZE;
 	enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
 #endif
+
+#ifdef CONFIG_NOR
+	/* NOR - CS0 */
+	gpmc_config = gpmc_nor;
+	base = CONFIG_SYS_FLASH_BASE;
+	size = GPMC_SIZE_16M;
+	enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+	writel(0x00000a00, 0x50000050);
+#endif
 }

index c3bf74e..ddcad62 100644
@@ -61,6 +61,15 @@
 #define M_NAND_GPMC_CONFIG6	0x16000f80
 #define M_NAND_GPMC_CONFIG7	0x00000008
 
+/* NOR chip on NOR module for Beaglebone */
+#define STNOR_GPMC_CONFIG1	0x00001200
+#define STNOR_GPMC_CONFIG2	0x00101000
+#define STNOR_GPMC_CONFIG3	0x00030301
+#define STNOR_GPMC_CONFIG4	0x10041004
+#define STNOR_GPMC_CONFIG5	0x000C1010
+#define STNOR_GPMC_CONFIG6	0x08070280
+#define STNOR_GPMC_CONFIG7	0x00000F48
+
 /* max number of GPMC Chip Selects */
 #define GPMC_MAX_CS		8
 /* max number of GPMC regs */

index 5d78064..d74840d 100644
@@ -236,6 +236,7 @@ integratorap_cm946es         arm         arm946es    integrator          armltd
 integratorcp_cm946es         arm         arm946es    integrator          armltd         -               integratorcp:CM946ES
 ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 am335x_evm                   arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1
+am335x_evm_nor               arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR
 am335x_evm_spiboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
 am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL2,CONS_INDEX=2
 am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3

index 90cc1f5..343a4aa 100644
@@ -496,4 +496,32 @@
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 #endif
 
+/*
+ * NOR Size = 16 MiB
+ * Number of Sectors/Blocks = 128
+ * Sector Size = 128 KiB
+ * Word length = 16 bits
+ * Default layout:
+ * 0x000000 - 0x07FFFF : U-Boot (512 KiB)
+ * 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
+ * 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
+ * 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
+ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
+ */
+#if defined(CONFIG_NOR)
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_MAX_FLASH_SECT	128
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BASE		(0x08000000)
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_FLASH
+#endif  /* NOR support */
+
 #endif	/* ! __CONFIG_AM335X_EVM_H */

1.7.9.5

Space missing after ':' in subject.

Tom> From: Steve Kipisz <[email protected]>
Tom> This patch adds support for the NOR module that attaches Tom> to the memory cape for a Beaglebone board. This does not Tom> add booting support; only support so that you can boot from Tom> SD/MMC and see the NOR module so that it can be programmed.

Tom> Signed-off-by: Steve Kipisz <[email protected]> Tom> [trini: Clean up config changes slightly] Tom> Signed-off-by: Tom Rini <[email protected]> Tom> ---

 Tom>  arch/arm/cpu/armv7/am33xx/mem.c        |   30 +++++++++++++++++-
 Tom>  arch/arm/include/asm/arch-am33xx/mem.h |    9 ++++++
 Tom>  board/ti/am335x/mux.c                  |   53 ++++++++++++++++++++++++++++++++
 Tom>  boards.cfg                             |    1 +
 Tom>  include/configs/am335x_evm.h           |   28 +++++++++++++++++

Tom> 5 files changed, 120 insertions(+), 1 deletion(-)

Tom> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c Tom> index b86b0de..e46201a 100644
Tom> --- a/arch/arm/cpu/armv7/am33xx/mem.c
Tom> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
Tom> @@ -46,6 +46,19 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = { Tom> };
Tom> #endif

Tom> +#if defined(CONFIG_CMD_FLASH)
Tom> +static const u32 gpmc_nor[GPMC_MAX_REG] = {
Tom> + STNOR_GPMC_CONFIG1,
Tom> + STNOR_GPMC_CONFIG2,
Tom> + STNOR_GPMC_CONFIG3,
Tom> + STNOR_GPMC_CONFIG4,
Tom> + STNOR_GPMC_CONFIG5,
Tom> + STNOR_GPMC_CONFIG6,
Tom> + STNOR_GPMC_CONFIG7
Tom> +};

These values (and the gmpc_m_nand ones) are platform specific, right? It would be nicer to have them in the board file than here, similar to how I did for the ddr settings some time ago.

Tom> +
Tom> +#define GPMC_CS 0
Tom> +#endif

Tom> void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
Tom> u32 size)
Tom> @@ -75,16 +88,22 @@ void gpmc_init(void)
Tom> /* putting a blanket check on GPMC based on ZeBu for now */
Tom> gpmc_cfg = (struct gpmc *)GPMC_BASE;

Tom> -#ifdef CONFIG_CMD_NAND
Tom> +#if defined(CONFIG_CMD_NAND) || defined(CONFIG_NOR)

 Tom>  	const u32 *gpmc_config = NULL;
 Tom>  	u32 base = 0;
 Tom>  	u32 size = 0;
 Tom>  #endif
 Tom>  	/* global settings */
 Tom>  	writel(0x00000008, &gpmc_cfg->sysconfig);
 Tom> +#ifdef CONFIG_NOR
 Tom> +	writel(0x00000000, &gpmc_cfg->irqstatus);
 Tom> +	writel(0x00000000, &gpmc_cfg->irqenable);
 Tom> +	writel(0x00000A00, &gpmc_cfg->config);
 Tom> +#else
 Tom>  	writel(0x00000100, &gpmc_cfg->irqstatus);
 Tom>  	writel(0x00000100, &gpmc_cfg->irqenable);
 Tom>  	writel(0x00000012, &gpmc_cfg->config);

Tom> +#endif

So now you cannot E.G. have a single binary working on both the nand flash of the evm and beaglebone? That's not really nice.

Bye, Peter Korsgaard

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Whoops.

The GPMC setup stuff has historically been, lets say less than optimal. We might be able to move this to board_init like omap3 does, however. I'll check.

It's worse than that. We don't have a NOR cape, we have a memory cape and NOR module. We could have a memory cape and NAND module. And there's not a nice way at run-time to determine if we've got one or the other.

- --
Tom
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From: Steve Kipisz <[email protected]>

NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB.

---
 arch/arm/cpu/armv7/am33xx/emif4.c |    6 +-
 board/ti/am335x/Makefile          |    2 +-
 board/ti/am335x/board.c           |   31 ++++++++++-
 board/ti/am335x/mux.c             |    6 +-
 board/ti/am335x/u-boot.lds        |  110 +++++++++++++++++++++++++++++++++++++
 boards.cfg                        |    1 +
 include/configs/am335x_evm.h      |   27 ++++++++-
 7 files changed, 174 insertions(+), 9 deletions(-)
 create mode 100644 board/ti/am335x/u-boot.lds

index aa84e96..370230b 100644
@@ -43,9 +43,11 @@ void dram_init_banksize(void)
 }
 
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#ifdef CONFIG_TI81XX
 static struct dmm_lisa_map_regs *hw_lisa_map_regs =
 				(struct dmm_lisa_map_regs *)DMM_BASE;
+#endif
 static struct vtp_reg *vtpreg[2] = {
 				(struct vtp_reg *)VTP0_CTRL_ADDR,
 				(struct vtp_reg *)VTP1_CTRL_ADDR};

@@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = {
 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
 #endif
 
+#ifdef CONFIG_TI81XX
 void config_dmm(const struct dmm_lisa_map_regs *regs)
 {
 	enable_dmm_clocks();

@@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
 	writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1);
 	writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0);
 }
+#endif
 
 static void config_vtp(int nr)
 {

index 67a87a1..1795e3e 100644
@@ -18,7 +18,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
-ifdef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
 COBJS	:= mux.o
 endif
 

index 6f6b5d0..a0ad4bc 100644
@@ -38,7 +38,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT)
 static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 #endif
 

@@ -94,7 +94,7 @@ static int read_eeprom(struct am335x_baseboard_id *header)
 }
 
 /* UART Defines */
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
 #define UART_RESET		(0x1 << 1)
 #define UART_CLK_RUNNING_MASK	0x1
 #define UART_SMART_IDLE_EN	(0x1 << 0x3)

@@ -273,6 +273,24 @@ void s_init(void)
 {
 	__maybe_unused struct am335x_baseboard_id header;
 
+	/*
+	 * The ROM will only have set up sufficient pinmux to allow for the
+	 * first 4KiB NOR to be read, we must finish doing what we know of
+	 * the NOR mux in this space in order to continue.
+	 */
+#ifdef CONFIG_NOR_BOOT
+	asm("stmfd      sp!, {r2 - r4}");
+	asm("movw       r4, #0x8A4");
+	asm("movw       r3, #0x44E1");
+	asm("orr        r4, r4, r3, lsl #16");
+	asm("mov        r2, #9");
+	asm("mov        r3, #8");
+	asm("gpmc_mux:  str     r2, [r4], #4");
+	asm("subs       r3, r3, #1");
+	asm("bne        gpmc_mux");
+	asm("ldmfd      sp!, {r2 - r4}");
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */

@@ -283,7 +301,7 @@ void s_init(void)
 	while (readl(&wdtimer->wdtwwps) != 0x0)
 		;
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
 	/* Setup the PLLs and the clocks for the peripherals */
 	pll_init();
 

@@ -324,9 +342,16 @@ void s_init(void)
 	regVal |= UART_SMART_IDLE_EN;
 	writel(regVal, &uart_base->uartsyscfg);
 
+#if defined(CONFIG_NOR_BOOT)
+	/* We want our console now. */
+	gd->baudrate = CONFIG_BAUDRATE;
+	serial_init();
+	gd->have_console = 1;
+#else
 	gd = &gdata;
 
 	preloader_console_init();
+#endif
 
 	/* Initalize the board header */
 	enable_i2c0_pin_mux();

index 187468e..5b7ed63 100644
@@ -190,7 +190,7 @@ static struct module_pin_mux nand_pin_mux[] = {
 	{-1},
 };
 
-#if defined(CONFIG_NOR)
+#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
 static struct module_pin_mux bone_norcape_pin_mux[] = {
 	{OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A0 */
 	{OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A1 */

@@ -317,8 +317,10 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
 		configure_module_pin_mux(i2c1_pin_mux);
 		configure_module_pin_mux(mii1_pin_mux);
 		configure_module_pin_mux(mmc0_pin_mux);
+#ifndef CONFIG_NOR
 		configure_module_pin_mux(mmc1_pin_mux);
-#if defined(CONFIG_NOR)
+#endif
+#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
 		configure_module_pin_mux(bone_norcape_pin_mux);
 #endif
 	} else if (board_is_gp_evm(header)) {

index d74840d..90e018f 100644
@@ -237,6 +237,7 @@ integratorcp_cm946es         arm         arm946es    integrator          armltd
 ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 am335x_evm                   arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1
 am335x_evm_nor               arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR
+am335x_evm_norboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT
 am335x_evm_spiboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
 am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL2,CONS_INDEX=2
 am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3

index 343a4aa..abc477b 100644
@@ -39,6 +39,9 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 
+/* Custom script for NOR */
+#define CONFIG_SYS_LDSCRIPT		"board/ti/am335x/u-boot.lds"
+
 #define CONFIG_SYS_CACHELINE_SIZE       64
 
 /* commands to include */

@@ -300,6 +303,7 @@
 #define CONFIG_ENV_OVERWRITE		1
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
+#ifndef CONFIG_NOR_BOOT
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK

@@ -343,6 +347,8 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#endif
+
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)

@@ -376,14 +382,18 @@
  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  * other needs.
  */
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_SYS_TEXT_BASE		0x08000000
+#else
 #define CONFIG_SYS_TEXT_BASE		0x80800000
+#endif
 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
 
 /* Since SPL did pll and ddr initialization for us,
  * we don't need to do it twice.
  */
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
 

@@ -470,7 +480,7 @@
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
-#if !defined(CONFIG_SPI_BOOT)
+#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define CONFIG_NAND
 #endif
 

@@ -520,6 +530,19 @@
 #define CONFIG_SYS_FLASH_BASE		(0x08000000)
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE		(128 << 10)	/* 128 KiB */
+#define CONFIG_ENV_OFFSET		(512 << 10)	/* 512 KiB */
+#define CONFIG_ENV_OFFSET_REDUND	(768 << 10)	/* 768 KiB */
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
+					"512k(u-boot)," \
+					"128k(u-boot-env1)," \
+					"128k(u-boot-env2)," \
+					"4m(kernel),-(rootfs)"
+#endif
 #define CONFIG_MTD_DEVICE
 #define CONFIG_CMD_FLASH
 #endif  /* NOR support */

1.7.9.5

Tom> From: Steve Kipisz <[email protected]>
Tom> NOR requires that s_init be within the first 4KiB of the image so that Tom> we can perform the rest of the required pinmuxing to talk with the rest Tom> of NOR that we are found on. When NOR_BOOT is set we save our Tom> environment in NOR at 512KiB and a redundant copy at 768KiB.

Why not use SPL when booting from NOR as well? You still want to relocate into DDR.

Tom> Signed-off-by: Steve Kipisz <[email protected]> Tom> Signed-off-by: Tom Rini <[email protected]> Tom> ---

 Tom>  arch/arm/cpu/armv7/am33xx/emif4.c |    6 +-
 Tom>  board/ti/am335x/Makefile          |    2 +-
 Tom>  board/ti/am335x/board.c           |   31 ++++++++++-
 Tom>  board/ti/am335x/mux.c             |    6 +-
 Tom>  board/ti/am335x/u-boot.lds        |  110 +++++++++++++++++++++++++++++++++++++
 Tom>  boards.cfg                        |    1 +
 Tom>  include/configs/am335x_evm.h      |   27 ++++++++-

Tom> 7 files changed, 174 insertions(+), 9 deletions(-) Tom> create mode 100644 board/ti/am335x/u-boot.lds

Tom> diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c Tom> index aa84e96..370230b 100644
Tom> --- a/arch/arm/cpu/armv7/am33xx/emif4.c
Tom> +++ b/arch/arm/cpu/armv7/am33xx/emif4.c
Tom> @@ -43,9 +43,11 @@ void dram_init_banksize(void)
Tom> }

Tom> -#ifdef CONFIG_SPL_BUILD
Tom> +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) Tom> +#ifdef CONFIG_TI81XX
Tom> static struct dmm_lisa_map_regs *hw_lisa_map_regs =
Tom> (struct dmm_lisa_map_regs *)DMM_BASE;
Tom> +#endif

 Tom>  static struct vtp_reg *vtpreg[2] = {
 Tom>  				(struct vtp_reg *)VTP0_CTRL_ADDR,
 Tom>  				(struct vtp_reg *)VTP1_CTRL_ADDR};

Tom> @@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = { Tom> static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; Tom> #endif

Tom> +#ifdef CONFIG_TI81XX

 Tom>  void config_dmm(const struct dmm_lisa_map_regs *regs)
 Tom>  {
 Tom>  	enable_dmm_clocks();
 Tom> @@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
 Tom>  	writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1);
 Tom>  	writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0);
 Tom>  }

Tom> +#endif

Tom> static void config_vtp(int nr)
Tom> {
Tom> diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile Tom> index 67a87a1..1795e3e 100644
Tom> --- a/board/ti/am335x/Makefile
Tom> +++ b/board/ti/am335x/Makefile
Tom> @@ -18,7 +18,7 @@ include $(TOPDIR)/config.mk

Tom> LIB = $(obj)lib$(BOARD).o

Tom> -ifdef CONFIG_SPL_BUILD
Tom> +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
Tom> COBJS := mux.o
Tom> endif

Tom> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c Tom> index 6f6b5d0..a0ad4bc 100644
Tom> --- a/board/ti/am335x/board.c
Tom> +++ b/board/ti/am335x/board.c
Tom> @@ -38,7 +38,7 @@
Tom> DECLARE_GLOBAL_DATA_PTR;

Tom> static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; Tom> -#ifdef CONFIG_SPL_BUILD
Tom> +#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT)
Tom> static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; Tom> #endif

Tom> @@ -94,7 +94,7 @@ static int read_eeprom(struct am335x_baseboard_id *header) Tom> }

Tom> /* UART Defines */
Tom> -#ifdef CONFIG_SPL_BUILD
Tom> +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)

 Tom>  #define UART_RESET		(0x1 << 1)
 Tom>  #define UART_CLK_RUNNING_MASK	0x1
 Tom>  #define UART_SMART_IDLE_EN	(0x1 << 0x3)

Tom> @@ -273,6 +273,24 @@ void s_init(void)
Tom> {
Tom> __maybe_unused struct am335x_baseboard_id header;

Tom> + /*
Tom> + * The ROM will only have set up sufficient pinmux to allow for the
Tom> + * first 4KiB NOR to be read, we must finish doing what we know of
Tom> + * the NOR mux in this space in order to continue.
Tom> + */
Tom> +#ifdef CONFIG_NOR_BOOT

 Tom> +	asm("stmfd      sp!, {r2 - r4}");
 Tom> +	asm("movw       r4, #0x8A4");
 Tom> +	asm("movw       r3, #0x44E1");
 Tom> +	asm("orr        r4, r4, r3, lsl #16");
 Tom> +	asm("mov        r2, #9");
 Tom> +	asm("mov        r3, #8");
 Tom> +	asm("gpmc_mux:  str     r2, [r4], #4");
 Tom> +	asm("subs       r3, r3, #1");
 Tom> +	asm("bne        gpmc_mux");
 Tom> +	asm("ldmfd      sp!, {r2 - r4}");
 Tom> +#endif
 Tom> +
 Tom>  	/* WDT1 is already running when the bootloader gets control
 Tom>  	 * Disable it to avoid "random" resets
 Tom>  	 */

Tom> @@ -283,7 +301,7 @@ void s_init(void)
Tom> while (readl(&wdtimer->wdtwwps) != 0x0)
Tom> ;

Tom> -#ifdef CONFIG_SPL_BUILD
Tom> +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
Tom> /* Setup the PLLs and the clocks for the peripherals */
Tom> pll_init();

Tom> @@ -324,9 +342,16 @@ void s_init(void)
Tom> regVal |= UART_SMART_IDLE_EN;
Tom> writel(regVal, &uart_base->uartsyscfg);

Tom> +#if defined(CONFIG_NOR_BOOT)
Tom> + /* We want our console now. */
Tom> + gd->baudrate = CONFIG_BAUDRATE;
Tom> + serial_init();
Tom> + gd->have_console = 1;
Tom> +#else
Tom> gd = &gdata;

Tom> preloader_console_init();
Tom> +#endif

Tom> /* Initalize the board header */
Tom> enable_i2c0_pin_mux();
Tom> diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c Tom> index 187468e..5b7ed63 100644
Tom> --- a/board/ti/am335x/mux.c
Tom> +++ b/board/ti/am335x/mux.c
Tom> @@ -190,7 +190,7 @@ static struct module_pin_mux nand_pin_mux[] = {
Tom> {-1},
Tom> };

Tom> -#if defined(CONFIG_NOR)
Tom> +#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)

 Tom>  static struct module_pin_mux bone_norcape_pin_mux[] = {
 Tom>  	{OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A0 */
 Tom>  	{OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A1 */
 Tom> @@ -317,8 +317,10 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
 Tom>  		configure_module_pin_mux(i2c1_pin_mux);
 Tom>  		configure_module_pin_mux(mii1_pin_mux);
 Tom>  		configure_module_pin_mux(mmc0_pin_mux);
 Tom> +#ifndef CONFIG_NOR
 Tom>  		configure_module_pin_mux(mmc1_pin_mux);
 Tom> -#if defined(CONFIG_NOR)
 Tom> +#endif
 Tom> +#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
 Tom>  		configure_module_pin_mux(bone_norcape_pin_mux);
 Tom>  #endif
 Tom>  	} else if (board_is_gp_evm(header)) {
 Tom> diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds
 Tom> new file mode 100644
 Tom> index 0000000..d376743
 Tom> --- /dev/null
 Tom> +++ b/board/ti/am335x/u-boot.lds
 Tom> @@ -0,0 +1,110 @@
 Tom> +/*
 Tom> + * Copyright (c) 2004-2008 Texas Instruments
 Tom> + *
 Tom> + * (C) Copyright 2002
 Tom> + * Gary Jennejohn, DENX Software Engineering, <[email protected]>
 Tom> + *
 Tom> + * See file CREDITS for list of people who contributed to this
 Tom> + * project.
 Tom> + *
 Tom> + * This program is free software; you can redistribute it and/or
 Tom> + * modify it under the terms of the GNU General Public License as
 Tom> + * published by the Free Software Foundation; either version 2 of
 Tom> + * the License, or (at your option) any later version.
 Tom> + *
 Tom> + * This program is distributed in the hope that it will be useful,
 Tom> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 Tom> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 Tom> + * GNU General Public License for more details.
 Tom> + *
 Tom> + * You should have received a copy of the GNU General Public License
 Tom> + * along with this program; if not, write to the Free Software
 Tom> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 Tom> + * MA 02111-1307 USA
 Tom> + */
 Tom> +
 Tom> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 Tom> +OUTPUT_ARCH(arm)
 Tom> +ENTRY(_start)
 Tom> +SECTIONS
 Tom> +{
 Tom> +	. = 0x00000000;
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +	.text :
 Tom> +	{
 Tom> +		__image_copy_start = .;
 Tom> +		CPUDIR/start.o (.text*)
 Tom> +		board/ti/am335x/libam335x.o (.text*)
 Tom> +		*(.text*)
 Tom> +	}
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +	.data : {
 Tom> +		*(.data*)
 Tom> +	}
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +
 Tom> +	. = .;
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +	.u_boot_list : {
 Tom> +		KEEP(*(SORT(.u_boot_list*)));
 Tom> +	}
 Tom> +
 Tom> +	. = ALIGN(4);
 Tom> +
 Tom> +	__image_copy_end = .;
 Tom> +
 Tom> +	.rel.dyn : {
 Tom> +		__rel_dyn_start = .;
 Tom> +		*(.rel*)
 Tom> +		__rel_dyn_end = .;
 Tom> +	}
 Tom> +
 Tom> +	.dynsym : {
 Tom> +		__dynsym_start = .;
 Tom> +		*(.dynsym)
 Tom> +	}
 Tom> +
 Tom> +	_end = .;
 Tom> +
 Tom> +	/*
 Tom> +	 * Deprecated: this MMU section is used by pxa at present but
 Tom> +	 * should not be used by new boards/CPUs.
 Tom> +	 */
 Tom> +	. = ALIGN(4096);
 Tom> +	.mmutable : {
 Tom> +		*(.mmutable)
 Tom> +	}
 Tom> +
 Tom> +/*
 Tom> + * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
 Tom> + * __bss_base and __bss_limit are for linker only (overlay ordering)
 Tom> + */
 Tom> +
 Tom> +	.bss_start __rel_dyn_start (OVERLAY) : {
 Tom> +		KEEP(*(.__bss_start));
 Tom> +		__bss_base = .;
 Tom> +	}
 Tom> +
 Tom> +	.bss __bss_base (OVERLAY) : {
 Tom> +		*(.bss*)
 Tom> +		 . = ALIGN(4);
 Tom> +		 __bss_limit = .;
 Tom> +	}
 Tom> +
 Tom> +	.bss_end __bss_limit (OVERLAY) : {
 Tom> +		KEEP(*(.__bss_end));
 Tom> +	}
 Tom> +
 Tom> +	/DISCARD/ : { *(.dynstr*) }
 Tom> +	/DISCARD/ : { *(.dynamic*) }
 Tom> +	/DISCARD/ : { *(.plt*) }
 Tom> +	/DISCARD/ : { *(.interp*) }
 Tom> +	/DISCARD/ : { *(.gnu*) }
 Tom> +}
 Tom> diff --git a/boards.cfg b/boards.cfg
 Tom> index d74840d..90e018f 100644
 Tom> --- a/boards.cfg
 Tom> +++ b/boards.cfg
 Tom> @@ -237,6 +237,7 @@ integratorcp_cm946es         arm         arm946es    integrator          armltd
 Tom>  ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 Tom>  am335x_evm                   arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1
 Tom>  am335x_evm_nor               arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR
 Tom> +am335x_evm_norboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT
 Tom>  am335x_evm_spiboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
 Tom>  am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL2,CONS_INDEX=2
 Tom>  am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3

Tom> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h Tom> index 343a4aa..abc477b 100644
Tom> --- a/include/configs/am335x_evm.h
Tom> +++ b/include/configs/am335x_evm.h
Tom> @@ -39,6 +39,9 @@
Tom> #define CONFIG_SETUP_MEMORY_TAGS
Tom> #define CONFIG_INITRD_TAG

Tom> +/* Custom script for NOR */
Tom> +#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
Tom> +
Tom> #define CONFIG_SYS_CACHELINE_SIZE 64

Tom> /* commands to include */
Tom> @@ -300,6 +303,7 @@
Tom> #define CONFIG_ENV_OVERWRITE 1
Tom> #define CONFIG_SYS_CONSOLE_INFO_QUIET

Tom> +#ifndef CONFIG_NOR_BOOT

 Tom>  /* Defines for SPL */
 Tom>  #define CONFIG_SPL
 Tom>  #define CONFIG_SPL_FRAMEWORK
 Tom> @@ -343,6 +347,8 @@
 Tom>  #define CONFIG_SPL_NAND_BASE
 Tom>  #define CONFIG_SPL_NAND_DRIVERS
 Tom>  #define CONFIG_SPL_NAND_ECC
 Tom> +#endif
 Tom> +
 Tom>  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 Tom>  #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 Tom>  					 CONFIG_SYS_NAND_PAGE_SIZE)
 Tom> @@ -376,14 +382,18 @@
 Tom>   * header. That is 0x800FFFC0--0x80100000 should not be used for any
 Tom>   * other needs.
 Tom>   */

Tom> +#ifdef CONFIG_NOR_BOOT
Tom> +#define CONFIG_SYS_TEXT_BASE 0x08000000
Tom> +#else
Tom> #define CONFIG_SYS_TEXT_BASE 0x80800000
Tom> +#endif
Tom> #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
Tom> #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000

Tom> /* Since SPL did pll and ddr initialization for us,
Tom> * we don't need to do it twice.
Tom> */
Tom> -#ifndef CONFIG_SPL_BUILD
Tom> +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) Tom> #define CONFIG_SKIP_LOWLEVEL_INIT
Tom> #endif

Tom> @@ -470,7 +480,7 @@
Tom> #define CONFIG_PHY_ADDR 0
Tom> #define CONFIG_PHY_SMSC

Tom> -#if !defined(CONFIG_SPI_BOOT)
Tom> +#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT) Tom> #define CONFIG_NAND
Tom> #endif

Tom> @@ -520,6 +530,19 @@

 Tom>  #define CONFIG_SYS_FLASH_BASE		(0x08000000)
 Tom>  #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 Tom>  #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 Tom> +#ifdef CONFIG_NOR_BOOT
 Tom> +#define CONFIG_ENV_IS_IN_FLASH
 Tom> +#define CONFIG_ENV_SECT_SIZE		(128 << 10)	/* 128 KiB */
 Tom> +#define CONFIG_ENV_OFFSET		(512 << 10)	/* 512 KiB */
 Tom> +#define CONFIG_ENV_OFFSET_REDUND	(768 << 10)	/* 768 KiB */
 Tom> +#define CONFIG_CMD_MTDPARTS
 Tom> +#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
 Tom> +#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
 Tom> +					"512k(u-boot)," \
 Tom> +					"128k(u-boot-env1)," \
 Tom> +					"128k(u-boot-env2)," \
 Tom> +					"4m(kernel),-(rootfs)"
 Tom> +#endif
 Tom>  #define CONFIG_MTD_DEVICE
 Tom>  #define CONFIG_CMD_FLASH
 Tom>  #endif  /* NOR support */

Tom> --
Tom> 1.7.9.5

Tom> _______________________________________________ Tom> U-Boot mailing list
Tom> U-Boot at lists.denx.de
Tom> http://lists.denx.de/mailman/listinfo/u-boot

Bye, Peter Korsgaard

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Frankly, I'm allergic to SPL for NOR. It's the historical and well understood case, we're r/o until we move from flash to DDR. And it is fast enough here at least that it doesn't seem like we'd gain on falcon mode like we do on other medium.

- --
Tom
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Tom> Frankly, I'm allergic to SPL for NOR. It's the historical and well Tom> understood case, we're r/o until we move from flash to DDR. And it is Tom> fast enough here at least that it doesn't seem like we'd gain on Tom> falcon mode like we do on other medium.

Ok. It would be good to mention this in the commit message.

Bye, Peter Korsgaard

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I'll reword things slightly.

- --
Tom
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Tom> We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define Tom> of NOWHERE.

Tom> Signed-off-by: Tom Rini <[email protected]>

Bye, Peter Korsgaard