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ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

PATCH New Alexander Shiyan 3 participants 9 messages Jun 1, 2013 – Jun 3, 2013

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#0 lore raw

PATCH 1/4 ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

FEC (KSZ8001L) reset pin is connected to GPIOC30.
Add this definition to dts.

---
 arch/arm/boot/dts/imx27-phytec-phycore.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/imx27-phytec-phycore.dts +1 -0
index eb7d9fa..a4c0256 100644
@@ -58,6 +58,7 @@
 
 		aipi at 10020000 { /* aipi2 */
 			ethernet at 1002b000 {
+				phy-reset-gpios = <&gpio3 30 0>;
 				status = "okay";
 			};
 		};
Signature · 1 line
1.8.1.5
#1 lore raw

PATCH 2/4 ARM: dts: imx27-phytec-phycore: Rename file to match functionality

PCM038 dts can be used as base for development kit board or any custom PCB designs. Renames this file to match functionality.

---
 arch/arm/boot/dts/Makefile                                              | 2 +-
 .../boot/dts/{imx27-phytec-phycore.dts => imx27-phytec-phycore-som.dts} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/boot/dts/{imx27-phytec-phycore.dts => imx27-phytec-phycore-som.dts} (100%)
arch/arm/boot/dts/Makefile +1 -1
index 78695bd..8450c14 100644
@@ -107,7 +107,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27.dtb \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
-	imx27-phytec-phycore.dtb \
+	imx27-phytec-phycore-som.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-som.dts renamed from arch/arm/boot/dts/imx27-phytec-phycore.dts +0 -0
similarity index 100%
rename from arch/arm/boot/dts/imx27-phytec-phycore.dts
rename to arch/arm/boot/dts/imx27-phytec-phycore-som.dts
Signature · 1 line
1.8.1.5
#2 lore raw

PATCH 3/4 ARM: dts: imx27-phytec-phycore-som: Remove UART definitions

In reply to Alexander Shiyan

UART1 and UART2 can be unused on some designs with PCM038 module. Remove these definitions from basic dts and lets choose user only necessary UARTs in custom designs.
Keep UART0 for using this one as boot console, but since we have not way to disable usage RTSCTS signals, remove this parameter for UART0.

---
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 11 -----------
 1 file changed, 11 deletions(-)
arch/arm/boot/dts/imx27-phytec-phycore-som.dts +0 -11
index a4c0256..73f4b28 100644
@@ -23,17 +23,6 @@
 	soc {
 		aipi at 10000000 { /* aipi1 */
 			serial at 1000a000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			serial at 1000b000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			serial at 1000c000 {
-				fsl,uart-has-rtscts;
 				status = "okay";
 			};
 
Signature · 1 line
1.8.1.5
#3 lore raw

PATCH 4/4 ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

In reply to Alexander Shiyan

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/Makefile +1 -0
index 8450c14..eee371f 100644
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +29 -0
new file mode 100644
index 0000000..f8a7a49
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};
+
+&uart1 {
+	fsl,uart-has-rtscts;
+};
+
+&uart2 {
+	fsl,uart-has-rtscts;
+	status = "okay";
+};
Signature · 1 line
1.8.1.5
maintainer
#4 lore raw

PATCH 4/4 ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

Quoted 39 lines · Alexander Shiyan

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/Makefile +1 -0
index 8450c14..eee371f 100644
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +10 -0
new file mode 100644
index 0000000..f8a7a49
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts line 20

Quoted 10 lines
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +10 -0
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};

The first chipselect connects to the mc13783 PMIC which is on the module, not on the baseboard. Also this is a no-op since the status property of the cspi is not changed to 'okay'.
I suspect you already have a patch adding mc13783 support to the module which should be in this series ;)

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#5 lore raw

Re[2]: [PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

Quoted 48 lines · Alexander Shiyan
Quoted 47 lines

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/Makefile +1 -0
index 8450c14..eee371f 100644
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +18 -0
new file mode 100644
index 0000000..f8a7a49
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
Quoted 8 lines

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts line 20

Quoted 2 lines
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +2 -0
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};

The first chipselect connects to the mc13783 PMIC which is on the module, not on the baseboard. Also this is a no-op since the status property of the cspi is not changed to 'okay'.
I suspect you already have a patch adding mc13783 support to the module which should be in this series ;)

MC13783 is already here. See my previous patch for this SOM:
http://www.spinics.net/lists/arm-kernel/msg240873.html

---

maintainer
#6 lore raw

PATCH 4/4 ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

Quoted 57 lines · Alexander Shiyan
Quoted 48 lines · Alexander Shiyan
Quoted 47 lines

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/Makefile +1 -0
index 8450c14..eee371f 100644
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +18 -0
new file mode 100644
index 0000000..f8a7a49
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
Quoted 8 lines

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts line 20

Quoted 2 lines
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +2 -0
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};

The first chipselect connects to the mc13783 PMIC which is on the module, not on the baseboard. Also this is a no-op since the status property of the cspi is not changed to 'okay'.
I suspect you already have a patch adding mc13783 support to the module which should be in this series ;)

Quoted 2 lines

MC13783 is already here. See my previous patch for this SOM:
http://www.spinics.net/lists/arm-kernel/msg240873.html

Ah, nice. I didn't remember that. In this case you can get my:

for this series

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#7 lore raw

Re[3]: [PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

In reply to Alexander Shiyan
Quoted 57 lines
Quoted 48 lines · Alexander Shiyan
Quoted 47 lines

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/Makefile +1 -0
index 8450c14..eee371f 100644
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +18 -0
new file mode 100644
index 0000000..f8a7a49
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
Quoted 8 lines

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts line 20

Quoted 2 lines
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts new file +2 -0
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};

The first chipselect connects to the mc13783 PMIC which is on the module, not on the baseboard. Also this is a no-op since the status property of the cspi is not changed to 'okay'.
I suspect you already have a patch adding mc13783 support to the module which should be in this series ;)

Quoted 2 lines

MC13783 is already here. See my previous patch for this SOM:
http://www.spinics.net/lists/arm-kernel/msg240873.html

I have given you a wrong link. Sorry. This is a patch for MC13783 regulator. Here is a patch for add dt-node to the module:
http://comments.gmane.org/gmane.linux.ports.arm.kernel/234757

---

Applied
#8 lore raw

PATCH 1/4 ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

In reply to Alexander Shiyan
Quoted 4 lines · Alexander Shiyan

FEC (KSZ8001L) reset pin is connected to GPIOC30.
Add this definition to dts.

Applied the series, thanks.

Shawn

Quoted 19 lines
---
 arch/arm/boot/dts/imx27-phytec-phycore.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/imx27-phytec-phycore.dts +1 -0
index eb7d9fa..a4c0256 100644
@@ -58,6 +58,7 @@
 
 		aipi at 10020000 { /* aipi2 */
 			ethernet at 1002b000 {
+				phy-reset-gpios = <&gpio3 30 0>;
 				status = "okay";
 			};
 		};
Signature · 1 line
1.8.1.5