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add initial kvm dev passhtrough support

PATCH In review Mario Smarduch 3 participants 6 messages Jun 11, 2013 – Jun 12, 2013 2 messages not in the archive

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#0 lore raw

PATCH 2/2 add initial kvm dev passhtrough support

This is the initial device pass through support.
At this time host == guest only is supported.
Basic Operation:

- QEMU parameters: -device kvm-device-assign,host=<device name> for example - kvm-device-assign,host='arm-sp804'. Essentially any device that does PIO should be supported.
- Host DTS contains the node for device to be passed through The host driver is unbound or not compiled in.
- For Guest the intent is to add a DTS node that QEMU can parse and find the guest attributes (Mem. resource, IRQs) For now these values default to host. This is a future
work item to get this working on board other then vexpress.
- The physical interrupt is always passed through to CPU where the target vCPU executes or will execute.
Current approach - pins vCPUs to physical CPUs, when
Guest updates CPU affinity is updated in KVM vgic dist code. Future work item for IRQ affinity allow vCPU to
float and on schedule in handle IRQ affinity. For high
IRQ rates (i.e. wireless NEs) static binding may be used. For some other device (env. mgmt IPMI)where latency is not important dynamic may be used, it should be upto the user.
- To support flexible affinity a mask is introduced (QEMU param0 (although not used here yet)
o vCPU affinity - vCPU --> CPU binding, the IRQ physical CPU binding follows vCPU binding dynamically.
- Obviously DMA is not supported
- early DMA may be supported through a 1:1 mapping but it's unsafe and so far we don't know of any hardware that's not behind SMMU. This option may be useful in some embedded/wireless environments, where the guest may want to swap, secure isolation may not be an issue or device like look aside crypto engine is not behind IOMMU.
- IOMMU/VFIO support is key and next item for us to work on. Especially for ETSI NFV VFIO is key since 4G/IMS NE pull packets
of wire and switch them directly in user space.

The patch has been tested on fast models in couple ways:
- UP Guest with sp804 timer only - works consistently
- SMP Guest with sp804 timer works consistently.
Writes to '/proc/irq/<sp804 irq>/smp_affinity'
confirm dynamic CPU affinity.
- IRQ rates (maybe not that important give its emulated env) reached excess of 500.

There is a QEMU piece very simple for now that I will email later, in case someone would like to test.

- Mario

---
 arch/arm/include/asm/kvm_host.h |   14 +++
 arch/arm/include/asm/kvm_vgic.h |   10 +++
 arch/arm/kvm/Makefile           |    1 +
 arch/arm/kvm/arm.c              |   60 +++++++++++++
 arch/arm/kvm/assign-dev.c       |  189 +++++++++++++++++++++++++++++++++++++++
 arch/arm/kvm/vgic.c             |  106 ++++++++++++++++++++++
 include/linux/irqchip/arm-gic.h |    1 +
 include/uapi/linux/kvm.h        |   33 +++++++
 8 files changed, 414 insertions(+)
 create mode 100644 arch/arm/kvm/assign-dev.c
arch/arm/include/asm/kvm_host.h +14 -0
index 57cb786..c6ad3a3 100644
@@ -67,6 +67,10 @@ struct kvm_arch {
 
 	/* Interrupt controller */
 	struct vgic_dist	vgic;
+
+	/* Device Passthrough Fields */
+	struct list_head        assigned_dev_head;
+	struct mutex            dev_pasthru_lock;
 };
 
 #define KVM_NR_MEM_OBJS     40
@@ -146,6 +150,13 @@ struct kvm_vcpu_stat {
 	u32 halt_wakeup;
 };
 
+struct kvm_arm_assigned_dev_kernel {
+	struct list_head list;
+	struct kvm_arm_assigned_device dev;
+	irqreturn_t (*irq_handler)(int, void *);
+	void *irq_arg;
+};
+
 struct kvm_vcpu_init;
 int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
 			const struct kvm_vcpu_init *init);
@@ -156,6 +167,9 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 u64 kvm_call_hyp(void *hypfn, ...);
 void force_vm_exit(const cpumask_t *mask);
+int kvm_arm_get_device_resources(struct kvm *,
+	struct kvm_arm_get_device_resources *);
+int kvm_arm_assign_device(struct kvm *, struct kvm_arm_assigned_device *);
 
 #define KVM_ARCH_WANT_MMU_NOTIFIER
 struct kvm;
arch/arm/include/asm/kvm_vgic.h +10 -0
index 343744e..c4370ae 100644
@@ -107,6 +107,16 @@ struct vgic_dist {
 
 	/* Bitmap indicating which CPU has something pending */
 	unsigned long		irq_pending_on_cpu;
+
+	/* Device passthrough  fields */
+	/* Host irq to guest irq mapping */
+	u8                      guest_irq[VGIC_NR_SHARED_IRQS];
+
+	/* Pending passthruogh irq */
+	struct vgic_bitmap      pasthru_spi_pending;
+
+	/* At least one passthrough IRQ pending for some vCPU */
+	u32                     pasthru_pending;
 #endif
 };
 
arch/arm/kvm/Makefile +1 -0
index 53c5ed8..823fc38 100644
@@ -21,3 +21,4 @@ obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o
 obj-y += coproc.o coproc_a15.o mmio.o psci.o perf.o
 obj-$(CONFIG_KVM_ARM_VGIC) += vgic.o
 obj-$(CONFIG_KVM_ARM_TIMER) += arch_timer.o
+obj-$(CONFIG_KVM_ARM_INT_PRIO_DROP) += assign-dev.o
arch/arm/kvm/arm.c +60 -0

90 lines not on this page · raw message

arch/arm/kvm/assign-dev.c new file +189 -0

189 lines not on this page · raw message

arch/arm/kvm/vgic.c +106 -0

148 lines not on this page · raw message

include/linux/irqchip/arm-gic.h +1 -0
index adb5d00..faf92cc 100644
@@ -53,6 +53,7 @@
 #define GICH_LR_STATE			(3 << 28)
 #define GICH_LR_PENDING_BIT		(1 << 28)
 #define GICH_LR_ACTIVE_BIT		(1 << 29)
+#define GICH_LR_HWIRQ_BIT               (1 << 31)
 #define GICH_LR_EOI			(1 << 19)
 
 #define GICH_MISR_EOI			(1 << 0)
include/uapi/linux/kvm.h +33 -0
index a5c86fc..e850ca9 100644
@@ -932,6 +932,10 @@ struct kvm_s390_ucas_mapping {
 
 /* ioctl for vm fd */
 #define KVM_CREATE_DEVICE	  _IOWR(KVMIO,  0xe0, struct kvm_create_device)
+/* vm fd ioctl for ARM Device Passthrough */
+#define KVM_ARM_GET_DEVICE_RESOURCES _IOW(KVMIO,  0xe1, struct kvm_arm_get_device_resources)
+#define KVM_ARM_ASSIGN_DEVICE     _IOW(KVMIO,  0xe2, struct kvm_arm_assigned_device)
+
 
 /* ioctls for fds returned by KVM_CREATE_DEVICE */
 #define KVM_SET_DEVICE_ATTR	  _IOW(KVMIO,  0xe1, struct kvm_device_attr)
@@ -1060,4 +1064,33 @@ struct kvm_assigned_msix_entry {
 	__u16 padding[3];
 };
 
+/* ARM Device Passthrough Definitions */
+
+/* MAX 6 MMIO resources per device - for now*/
+#define MAX_RES_PER_DEVICE      6
+struct kvm_arm_get_device_resources {
+	char    devname[128];
+	__u32   resource_cnt;
+	struct {
+		__u64   hpa;
+		__u32   size;
+		__u32   attr;
+		char    host_name[64];
+	} host_resources[MAX_RES_PER_DEVICE];
+	struct {
+		__u32   hwirq;
+		__u32   attr;
+		char    host_name[64];
+	} hostirq;
+};
+
+struct kvm_guest_device_resources {
+	__u64   gpa[MAX_RES_PER_DEVICE];
+	__u32   girq;
+};
+
+struct kvm_arm_assigned_device {
+	struct  kvm_arm_get_device_resources dev_res;
+	struct  kvm_guest_device_resources guest_res;
+};
 #endif /* __LINUX_KVM_H */
Signature · 1 line
1.7.9.5
#1 lore raw

Am 11.06.2013 um 09:43 schrieb Mario Smarduch <[email protected]>:

Quoted 8 lines

This is the initial device pass through support.
At this time host == guest only is supported.
Basic Operation:

- QEMU parameters: -device kvm-device-assign,host=<device name> for example - kvm-device-assign,host='arm-sp804'. Essentially any device that does PIO should be supported.

Yikes!

Over the last few years we've worked very hard to get rid of the unfortunate intertwining of device assignment and KVM. There are a number of reasons it's a bad idea:

- kvm access is a potential priviledge escalation
- device assignment is limited to kvm

The solution to both of the above is VFIO. You get a completely separate interface for accessing your devices with a few connecting bits (irqfd, eventfd) to communicate quickly between vfio and kvm.

Is there any particular reason you're not going down that path for your ARM implementation?

On the embedded PPC side we've been discussing vfio and how it fits into a device tree, non-PCI world for a while. If you like, we can dive into more detail on that, either via email or via phone.

Alex

#2 lore raw
Quoted 2 lines · Alexander Graf

Is there any particular reason you're not going down that path for your ARM implementation?

We see this as a good starting point to build on, we need baseline numbers for performance, latency, interrupt throughput on real hardware ASAP to build competency for NFV, which has demanding Dev. Passthrough requirements. Over time we plan contributing to SMMU and VFIO as well (we're looking into this now).

FYI NFV is an initiative wireless/fixed network operators are working towards - to virtualize Core, likely Radia Access and even Home Network equipment, this is a epic undertaking (i.e. Network Function Virtualization). So far VMware has taken the lead (mostly x86).

Quoted 2 lines

On the embedded PPC side we've been discussing vfio and how it fits into a device tree, non-PCI world for a while. If you like, we can dive into more detail on that, either via email or via phone.

I'll email you offline, I'd like to know more what you've done on this and see where we can align/leverage the effort.

- Mario

Quoted 4 lines

Alex

#3 lore raw
Quoted 17 lines · Mario Smarduch
Quoted 2 lines · Alexander Graf

Is there any particular reason you're not going down that path for your ARM implementation?

We see this as a good starting point to build on, we need baseline numbers for performance, latency, interrupt throughput on real hardware ASAP to build competency for NFV, which has demanding Dev. Passthrough requirements. Over time we plan contributing to SMMU and VFIO as well (we're looking into this now).

FYI NFV is an initiative wireless/fixed network operators are working towards - to virtualize Core, likely Radia Access and even Home Network equipment, this is a epic undertaking (i.e. Network Function Virtualization). So far VMware has taken the lead (mostly x86).

Quoted 1 line
Quoted 4 lines
Quoted 1 line

On the embedded PPC side we've been discussing vfio and how it fits into a device tree, non-PCI world for a while. If you like, we can dive into more detail on that, either via email or via phone.

I'll email you offline, I'd like to know more what you've done on this and see where we can align/leverage the effort.

Yes, please let's use VFIO rather than continue to use or invent new device assignment interfaces for KVM. Antonios Motakis (cc'd) already contacted me about VFIO for ARM. IIRC, his initial impression was that the IOMMU backend was almost entirely reusable for ARM (a couple PCI assumptions implicit in the IOMMU API to handle) and my hope was that ARM and PPC could work together on a common VFIO device tree backend. Thanks,

Alex

#4 lore raw

I know Antonios very well. Yes our intent is definitely to use VFIO.

- Mario

Quoted 33 lines · Alex Williamson
Quoted 17 lines · Mario Smarduch
Quoted 2 lines · Alexander Graf

Is there any particular reason you're not going down that path for your ARM implementation?

We see this as a good starting point to build on, we need baseline numbers for performance, latency, interrupt throughput on real hardware ASAP to build competency for NFV, which has demanding Dev. Passthrough requirements. Over time we plan contributing to SMMU and VFIO as well (we're looking into this now).

FYI NFV is an initiative wireless/fixed network operators are working towards - to virtualize Core, likely Radia Access and even Home Network equipment, this is a epic undertaking (i.e. Network Function Virtualization). So far VMware has taken the lead (mostly x86).

Quoted 1 line
Quoted 4 lines
Quoted 1 line

On the embedded PPC side we've been discussing vfio and how it fits into a device tree, non-PCI world for a while. If you like, we can dive into more detail on that, either via email or via phone.

I'll email you offline, I'd like to know more what you've done on this and see where we can align/leverage the effort.

Yes, please let's use VFIO rather than continue to use or invent new device assignment interfaces for KVM. Antonios Motakis (cc'd) already contacted me about VFIO for ARM. IIRC, his initial impression was that the IOMMU backend was almost entirely reusable for ARM (a couple PCI assumptions implicit in the IOMMU API to handle) and my hope was that ARM and PPC could work together on a common VFIO device tree backend. Thanks,

Alex

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#7 lore raw

Resending, initial email from my exchange client got rejected due to HTML content

Quoted 2 lines · Mario Smarduch

Hi Antonios,
thanks for your feedback, initially we?ll work with static binding gain performance data given latency/throughput is key, later add dynamic binding (as well as re-optimize affinity code). And as you already know move towards VFIO, which is a longer term effort.

Quoted 12 lines
arch/arm/include/asm/kvm_host.h +7 -0
+struct kvm_arm_assigned_dev_kernel {
+       struct list_head list;
+       struct kvm_arm_assigned_device dev;
+       irqreturn_t (*irq_handler)(int, void *);
+       void *irq_arg;
+};
+
Quoted 4 lines

Instead of irq_arg, isn't something such as target_vcpu more clear?

MS> Agree.

Quoted 49 lines

diff --git a/arch/arm/kvm/vgic.c b/arch/arm/kvm/vgic.c
index 17c5ac7..f4cb804 100644
--- a/arch/arm/kvm/vgic.c
+++ b/arch/arm/kvm/vgic.c
@@ -449,6 +449,41 @@ static u32 vgic_get_target_reg(struct kvm *kvm, int irq)
return val;
}

+/* Follow the IRQ vCPU affinity so passthrough device interrupts are injected
+ * on physical CPU they execute.
+ */
+static void vgic_set_passthru_affinity(struct kvm *kvm, int irq, u32 target) +{
+ struct list_head *dev_list_ptr = &kvm->arch.assigned_dev_head;
+ struct list_head *ptr;
+ struct kvm_arm_assigned_dev_kernel *assigned_dev;
+ struct vgic_dist *dist = &kvm->arch.vgic;
+ char *buf;
+ int cpu, hwirq;
+
+ mutex_lock(&kvm->arch.dev_pasthru_lock);
+ list_for_each(ptr, dev_list_ptr) {
+ assigned_dev = list_entry(ptr,
+ struct kvm_arm_assigned_dev_kernel, list);
+ if (assigned_dev->dev.guest_res.girq == irq) {
+ if (assigned_dev->irq_arg)
+ free_irq(irq, assigned_dev->irq_arg);
+ cpu = kvm->vcpus[target]->cpu;
+ hwirq = assigned_dev->dev.dev_res.hostirq.hwirq;
+ irq_set_affinity(hwirq, cpumask_of(cpu));
+ assigned_dev->irq_arg = kvm->vcpus[target];
+ buf = assigned_dev->dev.dev_res.hostirq.host_name;
+ sprintf(buf, "%s-KVM Pass-through",
+ assigned_dev->dev.dev_res.devname);
+ gic_spi_set_priodrop(hwirq);
+ dist->guest_irq[hwirq - VGIC_NR_PRIVATE_IRQS] = irq;
+ request_irq(hwirq, assigned_dev->irq_handler, 0, buf,
+ assigned_dev->irq_arg);
+ }
+ }
+ mutex_unlock(&kvm->arch.dev_pasthru_lock);
+}
+

Quoted 8 lines

Maybe vgic_set_pasthru_affinity is not an ideal name for the function, since you do more than that here.

After looking at your code I think things will be much easier if you decouple the host irq affinity bits from here. After that there is not much stopping from affinity following the CPU a vCPU will execute.

I would rename this to something to reflect that you enable priodrop for this IRQ here, for example only vgic_set_passthrough could suffice (I'm don't like the pasthru abbreviation a lot). Then the affinity bits can be put in a different function.

MJS> Agree naming could be better.

Quoted 7 lines

In arch/arm/kvm/arm.c kvm_arch_vcpu_load() you can follow up whenever a vcpu is moved to a different cpu. However in practice I don't know if the additional complexity of having the irq affinity follow the vcpu significantly improves irq latency.

MJS> This should save a costly IPI if for example Phys IRQ is taken on CPU 0 and target vCPU on CPU 1. I agree kvm_arch_vcpu_load() is a good place if you let vCPUs float. vigic_set_passthrough_affinity can be optimized more to eliminate the free_irq(), requesnt_irq(). For now it?s a simple implementation we?re assuming static binding, start gathering performance/latency data. Will change the name as you suggest.

Quoted 10 lines
Signature · 5 lines
-- 

*Antonios Motakis*, Virtual Open Systems*
*/Open Source KVM Virtualization Development
/www.virtualopensystems.com <http://www.virtualopensystems.com>