DWC back port from Linux kernel
Subsystems (5)
v2 cover DWC back port from Linux kernel
This patch series has been generated in an effort to get comments on the implementation of the dwc code within the uBoot.
V2 incorporates comments to first port the kernel header backward to uBoot and then produce the uBoot changes so the uBoot changes are easily distinguishable from the original kernel source.
The first patch is the one of major concern as this patch will make an attempt to commonize the usb headers so that there is re-use and prepare the usb headers for future usb code back ports from the linux kernel.
This code will compile for omap5 and omap4 but fails for am335x. Before I invest anymore time in this I would like to understand if there are any comments on the overall implemenation.
Makefile | 1 + arch/arm/cpu/armv7/omap5/hw_data.c | 14 + arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 + arch/arm/include/asm/arch-omap5/clock.h | 4 + arch/arm/include/asm/omap_common.h | 1 + common/cmd_usb.c | 6 +- drivers/usb/dwc3/Makefile | 53 + drivers/usb/dwc3/core.c | 847 ++++++++++ drivers/usb/dwc3/core.h | 974 +++++++++++ drivers/usb/dwc3/dwc3-omap.c | 505 ++++++ drivers/usb/dwc3/dwc3-omap.h | 41 + drivers/usb/dwc3/dwc3-uboot.c | 384 +++++ drivers/usb/dwc3/ep0.c | 1085 ++++++++++++ drivers/usb/dwc3/gadget.c | 2806 +++++++++++++++++++++++++++++++ drivers/usb/dwc3/gadget.h | 196 +++ drivers/usb/dwc3/host.c | 107 ++ drivers/usb/dwc3/io.h | 81 + drivers/usb/musb-new/musb_host.h | 1 + drivers/usb/musb-new/usb-compat.h | 30 - include/configs/omap5_common.h | 9 + include/linux/usb/gadget.h | 184 +- include/linux/usb/linux-compat.h | 234 +++ include/linux/usb/usb-compat.h | 1965 ++++++++++++++++++++++ include/linux/usb/usb-mod-devicetable.h | 131 ++ include/usb.h | 119 +- include/usb/lin_gadget_compat.h | 29 +- 26 files changed, 9596 insertions(+), 212 deletions(-)
RFC PATCH v2 1/4 USB: Backport kernel usb header file
Backport the kernel USB header file include/linux/usb.h
that contains the structures and constants for the linux kernel drivers. Rename the usb.h to usb-compat.h so that it is not confused with the uBoot include usb.h file.
Kernel base commit ID:aa4f608478acb7ed69dfcff4f3c404100b78ac49
Signed-off-by Dan Murphy <[email protected]>
--- include/linux/usb/usb-compat.h | 1815 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1815 insertions(+) create mode 100644 include/linux/usb/usb-compat.h
include/linux/usb/usb-compat.h new file +1815 -0
@@ -0,0 +1,1815 @@ +#ifndef __LINUX_USB_H +#define __LINUX_USB_H + +#include <linux/mod_devicetable.h> +#include <linux/usb/ch9.h> + +#define USB_MAJOR 180 +#define USB_DEVICE_MAJOR 189 + + +#ifdef __KERNEL__ + +#include <linux/errno.h> /* for -ENODEV */ +#include <linux/delay.h> /* for mdelay() */ +#include <linux/interrupt.h> /* for in_interrupt() */ +#include <linux/list.h> /* for struct list_head */ +#include <linux/kref.h> /* for struct kref */ +#include <linux/device.h> /* for struct device */ +#include <linux/fs.h> /* for struct file_operations */ +#include <linux/completion.h> /* for struct completion */ +#include <linux/sched.h> /* for current && schedule_timeout */ +#include <linux/mutex.h> /* for struct mutex */ +#include <linux/pm_runtime.h> /* for runtime PM */ + +struct usb_device ; +struct usb_driver ; +struct wusb_dev ; + +/*-------------------------------------------------------------------------*/ + +/* +* Host-side wrappers for standard USB descriptors ... these are parsed +* from the data provided by devices. Parsing turns them from a flat +* sequence of descriptors into a hierarchy: +* +* - devices have one (usually) or more configs; +* - configs have one (often) or more interfaces; +* - interfaces have one (usually) or more settings; +* - each interface setting has zero or (usually) more endpoints. +* - a SuperSpeed endpoint has a companion descriptor +* +* And there might be other descriptors mixed in with those. +* +* Devices may also have class-specific or vendor-specific descriptors. +*/ + +struct ep_device ; + +/** +* struct usb_host_endpoint - host-side endpoint descriptor and queue +* @desc: descriptor for this endpoint, wMaxPacketSize in native byteorder +* @ss_ep_comp: SuperSpeed companion descriptor for this endpoint +* @urb_list: urbs queued to this endpoint; maintained by usbcore +* @hcpriv: for use by HCD; typically holds hardware dma queue head (QH) +* with one or more transfer descriptors (TDs) per urb +* @ep_dev: ep_device for sysfs info +* @extra: descriptors following this endpoint in the configuration +* @extralen: how many bytes of "extra" are valid +* @enabled: URBs may be submitted to this endpoint +* +* USB requests are always queued to a given endpoint, identified by a +* descriptor within an active interface in a given USB configuration. +*/ +struct usb_host_endpoint { +struct usb_endpoint_descriptor desc; +struct usb_ss_ep_comp_descriptor ss_ep_comp; +struct list_head urb_list; +void *hcpriv; +struct ep_device *ep_dev;/* For sysfs info */ + +unsigned char *extra;/* Extra descriptors */ +int extralen; +int enabled; +}; + +/* host-side wrapper for one interface setting's parsed descriptors */ +struct usb_host_interface { +struct usb_interface_descriptor desc; + +int extralen; +unsigned char *extra;/* Extra descriptors */ + +/* array of desc.bNumEndpoint endpoints associated with this +* interface setting. these will be in no particular order. +*/ +struct usb_host_endpoint *endpoint; + +char *string;/* iInterface string, if present */ +}; + +enum usb_interface_condition { +USB_INTERFACE_UNBOUND =0 , +USB_INTERFACE_BINDING , +USB_INTERFACE_BOUND , +USB_INTERFACE_UNBINDING , +}; + +/** +* struct usb_interface - what usb device drivers talk to +* @altsetting: array of interface structures, one for each alternate +* setting that may be selected. Each one includes a set of +* endpoint configurations. They will be in no particular order. +* @cur_altsetting: the current altsetting. +* @num_altsetting: number of altsettings defined. +* @intf_assoc: interface association descriptor +* @minor: the minor number assigned to this interface, if this +* interface is bound to a driver that uses the USB major number. +* If this interface does not use the USB major, this field should +* be unused. The driver should set this value in the probe() +* function of the driver, after it has been assigned a minor +* number from the USB core by calling usb_register_dev(). +* @condition: binding state of the interface: not bound, binding +* (in probe()), bound to a driver, or unbinding (in disconnect()) +* @sysfs_files_created: sysfs attributes exist +* @ep_devs_created: endpoint child pseudo-devices exist +* @unregistering: flag set when the interface is being unregistered +* @needs_remote_wakeup: flag set when the driver requires remote-wakeup +* capability during autosuspend. +* @needs_altsetting0: flag set when a set-interface request for altsetting 0 +* has been deferred. +* @needs_binding: flag set when the driver should be re-probed or unbound +* following a reset or suspend operation it doesn't support. +* @dev: driver model's view of this device +* @usb_dev: if an interface is bound to the USB major, this will point +* to the sysfs representation for that device. +* @pm_usage_cnt: PM usage counter for this interface +* @reset_ws: Used for scheduling resets from atomic context. +* @reset_running: set to 1 if the interface is currently running a +* queued reset so that usb_cancel_queued_reset() doesn't try to +* remove from the workqueue when running inside the worker +* thread. See __usb_queue_reset_device(). +* @resetting_device: USB core reset the device, so use alt setting 0 as +* current; needs bandwidth alloc after reset. +* +* USB device drivers attach to interfaces on a physical device. Each +* interface encapsulates a single high level function, such as feeding +* an audio stream to a speaker or reporting a change in a volume control. +* Many USB devices only have one interface. The protocol used to talk to +* an interface's endpoints can be defined in a usb "class" specification, +* or by a product's vendor. The (default) control endpoint is part of +* every interface, but is never listed among the interface's descriptors. +* +* The driver that is bound to the interface can use standard driver model +* calls such as dev_get_drvdata() on the dev member of this structure. +* +* Each interface may have alternate settings. The initial configuration +* of a device sets altsetting 0, but the device driver can change +* that setting using usb_set_interface(). Alternate settings are often +* used to control the use of periodic endpoints, such as by having +* different endpoints use different amounts of reserved USB bandwidth. +* All standards-conformant USB devices that use isochronous endpoints +* will use them in non-default settings. +* +* The USB specification says that alternate setting numbers must run from +* 0 to one less than the total number of alternate settings. But some +* devices manage to mess this up, and the structures aren't necessarily +* stored in numerical order anyhow. Use usb_altnum_to_altsetting() to +* look up an alternate setting in the altsetting array based on its number. +*/ +struct usb_interface { +/* array of alternate settings for this interface, +* stored in no particular order */ +struct usb_host_interface *altsetting; + +struct usb_host_interface *cur_altsetting;/* the currently +* active alternate setting */ +unsigned num_altsetting;/* number of alternate settings */ + +/* If there is an interface association descriptor then it will list +* the associated interfaces */ +struct usb_interface_assoc_descriptor *intf_assoc; + +int minor;/* minor number this interface is +* bound to */ +enum usb_interface_condition condition;/* state of binding */ +unsigned sysfs_files_created:1 ;/* the sysfs attributes exist */ +unsigned ep_devs_created:1 ;/* endpoint "devices" exist */ +unsigned unregistering:1 ;/* unregistration is in progress */ +unsigned needs_remote_wakeup:1 ;/* driver requires remote wakeup */ +unsigned needs_altsetting0:1 ;/* switch to altsetting 0 is pending */ +unsigned needs_binding:1 ;/* needs delayed unbind/rebind */ +unsigned reset_running:1 ; +unsigned resetting_device:1 ;/* true: bandwidth alloc after reset */ + +struct device dev;/* interface specific device info */ +struct device *usb_dev; +atomic_t pm_usage_cnt;/* usage counter for autosuspend */ +struct work_struct reset_ws;/* for resets in atomic context */ +}; +#define to_usb_interface (d) container_of(d, struct usb_interface, dev) + +static inline void *usb_get_intfdata (struct usb_interface *intf) +{ +return dev_get_drvdata (&intf->dev); +} + +static inline void usb_set_intfdata (struct usb_interface *intf,void *data) +{ +dev_set_drvdata (&intf->dev, data); +} + +struct usb_interface *usb_get_intf (struct usb_interface *intf); +void usb_put_intf (struct usb_interface *intf); + +/* this maximum is arbitrary */ +#define USB_MAXINTERFACES 32 +#define USB_MAXIADS (USB_MAXINTERFACES/2) + +/** +* struct usb_interface_cache - long-term representation of a device interface +* @num_altsetting: number of altsettings defined. +* @ref: reference counter. +* @altsetting: variable-length array of interface structures, one for +* each alternate setting that may be selected. Each one includes a +* set of endpoint configurations. They will be in no particular order. +* +* These structures persist for the lifetime of a usb_device, unlike +* struct usb_interface (which persists only as long as its configuration +* is installed). The altsetting arrays can be accessed through these +* structures at any time, permitting comparison of configurations and +* providing support for the /proc/bus/usb/devices pseudo-file. +*/ +struct usb_interface_cache { +unsigned num_altsetting;/* number of alternate settings */ +struct kref ref;/* reference counter */ + +/* variable-length array of alternate settings for this interface, +* stored in no particular order */ +struct usb_host_interface altsetting[0 ]; +}; +#define ref_to_usb_interface_cache (r) \ + container_of(r, struct usb_interface_cache, ref) +#define altsetting_to_usb_interface_cache (a) \ + container_of(a, struct usb_interface_cache, altsetting[0]) + +/** +* struct usb_host_config - representation of a device's configuration +* @desc: the device's configuration descriptor. +* @string: pointer to the cached version of the iConfiguration string, if +* present for this configuration. +* @intf_assoc: list of any interface association descriptors in this config +* @interface: array of pointers to usb_interface structures, one for each +* interface in the configuration. The number of interfaces is stored +* in desc.bNumInterfaces. These pointers are valid only while the +* the configuration is active. +* @intf_cache: array of pointers to usb_interface_cache structures, one +* for each interface in the configuration. These structures exist +* for the entire life of the device. +* @extra: pointer to buffer containing all extra descriptors associated +* with this configuration (those preceding the first interface +* descriptor). +* @extralen: length of the extra descriptors buffer. +* +* USB devices may have multiple configurations, but only one can be active +* at any time. Each encapsulates a different operational environment; +* for example, a dual-speed device would have separate configurations for +* full-speed and high-speed operation. The number of configurations +* available is stored in the device descriptor as bNumConfigurations. +* +* A configuration can contain multiple interfaces. Each corresponds to +* a different function of the USB device, and all are available whenever +* the configuration is active. The USB standard says that interfaces +* are supposed to be numbered from 0 to desc.bNumInterfaces-1, but a lot +* of devices get this wrong. In addition, the interface array is not +* guaranteed to be sorted in numerical order. Use usb_ifnum_to_if() to +* look up an interface entry based on its number. +* +* Device drivers should not attempt to activate configurations. The choice +* of which configuration to install is a policy decision based on such +* considerations as available power, functionality provided, and the user's +* desires (expressed through userspace tools). However, drivers can call +* usb_reset_configuration() to reinitialize the current configuration and +* all its interfaces. +*/ +struct usb_host_config { +struct usb_config_descriptor desc; + +char *string;/* iConfiguration string, if present */ + +/* List of any Interface Association Descriptors in this +* configuration. */ +struct usb_interface_assoc_descriptor *intf_assoc[USB_MAXIADS ]; + +/* the interfaces associated with this configuration, +* stored in no particular order */ +struct usb_interface *interface[USB_MAXINTERFACES ]; + +/* Interface information available even when this is not the +* active configuration */ +struct usb_interface_cache *intf_cache[USB_MAXINTERFACES ]; + +unsigned char *extra;/* Extra descriptors */ +int extralen; +}; + +/* USB2.0 and USB3.0 device BOS descriptor set */ +struct usb_host_bos { +struct usb_bos_descriptor *desc; + +/* wireless cap descriptor is handled by wusb */ +struct usb_ext_cap_descriptor *ext_cap; +struct usb_ss_cap_descriptor *ss_cap; +struct usb_ss_container_id_descriptor *ss_id; +}; + +int __usb_get_extra_descriptor (char *buffer,unsigned size, +unsigned char type,void **ptr); +#define usb_get_extra_descriptor (ifpoint, type, ptr) \ + __usb_get_extra_descriptor((ifpoint)->extra, \ + (ifpoint)->extralen, \ + type, (void **)ptr) + +/* ----------------------------------------------------------------------- */ + +/* USB device number allocation bitmap */ +struct usb_devmap { +unsigned long devicemap[128 / (8 *sizeof (unsigned long ))]; +}; + +/* +* Allocated per bus (tree of devices) we have: +*/ +struct usb_bus { +struct device *controller;/* host/master side hardware */ +int busnum;/* Bus number (in order of reg) */ +const char *bus_name;/* stable id (PCI slot_name etc) */ +u8 uses_dma;/* Does the host controller use DMA? */ +u8 uses_pio_for_control;/* +* Does the host controller use PIO +* for control transfers? +*/ +u8 otg_port;/* 0, or number of OTG/HNP port */ +unsigned is_b_host:1 ;/* true during some HNP roleswitches */ +unsigned b_hnp_enable:1 ;/* OTG: did A-Host enable HNP? */ +unsigned no_stop_on_short:1 ;/* +* Quirk: some controllers don't stop +* the ep queue on a short transfer +* with the URB_SHORT_NOT_OK flag set. +*/ +unsigned sg_tablesize;/* 0 or largest number of sg list entries */ + +int devnum_next;/* Next open device number in +* round-robin allocation */ + +struct usb_devmap devmap;/* device address allocation map */ +struct usb_device *root_hub;/* Root hub */ +struct usb_bus *hs_companion;/* Companion EHCI bus, if any */ +struct list_head bus_list;/* list of busses */ + +int bandwidth_allocated;/* on this bus: how much of the time +* reserved for periodic (intr/iso) +* requests is used, on average? +* Units: microseconds/frame. +* Limits: Full/low speed reserve 90%, +* while high speed reserves 80%. +*/ +int bandwidth_int_reqs;/* number of Interrupt requests */ +int bandwidth_isoc_reqs;/* number of Isoc. requests */ + +unsigned resuming_ports;/* bit array: resuming root-hub ports */ + +#if defined(CONFIG_USB_MON ) || defined(CONFIG_USB_MON_MODULE ) +struct mon_bus *mon_bus;/* non-null when associated */ +int monitored;/* non-zero when monitored */ +#endif +}; + +/* ----------------------------------------------------------------------- */ + +/* This is arbitrary. +* From USB 2.0 spec Table 11-13, offset 7, a hub can +* have up to 255 ports. The most yet reported is 10. +* +* Current Wireless USB host hardware (Intel i1480 for example) allows +* up to 22 devices to connect. Upcoming hardware might raise that +* limit. Because the arrays need to add a bit for hub status data, we +* do 31, so plus one evens out to four bytes. +*/ +#define USB_MAXCHILDREN (31) + +struct usb_tt ; + +enum usb_device_removable { +USB_DEVICE_REMOVABLE_UNKNOWN =0 , +USB_DEVICE_REMOVABLE , +USB_DEVICE_FIXED , +}; + +enum usb_port_connect_type { +USB_PORT_CONNECT_TYPE_UNKNOWN =0 , +USB_PORT_CONNECT_TYPE_HOT_PLUG , +USB_PORT_CONNECT_TYPE_HARD_WIRED , +USB_PORT_NOT_USED , +}; + +/* +* USB 3.0 Link Power Management (LPM) parameters. +* +* PEL and SEL are USB 3.0 Link PM latencies for device-initiated LPM exit. +* MEL is the USB 3.0 Link PM latency for host-initiated LPM exit. +* All three are stored in nanoseconds. +*/ +struct usb3_lpm_parameters { +/* +* Maximum exit latency (MEL) for the host to send a packet to the +* device (either a Ping for isoc endpoints, or a data packet for +* interrupt endpoints), the hubs to decode the packet, and for all hubs +* in the path to transition the links to U0. +*/ +unsigned int mel; +/* +* Maximum exit latency for a device-initiated LPM transition to bring +* all links into U0. Abbreviated as "PEL" in section 9.4.12 of the USB +* 3.0 spec, with no explanation of what "P" stands for. "Path"? +*/ +unsigned int pel; + +/* +* The System Exit Latency (SEL) includes PEL, and three other +* latencies. After a device initiates a U0 transition, it will take +* some time from when the device sends the ERDY to when it will finally +* receive the data packet. Basically, SEL should be the worse-case +* latency from when a device starts initiating a U0 transition to when +* it will get data. +*/ +unsigned int sel; +/* +* The idle timeout value that is currently programmed into the parent +* hub for this device. When the timer counts to zero, the parent hub +* will initiate an LPM transition to either U1 or U2. +*/ +int timeout; +}; + +/** +* struct usb_device - kernel's representation of a USB device +* @devnum: device number; address on a USB bus +* @devpath: device ID string for use in messages (e.g., /port/...) +* @route: tree topology hex string for use with xHCI +* @state: device state: configured, not attached, etc. +* @speed: device speed: high/full/low (or error) +* @tt: Transaction Translator info; used with low/full speed dev, highspeed hub +* @ttport: device port on that tt hub +* @toggle: one bit for each endpoint, with ([0] = IN, [1] = OUT) endpoints +* @parent: our hub, unless we're the root +* @bus: bus we're part of +* @ep0: endpoint 0 data (default control pipe) +* @dev: generic device interface +* @descriptor: USB device descriptor +* @bos: USB device BOS descriptor set +* @config: all of the device's configs +* @actconfig: the active configuration +* @ep_in: array of IN endpoints +* @ep_out: array of OUT endpoints +* @rawdescriptors: raw descriptors for each config +* @bus_mA: Current available from the bus +* @portnum: parent port number (origin 1) +* @level: number of USB hub ancestors +* @can_submit: URBs may be submitted +* @persist_enabled: USB_PERSIST enabled for this device +* @have_langid: whether string_langid is valid +* @authorized: policy has said we can use it; +* (user space) policy determines if we authorize this device to be +* used or not. By default, wired USB devices are authorized. +* WUSB devices are not, until we authorize them from user space. +* FIXME -- complete doc +* @authenticated: Crypto authentication passed +* @wusb: device is Wireless USB +* @lpm_capable: device supports LPM +* @usb2_hw_lpm_capable: device can perform USB2 hardware LPM +* @usb2_hw_lpm_enabled: USB2 hardware LPM enabled +* @usb3_lpm_enabled: USB3 hardware LPM enabled +* @string_langid: language ID for strings +* @product: iProduct string, if present (static) +* @manufacturer: iManufacturer string, if present (static) +* @serial: iSerialNumber string, if present (static) +* @filelist: usbfs files that are open to this device +* @maxchild: number of ports if hub +* @quirks: quirks of the whole device +* @urbnum: number of URBs submitted for the whole device +* @active_duration: total time device is not suspended +* @connect_time: time device was first connected +* @do_remote_wakeup: remote wakeup should be enabled +* @reset_resume: needs reset instead of resume +* @port_is_suspended: the upstream port is suspended (L2 or U3) +* @wusb_dev: if this is a Wireless USB device, link to the WUSB +* specific data for the device. +* @slot_id: Slot ID assigned by xHCI +* @removable: Device can be physically removed from this port +* @u1_params: exit latencies for USB3 U1 LPM state, and hub-initiated timeout. +* @u2_params: exit latencies for USB3 U2 LPM state, and hub-initiated timeout. +* @lpm_disable_count: Ref count used by usb_disable_lpm() and usb_enable_lpm() +* to keep track of the number of functions that require USB 3.0 Link Power +* Management to be disabled for this usb_device. This count should only +* be manipulated by those functions, with the bandwidth_mutex is held. +* +* Notes: +* Usbcore drivers should not set usbdev->state directly. Instead use +* usb_set_device_state(). +*/ +struct usb_device { +int devnum; +char devpath[16 ]; +u32 route; +enum usb_device_state state; +enum usb_device_speed speed; + +struct usb_tt *tt; +int ttport; + +unsigned int toggle[2 ]; + +struct usb_device *parent; +struct usb_bus *bus; +struct usb_host_endpoint ep0; + +struct device dev; + +struct usb_device_descriptor descriptor; +struct usb_host_bos *bos; +struct usb_host_config *config; + +struct usb_host_config *actconfig; +struct usb_host_endpoint *ep_in[16 ]; +struct usb_host_endpoint *ep_out[16 ]; + +char **rawdescriptors; + +unsigned short bus_mA; +u8 portnum; +u8 level; + +unsigned can_submit:1 ; +unsigned persist_enabled:1 ; +unsigned have_langid:1 ; +unsigned authorized:1 ; +unsigned authenticated:1 ; +unsigned wusb:1 ; +unsigned lpm_capable:1 ; +unsigned usb2_hw_lpm_capable:1 ; +unsigned usb2_hw_lpm_enabled:1 ; +unsigned usb3_lpm_enabled:1 ; +int string_langid; + +/* static strings from the device */ +char *product; +char *manufacturer; +char *serial; + +struct list_head filelist; + +int maxchild; + +u32 quirks; +atomic_t urbnum; + +unsigned long active_duration; + +#ifdef CONFIG_PM +unsigned long connect_time; + +unsigned do_remote_wakeup:1 ; +unsigned reset_resume:1 ; +unsigned port_is_suspended:1 ; +#endif +struct wusb_dev *wusb_dev; +int slot_id; +enum usb_device_removable removable; +struct usb3_lpm_parameters u1_params; +struct usb3_lpm_parameters u2_params; +unsigned lpm_disable_count; +}; +#define to_usb_device (d) container_of(d, struct usb_device, dev) + +static inline struct usb_device *interface_to_usbdev (struct usb_interface *intf) +{ +return to_usb_device (intf->dev.parent); +} + +extern struct usb_device *usb_get_dev (struct usb_device *dev); +extern void usb_put_dev (struct usb_device *dev); +extern struct usb_device *usb_hub_find_child (struct usb_device *hdev, +int port1); + +/** +* usb_hub_for_each_child - iterate over all child devices on the hub +* @hdev: USB device belonging to the usb hub +* @port1: portnum associated with child device +* @child: child device pointer +*/ +#define usb_hub_for_each_child (hdev, port1, child) \ + for (port1 = 1, child = usb_hub_find_child(hdev, port1); \ + port1 <= hdev->maxchild; \ + child = usb_hub_find_child(hdev, ++port1)) \ + if (!child) continue; else + +/* USB device locking */ +#define usb_lock_device (udev) device_lock(&(udev)->dev) +#define usb_unlock_device (udev) device_unlock(&(udev)->dev) +#define usb_trylock_device (udev) device_trylock(&(udev)->dev) +extern int usb_lock_device_for_reset (struct usb_device *udev, +const struct usb_interface *iface); + +/* USB port reset for device reinitialization */ +extern int usb_reset_device (struct usb_device *dev); +extern void usb_queue_reset_device (struct usb_interface *dev); + +#ifdef CONFIG_ACPI +extern int usb_acpi_set_power_state (struct usb_device *hdev,int index, +bool enable); +extern bool usb_acpi_power_manageable (struct usb_device *hdev,int index); +#else +static inline int usb_acpi_set_power_state (struct usb_device *hdev,int index, +bool enable) {return 0 ; } +static inline bool usb_acpi_power_manageable (struct usb_device *hdev,int index) + {return true; } +#endif + +/* USB autosuspend and autoresume */ +#ifdef CONFIG_PM_RUNTIME +extern void usb_enable_autosuspend (struct usb_device *udev); +extern void usb_disable_autosuspend (struct usb_device *udev); + +extern int usb_autopm_get_interface (struct usb_interface *intf); +extern void usb_autopm_put_interface (struct usb_interface *intf); +extern int usb_autopm_get_interface_async (struct usb_interface *intf); +extern void usb_autopm_put_interface_async (struct usb_interface *intf); +extern void usb_autopm_get_interface_no_resume (struct usb_interface *intf); +extern void usb_autopm_put_interface_no_suspend (struct usb_interface *intf); + +static inline void usb_mark_last_busy (struct usb_device *udev) +{ +pm_runtime_mark_last_busy (&udev->dev); +} + +#else + +static inline int usb_enable_autosuspend (struct usb_device *udev) +{return 0 ; } +static inline int usb_disable_autosuspend (struct usb_device *udev) +{return 0 ; } + +static inline int usb_autopm_get_interface (struct usb_interface *intf) +{return 0 ; } +static inline int usb_autopm_get_interface_async (struct usb_interface *intf) +{return 0 ; } + +static inline void usb_autopm_put_interface (struct usb_interface *intf) +{ } +static inline void usb_autopm_put_interface_async (struct usb_interface *intf) +{ } +static inline void usb_autopm_get_interface_no_resume ( +struct usb_interface *intf) +{ } +static inline void usb_autopm_put_interface_no_suspend ( +struct usb_interface *intf) +{ } +static inline void usb_mark_last_busy (struct usb_device *udev) +{ } +#endif + +extern int usb_disable_lpm (struct usb_device *udev); +extern void usb_enable_lpm (struct usb_device *udev); +/* Same as above, but these functions lock/unlock the bandwidth_mutex. */ +extern int usb_unlocked_disable_lpm (struct usb_device *udev); +extern void usb_unlocked_enable_lpm (struct usb_device *udev); + +extern int usb_disable_ltm (struct usb_device *udev); +extern void usb_enable_ltm (struct usb_device *udev); + +static inline bool usb_device_supports_ltm (struct usb_device *udev) +{ +if (udev->speed !=USB_SPEED_SUPER || !udev->bos || !udev->bos->ss_cap) +return false; +return udev->bos->ss_cap->bmAttributes &USB_LTM_SUPPORT ; +} + + +/*-------------------------------------------------------------------------*/ + +/* for drivers using iso endpoints */ +extern int usb_get_current_frame_number (struct usb_device *usb_dev); + +/* Sets up a group of bulk endpoints to support multiple stream IDs. */ +extern int usb_alloc_streams (struct usb_interface *interface, +struct usb_host_endpoint **eps,unsigned int num_eps, +unsigned int num_streams,gfp_t mem_flags); + +/* Reverts a group of bulk endpoints back to not using stream IDs. */ +extern void usb_free_streams (struct usb_interface *interface, +struct usb_host_endpoint **eps,unsigned int num_eps, +gfp_t mem_flags); + +/* used these for multi-interface device registration */ +extern int usb_driver_claim_interface (struct usb_driver *driver, +struct usb_interface *iface,void *priv); + +/** +* usb_interface_claimed - returns true iff an interface is claimed +* @iface: the interface being checked +* +* Returns true (nonzero) iff the interface is claimed, else false (zero). +* Callers must own the driver model's usb bus readlock. So driver +* probe() entries don't need extra locking, but other call contexts +* may need to explicitly claim that lock. +* +*/ +static inline int usb_interface_claimed (struct usb_interface *iface) +{ +return (iface->dev.driver !=NULL ); +} + +extern void usb_driver_release_interface (struct usb_driver *driver, +struct usb_interface *iface); +const struct usb_device_id *usb_match_id (struct usb_interface *interface, +const struct usb_device_id *id); +extern int usb_match_one_id (struct usb_interface *interface, +const struct usb_device_id *id); + +extern struct usb_interface *usb_find_interface (struct usb_driver *drv, +int minor); +extern struct usb_interface *usb_ifnum_to_if (const struct usb_device *dev, +unsigned ifnum); +extern struct usb_host_interface *usb_altnum_to_altsetting ( +const struct usb_interface *intf,unsigned int altnum); +extern struct usb_host_interface *usb_find_alt_setting ( +struct usb_host_config *config, +unsigned int iface_num, +unsigned int alt_num); + + +/** +* usb_make_path - returns stable device path in the usb tree +* @dev: the device whose path is being constructed +* @buf: where to put the string +* @size: how big is "buf"? +* +* Returns length of the string (> 0) or negative if size was too small. +* +* This identifier is intended to be "stable", reflecting physical paths in +* hardware such as physical bus addresses for host controllers or ports on +* USB hubs. That makes it stay the same until systems are physically +* reconfigured, by re-cabling a tree of USB devices or by moving USB host +* controllers. Adding and removing devices, including virtual root hubs +* in host controller driver modules, does not change these path identifiers; +* neither does rebooting or re-enumerating. These are more useful identifiers +* than changeable ("unstable") ones like bus numbers or device addresses. +* +* With a partial exception for devices connected to USB 2.0 root hubs, these +* identifiers are also predictable. So long as the device tree isn't changed, +* plugging any USB device into a given hub port always gives it the same path. +* Because of the use of "companion" controllers, devices connected to ports on +* USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are +* high speed, and a different one if they are full or low speed. +*/ +static inline int usb_make_path (struct usb_device *dev,char *buf,size_t size) +{ +int actual; + actual =snprintf (buf, size,"usb-%s-%s" , dev->bus->bus_name, + dev->devpath); +return (actual >= (int )size) ?-1 : actual; +} + +/*-------------------------------------------------------------------------*/ + +#define USB_DEVICE_ID_MATCH_DEVICE \ + (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) +#define USB_DEVICE_ID_MATCH_DEV_RANGE \ + (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) +#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \ + (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) +#define USB_DEVICE_ID_MATCH_DEV_INFO \ + (USB_DEVICE_ID_MATCH_DEV_CLASS | \ + USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \ + USB_DEVICE_ID_MATCH_DEV_PROTOCOL) +#define USB_DEVICE_ID_MATCH_INT_INFO \ + (USB_DEVICE_ID_MATCH_INT_CLASS | \ + USB_DEVICE_ID_MATCH_INT_SUBCLASS | \ + USB_DEVICE_ID_MATCH_INT_PROTOCOL) + +/** +* USB_DEVICE - macro used to describe a specific usb device +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* +* This macro is used to create a struct usb_device_id that matches a +* specific device. +*/ +#define USB_DEVICE (vend, prod) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE, \ + .idVendor = (vend), \ + .idProduct = (prod) +/** +* USB_DEVICE_VER - describe a specific usb device with a version range +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* @lo: the bcdDevice_lo value +* @hi: the bcdDevice_hi value +* +* This macro is used to create a struct usb_device_id that matches a +* specific device, with a version range. +*/ +#define USB_DEVICE_VER (vend, prod, lo, hi) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \ + .idVendor = (vend), \ + .idProduct = (prod), \ + .bcdDevice_lo = (lo), \ + .bcdDevice_hi = (hi) + +/** +* USB_DEVICE_INTERFACE_CLASS - describe a usb device with a specific interface class +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* @cl: bInterfaceClass value +* +* This macro is used to create a struct usb_device_id that matches a +* specific interface class of devices. +*/ +#define USB_DEVICE_INTERFACE_CLASS (vend, prod, cl) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ + USB_DEVICE_ID_MATCH_INT_CLASS, \ + .idVendor = (vend), \ + .idProduct = (prod), \ + .bInterfaceClass = (cl) + +/** +* USB_DEVICE_INTERFACE_PROTOCOL - describe a usb device with a specific interface protocol +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* @pr: bInterfaceProtocol value +* +* This macro is used to create a struct usb_device_id that matches a +* specific interface protocol of devices. +*/ +#define USB_DEVICE_INTERFACE_PROTOCOL (vend, prod, pr) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ + USB_DEVICE_ID_MATCH_INT_PROTOCOL, \ + .idVendor = (vend), \ + .idProduct = (prod), \ + .bInterfaceProtocol = (pr) + +/** +* USB_DEVICE_INTERFACE_NUMBER - describe a usb device with a specific interface number +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* @num: bInterfaceNumber value +* +* This macro is used to create a struct usb_device_id that matches a +* specific interface number of devices. +*/ +#define USB_DEVICE_INTERFACE_NUMBER (vend, prod, num) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ + USB_DEVICE_ID_MATCH_INT_NUMBER, \ + .idVendor = (vend), \ + .idProduct = (prod), \ + .bInterfaceNumber = (num) + +/** +* USB_DEVICE_INFO - macro used to describe a class of usb devices +* @cl: bDeviceClass value +* @sc: bDeviceSubClass value +* @pr: bDeviceProtocol value +* +* This macro is used to create a struct usb_device_id that matches a +* specific class of devices. +*/ +#define USB_DEVICE_INFO (cl, sc, pr) \ + .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, \ + .bDeviceClass = (cl), \ + .bDeviceSubClass = (sc), \ + .bDeviceProtocol = (pr) + +/** +* USB_INTERFACE_INFO - macro used to describe a class of usb interfaces +* @cl: bInterfaceClass value +* @sc: bInterfaceSubClass value +* @pr: bInterfaceProtocol value +* +* This macro is used to create a struct usb_device_id that matches a +* specific class of interfaces. +*/ +#define USB_INTERFACE_INFO (cl, sc, pr) \ + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, \ + .bInterfaceClass = (cl), \ + .bInterfaceSubClass = (sc), \ + .bInterfaceProtocol = (pr) + +/** +* USB_DEVICE_AND_INTERFACE_INFO - describe a specific usb device with a class of usb interfaces +* @vend: the 16 bit USB Vendor ID +* @prod: the 16 bit USB Product ID +* @cl: bInterfaceClass value +* @sc: bInterfaceSubClass value +* @pr: bInterfaceProtocol value +* +* This macro is used to create a struct usb_device_id that matches a +* specific device with a specific class of interfaces. +* +* This is especially useful when explicitly matching devices that have +* vendor specific bDeviceClass values, but standards-compliant interfaces. +*/ +#define USB_DEVICE_AND_INTERFACE_INFO (vend, prod, cl, sc, pr) \ + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ + | USB_DEVICE_ID_MATCH_DEVICE, \ + .idVendor = (vend), \ + .idProduct = (prod), \ + .bInterfaceClass = (cl), \ + .bInterfaceSubClass = (sc), \ + .bInterfaceProtocol = (pr) + +/** +* USB_VENDOR_AND_INTERFACE_INFO - describe a specific usb vendor with a class of usb interfaces +* @vend: the 16 bit USB Vendor ID +* @cl: bInterfaceClass value +* @sc: bInterfaceSubClass value +* @pr: bInterfaceProtocol value +* +* This macro is used to create a struct usb_device_id that matches a +* specific vendor with a specific class of interfaces. +* +* This is especially useful when explicitly matching devices that have +* vendor specific bDeviceClass values, but standards-compliant interfaces. +*/ +#define USB_VENDOR_AND_INTERFACE_INFO (vend, cl, sc, pr) \ + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ + | USB_DEVICE_ID_MATCH_VENDOR, \ + .idVendor = (vend), \ + .bInterfaceClass = (cl), \ + .bInterfaceSubClass = (sc), \ + .bInterfaceProtocol = (pr) + +/* ----------------------------------------------------------------------- */ + +/* Stuff for dynamic usb ids */ +struct usb_dynids { +spinlock_t lock; +struct list_head list; +}; + +struct usb_dynid { +struct list_head node; +struct usb_device_id id; +}; + +extern ssize_t usb_store_new_id (struct usb_dynids *dynids, +struct device_driver *driver, +const char *buf,size_t count); + +extern ssize_t usb_show_dynids (struct usb_dynids *dynids,char *buf); + +/** +* struct usbdrv_wrap - wrapper for driver-model structure +* @driver: The driver-model core driver structure. +* @for_devices: Non-zero for device drivers, 0 for interface drivers. +*/ +struct usbdrv_wrap { +struct device_driver driver; +int for_devices; +}; + +/** +* struct usb_driver - identifies USB interface driver to usbcore +* @name: The driver name should be unique among USB drivers, +* and should normally be the same as the module name. +* @probe: Called to see if the driver is willing to manage a particular +* interface on a device. If it is, probe returns zero and uses +* usb_set_intfdata() to associate driver-specific data with the +* interface. It may also use usb_set_interface() to specify the +* appropriate altsetting. If unwilling to manage the interface, +* return -ENODEV, if genuine IO errors occurred, an appropriate +* negative errno value. +* @disconnect: Called when the interface is no longer accessible, usually +* because its device has been (or is being) disconnected or the +* driver module is being unloaded. +* @unlocked_ioctl: Used for drivers that want to talk to userspace through +* the "usbfs" filesystem. This lets devices provide ways to +* expose information to user space regardless of where they +* do (or don't) show up otherwise in the filesystem. +* @suspend: Called when the device is going to be suspended by the +* system either from system sleep or runtime suspend context. The +* return value will be ignored in system sleep context, so do NOT +* try to continue using the device if suspend fails in this case. +* Instead, let the resume or reset-resume routine recover from +* the failure. +* @resume: Called when the device is being resumed by the system. +* @reset_resume: Called when the suspended device has been reset instead +* of being resumed. +* @pre_reset: Called by usb_reset_device() when the device is about to be +* reset. This routine must not return until the driver has no active +* URBs for the device, and no more URBs may be submitted until the +* post_reset method is called. +* @post_reset: Called by usb_reset_device() after the device +* has been reset +* @id_table: USB drivers use ID table to support hotplugging. +* Export this with MODULE_DEVICE_TABLE(usb,...). This must be set +* or your driver's probe function will never get called. +* @dynids: used internally to hold the list of dynamically added device +* ids for this driver. +* @drvwrap: Driver-model core structure wrapper. +* @no_dynamic_id: if set to 1, the USB core will not allow dynamic ids to be +* added to this driver by preventing the sysfs file from being created. +* @supports_autosuspend: if set to 0, the USB core will not allow autosuspend +* for interfaces bound to this driver. +* @soft_unbind: if set to 1, the USB core will not kill URBs and disable +* endpoints before calling the driver's disconnect method. +* @disable_hub_initiated_lpm: if set to 0, the USB core will not allow hubs +* to initiate lower power link state transitions when an idle timeout +* occurs. Device-initiated USB 3.0 link PM will still be allowed. +* +* USB interface drivers must provide a name, probe() and disconnect() +* methods, and an id_table. Other driver fields are optional. +* +* The id_table is used in hotplugging. It holds a set of descriptors, +* and specialized data may be associated with each entry. That table +* is used by both user and kernel mode hotplugging support. +* +* The probe() and disconnect() methods are called in a context where +* they can sleep, but they should avoid abusing the privilege. Most +* work to connect to a device should be done when the device is opened, +* and undone at the last close. The disconnect code needs to address +* concurrency issues with respect to open() and close() methods, as +* well as forcing all pending I/O requests to complete (by unlinking +* them as necessary, and blocking until the unlinks complete). +*/ +struct usb_driver { +const char *name; + +int (*probe) (struct usb_interface *intf, +const struct usb_device_id *id); + +void (*disconnect) (struct usb_interface *intf); + +int (*unlocked_ioctl) (struct usb_interface *intf,unsigned int code, +void *buf); + +int (*suspend) (struct usb_interface *intf,pm_message_t message); +int (*resume) (struct usb_interface *intf); +int (*reset_resume)(struct usb_interface *intf); + +int (*pre_reset)(struct usb_interface *intf); +int (*post_reset)(struct usb_interface *intf); + +const struct usb_device_id *id_table; + +struct usb_dynids dynids; +struct usbdrv_wrap drvwrap; +unsigned int no_dynamic_id:1 ; +unsigned int supports_autosuspend:1 ; +unsigned int disable_hub_initiated_lpm:1 ; +unsigned int soft_unbind:1 ; +}; +#define to_usb_driver (d) container_of(d, struct usb_driver, drvwrap.driver) + +/** +* struct usb_device_driver - identifies USB device driver to usbcore +* @name: The driver name should be unique among USB drivers, +* and should normally be the same as the module name. +* @probe: Called to see if the driver is willing to manage a particular +* device. If it is, probe returns zero and uses dev_set_drvdata() +* to associate driver-specific data with the device. If unwilling +* to manage the device, return a negative errno value. +* @disconnect: Called when the device is no longer accessible, usually +* because it has been (or is being) disconnected or the driver's +* module is being unloaded. +* @suspend: Called when the device is going to be suspended by the system. +* @resume: Called when the device is being resumed by the system. +* @drvwrap: Driver-model core structure wrapper. +* @supports_autosuspend: if set to 0, the USB core will not allow autosuspend +* for devices bound to this driver. +* +* USB drivers must provide all the fields listed above except drvwrap. +*/ +struct usb_device_driver { +const char *name; + +int (*probe) (struct usb_device *udev); +void (*disconnect) (struct usb_device *udev); + +int (*suspend) (struct usb_device *udev,pm_message_t message); +int (*resume) (struct usb_device *udev,pm_message_t message); +struct usbdrv_wrap drvwrap; +unsigned int supports_autosuspend:1 ; +}; +#define to_usb_device_driver (d) container_of(d, struct usb_device_driver, \ + drvwrap.driver) + +extern struct bus_type usb_bus_type; + +/** +* struct usb_class_driver - identifies a USB driver that wants to use the USB major number +* @name: the usb class device name for this driver. Will show up in sysfs. +* @devnode: Callback to provide a naming hint for a possible +* device node to create. +* @fops: pointer to the struct file_operations of this driver. +* @minor_base: the start of the minor range for this driver. +* +* This structure is used for the usb_register_dev() and +* usb_unregister_dev() functions, to consolidate a number of the +* parameters used for them. +*/ +struct usb_class_driver { +char *name; +char *(*devnode)(struct device *dev,umode_t *mode); +const struct file_operations *fops; +int minor_base; +}; + +/* +* use these in module_init()/module_exit() +* and don't forget MODULE_DEVICE_TABLE(usb, ...) +*/ +extern int usb_register_driver (struct usb_driver *,struct module *, +const char *); + +/* use a define to avoid include chaining to get THIS_MODULE & friends */ +#define usb_register (driver) \ + usb_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) + +extern void usb_deregister (struct usb_driver *); + +/** +* module_usb_driver() - Helper macro for registering a USB driver +* @__usb_driver: usb_driver struct +* +* Helper macro for USB drivers which do not do anything special in module +* init/exit. This eliminates a lot of boilerplate. Each module may only +* use this macro once, and calling it replaces module_init() and module_exit() +*/ +#define module_usb_driver (__usb_driver) \ + module_driver(__usb_driver, usb_register, \ + usb_deregister) + +extern int usb_register_device_driver (struct usb_device_driver *, +struct module *); +extern void usb_deregister_device_driver (struct usb_device_driver *); + +extern int usb_register_dev (struct usb_interface *intf, +struct usb_class_driver *class_driver); +extern void usb_deregister_dev (struct usb_interface *intf, +struct usb_class_driver *class_driver); + +extern int usb_disabled (void ); + +/* ----------------------------------------------------------------------- */ + +/* +* URB support, for asynchronous request completions +*/ + +/* +* urb->transfer_flags: +* +* Note: URB_DIR_IN/OUT is automatically set in usb_submit_urb(). +*/ +#define URB_SHORT_NOT_OK 0x0001/* report short reads as errors */ +#define URB_ISO_ASAP 0x0002/* iso-only; use the first unexpired +* slot in the schedule */ +#define URB_NO_TRANSFER_DMA_MAP 0x0004/* urb->transfer_dma valid on submit */ +#define URB_NO_FSBR 0x0020/* UHCI-specific */ +#define URB_ZERO_PACKET 0x0040/* Finish bulk OUT with short packet */ +#define URB_NO_INTERRUPT 0x0080/* HINT: no non-error interrupt +* needed */ +#define URB_FREE_BUFFER 0x0100/* Free transfer buffer with the URB */ + +/* The following flags are used internally by usbcore and HCDs */ +#define URB_DIR_IN 0x0200/* Transfer from device to host */ +#define URB_DIR_OUT 0 +#define URB_DIR_MASK URB_DIR_IN + +#define URB_DMA_MAP_SINGLE 0x00010000/* Non-scatter-gather mapping */ +#define URB_DMA_MAP_PAGE 0x00020000/* HCD-unsupported S-G */ +#define URB_DMA_MAP_SG 0x00040000/* HCD-supported S-G */ +#define URB_MAP_LOCAL 0x00080000/* HCD-local-memory mapping */ +#define URB_SETUP_MAP_SINGLE 0x00100000/* Setup packet DMA mapped */ +#define URB_SETUP_MAP_LOCAL 0x00200000/* HCD-local setup packet */ +#define URB_DMA_SG_COMBINED 0x00400000/* S-G entries were combined */ +#define URB_ALIGNED_TEMP_BUFFER 0x00800000/* Temp buffer was alloc'd */ + +struct usb_iso_packet_descriptor { +unsigned int offset; +unsigned int length;/* expected length */ +unsigned int actual_length; +int status; +}; + +struct urb ; + +struct usb_anchor { +struct list_head urb_list; +wait_queue_head_t wait; +spinlock_t lock; +unsigned int poisoned:1 ; +}; + +static inline void init_usb_anchor (struct usb_anchor *anchor) +{ +INIT_LIST_HEAD (&anchor->urb_list); +init_waitqueue_head (&anchor->wait); +spin_lock_init (&anchor->lock); +} + +typedef void (*usb_complete_t )(struct urb *); + +/** +* struct urb - USB Request Block +* @urb_list: For use by current owner of the URB. +* @anchor_list: membership in the list of an anchor +* @anchor: to anchor URBs to a common mooring +* @ep: Points to the endpoint's data structure. Will eventually +* replace @pipe. +* @pipe: Holds endpoint number, direction, type, and more. +* Create these values with the eight macros available; +* usb_{snd,rcv}TYPEpipe(dev,endpoint), where the TYPE is "ctrl" +* (control), "bulk", "int" (interrupt), or "iso" (isochronous). +* For example usb_sndbulkpipe() or usb_rcvintpipe(). Endpoint +* numbers range from zero to fifteen. Note that "in" endpoint two +* is a different endpoint (and pipe) from "out" endpoint two. +* The current configuration controls the existence, type, and +* maximum packet size of any given endpoint. +* @stream_id: the endpoint's stream ID for bulk streams +* @dev: Identifies the USB device to perform the request. +* @status: This is read in non-iso completion functions to get the +* status of the particular request. ISO requests only use it +* to tell whether the URB was unlinked; detailed status for +* each frame is in the fields of the iso_frame-desc. +* @transfer_flags: A variety of flags may be used to affect how URB +* submission, unlinking, or operation are handled. Different +* kinds of URB can use different flags. +* @transfer_buffer: This identifies the buffer to (or from) which the I/O +* request will be performed unless URB_NO_TRANSFER_DMA_MAP is set +* (however, do not leave garbage in transfer_buffer even then). +* This buffer must be suitable for DMA; allocate it with +* kmalloc() or equivalent. For transfers to "in" endpoints, contents +* of this buffer will be modified. This buffer is used for the data +* stage of control transfers. +* @transfer_dma: When transfer_flags includes URB_NO_TRANSFER_DMA_MAP, +* the device driver is saying that it provided this DMA address, +* which the host controller driver should use in preference to the +* transfer_buffer. +* @sg: scatter gather buffer list +* @num_mapped_sgs: (internal) number of mapped sg entries +* @num_sgs: number of entries in the sg list +* @transfer_buffer_length: How big is transfer_buffer. The transfer may +* be broken up into chunks according to the current maximum packet +* size for the endpoint, which is a function of the configuration +* and is encoded in the pipe. When the length is zero, neither +* transfer_buffer nor transfer_dma is used. +* @actual_length: This is read in non-iso completion functions, and +* it tells how many bytes (out of transfer_buffer_length) were +* transferred. It will normally be the same as requested, unless +* either an error was reported or a short read was performed. +* The URB_SHORT_NOT_OK transfer flag may be used to make such +* short reads be reported as errors. +* @setup_packet: Only used for control transfers, this points to eight bytes +* of setup data. Control transfers always start by sending this data +* to the device. Then transfer_buffer is read or written, if needed. +* @setup_dma: DMA pointer for the setup packet. The caller must not use +* this field; setup_packet must point to a valid buffer. +* @start_frame: Returns the initial frame for isochronous transfers. +* @number_of_packets: Lists the number of ISO transfer buffers. +* @interval: Specifies the polling interval for interrupt or isochronous +* transfers. The units are frames (milliseconds) for full and low +* speed devices, and microframes (1/8 millisecond) for highspeed +* and SuperSpeed devices. +* @error_count: Returns the number of ISO transfers that reported errors. +* @context: For use in completion functions. This normally points to +* request-specific driver context. +* @complete: Completion handler. This URB is passed as the parameter to the +* completion function. The completion function may then do what +* it likes with the URB, including resubmitting or freeing it. +* @iso_frame_desc: Used to provide arrays of ISO transfer buffers and to +* collect the transfer status for each buffer. +* +* This structure identifies USB transfer requests. URBs must be allocated by +* calling usb_alloc_urb() and freed with a call to usb_free_urb(). +* Initialization may be done using various usb_fill_*_urb() functions. URBs +* are submitted using usb_submit_urb(), and pending requests may be canceled +* using usb_unlink_urb() or usb_kill_urb(). +* +* Data Transfer Buffers: +* +* Normally drivers provide I/O buffers allocated with kmalloc() or otherwise +* taken from the general page pool. That is provided by transfer_buffer +* (control requests also use setup_packet), and host controller drivers +* perform a dma mapping (and unmapping) for each buffer transferred. Those +* mapping operations can be expensive on some platforms (perhaps using a dma +* bounce buffer or talking to an IOMMU), +* although they're cheap on commodity x86 and ppc hardware. +* +* Alternatively, drivers may pass the URB_NO_TRANSFER_DMA_MAP transfer flag, +* which tells the host controller driver that no such mapping is needed for +* the transfer_buffer since +* the device driver is DMA-aware. For example, a device driver might +* allocate a DMA buffer with usb_alloc_coherent() or call usb_buffer_map(). +* When this transfer flag is provided, host controller drivers will +* attempt to use the dma address found in the transfer_dma +* field rather than determining a dma address themselves. +* +* Note that transfer_buffer must still be set if the controller +* does not support DMA (as indicated by bus.uses_dma) and when talking +* to root hub. If you have to trasfer between highmem zone and the device +* on such controller, create a bounce buffer or bail out with an error. +* If transfer_buffer cannot be set (is in highmem) and the controller is DMA +* capable, assign NULL to it, so that usbmon knows not to use the value. +* The setup_packet must always be set, so it cannot be located in highmem. +* +* Initialization: +* +* All URBs submitted must initialize the dev, pipe, transfer_flags (may be +* zero), and complete fields. All URBs must also initialize +* transfer_buffer and transfer_buffer_length. They may provide the +* URB_SHORT_NOT_OK transfer flag, indicating that short reads are +* to be treated as errors; that flag is invalid for write requests. +* +* Bulk URBs may +* use the URB_ZERO_PACKET transfer flag, indicating that bulk OUT transfers +* should always terminate with a short packet, even if it means adding an +* extra zero length packet. +* +* Control URBs must provide a valid pointer in the setup_packet field. +* Unlike the transfer_buffer, the setup_packet may not be mapped for DMA +* beforehand. +* +* Interrupt URBs must provide an interval, saying how often (in milliseconds +* or, for highspeed devices, 125 microsecond units) +* to poll for transfers. After the URB has been submitted, the interval +* field reflects how the transfer was actually scheduled. +* The polling interval may be more frequent than requested. +* For example, some controllers have a maximum interval of 32 milliseconds, +* while others support intervals of up to 1024 milliseconds. +* Isochronous URBs also have transfer intervals. (Note that for isochronous +* endpoints, as well as high speed interrupt endpoints, the encoding of +* the transfer interval in the endpoint descriptor is logarithmic. +* Device drivers must convert that value to linear units themselves.) +* +* If an isochronous endpoint queue isn't already running, the host +* controller will schedule a new URB to start as soon as bandwidth +* utilization allows. If the queue is running then a new URB will be +* scheduled to start in the first transfer slot following the end of the +* preceding URB, if that slot has not already expired. If the slot has +* expired (which can happen when IRQ delivery is delayed for a long time), +* the scheduling behavior depends on the URB_ISO_ASAP flag. If the flag +* is clear then the URB will be scheduled to start in the expired slot, +* implying that some of its packets will not be transferred; if the flag +* is set then the URB will be scheduled in the first unexpired slot, +* breaking the queue's synchronization. Upon URB completion, the +* start_frame field will be set to the (micro)frame number in which the +* transfer was scheduled. Ranges for frame counter values are HC-specific +* and can go from as low as 256 to as high as 65536 frames. +* +* Isochronous URBs have a different data transfer model, in part because +* the quality of service is only "best effort". Callers provide specially +* allocated URBs, with number_of_packets worth of iso_frame_desc structures +* at the end. Each such packet is an individual ISO transfer. Isochronous +* URBs are normally queued, submitted by drivers to arrange that +* transfers are at least double buffered, and then explicitly resubmitted +* in completion handlers, so +* that data (such as audio or video) streams at as constant a rate as the +* host controller scheduler can support. +* +* Completion Callbacks: +* +* The completion callback is made in_interrupt(), and one of the first +* things that a completion handler should do is check the status field. +* The status field is provided for all URBs. It is used to report +* unlinked URBs, and status for all non-ISO transfers. It should not +* be examined before the URB is returned to the completion handler. +* +* The context field is normally used to link URBs back to the relevant +* driver or request state. +* +* When the completion callback is invoked for non-isochronous URBs, the +* actual_length field tells how many bytes were transferred. This field +* is updated even when the URB terminated with an error or was unlinked. +* +* ISO transfer status is reported in the status and actual_length fields +* of the iso_frame_desc array, and the number of errors is reported in +* error_count. Completion callbacks for ISO transfers will normally +* (re)submit URBs to ensure a constant transfer rate. +* +* Note that even fields marked "public" should not be touched by the driver +* when the urb is owned by the hcd, that is, since the call to +* usb_submit_urb() till the entry into the completion routine. +*/ +struct urb { +/* private: usb core and host controller only fields in the urb */ +struct kref kref;/* reference count of the URB */ +void *hcpriv;/* private data for host controller */ +atomic_t use_count;/* concurrent submissions counter */ +atomic_t reject;/* submissions will fail */ +int unlinked;/* unlink error code */ + +/* public: documented fields in the urb that can be used by drivers */ +struct list_head urb_list;/* list head for use by the urb's +* current owner */ +struct list_head anchor_list;/* the URB may be anchored */ +struct usb_anchor *anchor; +struct usb_device *dev;/* (in) pointer to associated device */ +struct usb_host_endpoint *ep;/* (internal) pointer to endpoint */ +unsigned int pipe;/* (in) pipe information */ +unsigned int stream_id;/* (in) stream ID */ +int status;/* (return) non-ISO status */ +unsigned int transfer_flags;/* (in) URB_SHORT_NOT_OK | ...*/ +void *transfer_buffer;/* (in) associated data buffer */ +dma_addr_t transfer_dma;/* (in) dma addr for transfer_buffer */ +struct scatterlist *sg;/* (in) scatter gather buffer list */ +int num_mapped_sgs;/* (internal) mapped sg entries */ +int num_sgs;/* (in) number of entries in the sg list */ +u32 transfer_buffer_length;/* (in) data buffer length */ +u32 actual_length;/* (return) actual transfer length */ +unsigned char *setup_packet;/* (in) setup packet (control only) */ +dma_addr_t setup_dma;/* (in) dma addr for setup_packet */ +int start_frame;/* (modify) start frame (ISO) */ +int number_of_packets;/* (in) number of ISO packets */ +int interval;/* (modify) transfer interval +* (INT/ISO) */ +int error_count;/* (return) number of ISO errors */ +void *context;/* (in) context for completion */ +usb_complete_t complete;/* (in) completion routine */ +struct usb_iso_packet_descriptor iso_frame_desc[0 ]; +/* (in) ISO ONLY */ +}; + +/* ----------------------------------------------------------------------- */ + +/** +* usb_fill_control_urb - initializes a control urb +* @urb: pointer to the urb to initialize. +* @dev: pointer to the struct usb_device for this urb. +* @pipe: the endpoint pipe +* @setup_packet: pointer to the setup_packet buffer +* @transfer_buffer: pointer to the transfer buffer +* @buffer_length: length of the transfer buffer +* @complete_fn: pointer to the usb_complete_t function +* @context: what to set the urb context to. +* +* Initializes a control urb with the proper information needed to submit +* it to a device. +*/ +static inline void usb_fill_control_urb (struct urb *urb, +struct usb_device *dev, +unsigned int pipe, +unsigned char *setup_packet, +void *transfer_buffer, +int buffer_length, +usb_complete_t complete_fn, +void *context) +{ + urb->dev = dev; + urb->pipe = pipe; + urb->setup_packet = setup_packet; + urb->transfer_buffer = transfer_buffer; + urb->transfer_buffer_length = buffer_length; + urb->complete = complete_fn; + urb->context = context; +} + +/** +* usb_fill_bulk_urb - macro to help initialize a bulk urb +* @urb: pointer to the urb to initialize. +* @dev: pointer to the struct usb_device for this urb. +* @pipe: the endpoint pipe +* @transfer_buffer: pointer to the transfer buffer +* @buffer_length: length of the transfer buffer +* @complete_fn: pointer to the usb_complete_t function +* @context: what to set the urb context to. +* +* Initializes a bulk urb with the proper information needed to submit it +* to a device. +*/ +static inline void usb_fill_bulk_urb (struct urb *urb, +struct usb_device *dev, +unsigned int pipe, +void *transfer_buffer, +int buffer_length, +usb_complete_t complete_fn, +void *context) +{ + urb->dev = dev; + urb->pipe = pipe; + urb->transfer_buffer = transfer_buffer; + urb->transfer_buffer_length = buffer_length; + urb->complete = complete_fn; + urb->context = context; +} + +/** +* usb_fill_int_urb - macro to help initialize a interrupt urb +* @urb: pointer to the urb to initialize. +* @dev: pointer to the struct usb_device for this urb. +* @pipe: the endpoint pipe +* @transfer_buffer: pointer to the transfer buffer +* @buffer_length: length of the transfer buffer +* @complete_fn: pointer to the usb_complete_t function +* @context: what to set the urb context to. +* @interval: what to set the urb interval to, encoded like +* the endpoint descriptor's bInterval value. +* +* Initializes a interrupt urb with the proper information needed to submit +* it to a device. +* +* Note that High Speed and SuperSpeed interrupt endpoints use a logarithmic +* encoding of the endpoint interval, and express polling intervals in +* microframes (eight per millisecond) rather than in frames (one per +* millisecond). +* +* Wireless USB also uses the logarithmic encoding, but specifies it in units of +* 128us instead of 125us. For Wireless USB devices, the interval is passed +* through to the host controller, rather than being translated into microframe +* units. +*/ +static inline void usb_fill_int_urb (struct urb *urb, +struct usb_device *dev, +unsigned int pipe, +void *transfer_buffer, +int buffer_length, +usb_complete_t complete_fn, +void *context, +int interval) +{ + urb->dev = dev; + urb->pipe = pipe; + urb->transfer_buffer = transfer_buffer; + urb->transfer_buffer_length = buffer_length; + urb->complete = complete_fn; + urb->context = context; +if (dev->speed ==USB_SPEED_HIGH || dev->speed ==USB_SPEED_SUPER ) + urb->interval =1 << (interval -1 ); +else + urb->interval = interval; + urb->start_frame =-1 ; +} + +extern void usb_init_urb (struct urb *urb); +extern struct urb *usb_alloc_urb (int iso_packets,gfp_t mem_flags); +extern void usb_free_urb (struct urb *urb); +#define usb_put_urb usb_free_urb +extern struct urb *usb_get_urb (struct urb *urb); +extern int usb_submit_urb (struct urb *urb,gfp_t mem_flags); +extern int usb_unlink_urb (struct urb *urb); +extern void usb_kill_urb (struct urb *urb); +extern void usb_poison_urb (struct urb *urb); +extern void usb_unpoison_urb (struct urb *urb); +extern void usb_block_urb (struct urb *urb); +extern void usb_kill_anchored_urbs (struct usb_anchor *anchor); +extern void usb_poison_anchored_urbs (struct usb_anchor *anchor); +extern void usb_unpoison_anchored_urbs (struct usb_anchor *anchor); +extern void usb_unlink_anchored_urbs (struct usb_anchor *anchor); +extern void usb_anchor_urb (struct urb *urb,struct usb_anchor *anchor); +extern void usb_unanchor_urb (struct urb *urb); +extern int usb_wait_anchor_empty_timeout (struct usb_anchor *anchor, +unsigned int timeout); +extern struct urb *usb_get_from_anchor (struct usb_anchor *anchor); +extern void usb_scuttle_anchored_urbs (struct usb_anchor *anchor); +extern int usb_anchor_empty (struct usb_anchor *anchor); + +#define usb_unblock_urb usb_unpoison_urb + +/** +* usb_urb_dir_in - check if an URB describes an IN transfer +* @urb: URB to be checked +* +* Returns 1 if @urb describes an IN transfer (device-to-host), +* otherwise 0. +*/ +static inline int usb_urb_dir_in (struct urb *urb) +{ +return (urb->transfer_flags &URB_DIR_MASK ) ==URB_DIR_IN ; +} + +/** +* usb_urb_dir_out - check if an URB describes an OUT transfer +* @urb: URB to be checked +* +* Returns 1 if @urb describes an OUT transfer (host-to-device), +* otherwise 0. +*/ +static inline int usb_urb_dir_out (struct urb *urb) +{ +return (urb->transfer_flags &URB_DIR_MASK ) ==URB_DIR_OUT ; +} + +void *usb_alloc_coherent (struct usb_device *dev,size_t size, +gfp_t mem_flags,dma_addr_t *dma); +void usb_free_coherent (struct usb_device *dev,size_t size, +void *addr,dma_addr_t dma); + +#if 0 +struct urb *usb_buffer_map (struct urb *urb); +void usb_buffer_dmasync (struct urb *urb); +void usb_buffer_unmap (struct urb *urb); +#endif + +struct scatterlist ; +int usb_buffer_map_sg (const struct usb_device *dev,int is_in, +struct scatterlist *sg,int nents); +#if 0 +void usb_buffer_dmasync_sg (const struct usb_device *dev,int is_in, +struct scatterlist *sg,int n_hw_ents); +#endif +void usb_buffer_unmap_sg (const struct usb_device *dev,int is_in, +struct scatterlist *sg,int n_hw_ents); + +/*-------------------------------------------------------------------* +* SYNCHRONOUS CALL SUPPORT * +*-------------------------------------------------------------------*/ + +extern int usb_control_msg (struct usb_device *dev,unsigned int pipe, +__u8 request,__u8 requesttype,__u16 value,__u16 index, +void *data,__u16 size,int timeout); +extern int usb_interrupt_msg (struct usb_device *usb_dev,unsigned int pipe, +void *data,int len,int *actual_length,int timeout); +extern int usb_bulk_msg (struct usb_device *usb_dev,unsigned int pipe, +void *data,int len,int *actual_length, +int timeout); + +/* wrappers around usb_control_msg() for the most common standard requests */ +extern int usb_get_descriptor (struct usb_device *dev,unsigned char desctype, +unsigned char descindex,void *buf,int size); +extern int usb_get_status (struct usb_device *dev, +int type,int target,void *data); +extern int usb_string (struct usb_device *dev,int index, +char *buf,size_t size); + +/* wrappers that also update important state inside usbcore */ +extern int usb_clear_halt (struct usb_device *dev,int pipe); +extern int usb_reset_configuration (struct usb_device *dev); +extern int usb_set_interface (struct usb_device *dev,int ifnum,int alternate); +extern void usb_reset_endpoint (struct usb_device *dev,unsigned int epaddr); + +/* this request isn't really synchronous, but it belongs with the others */ +extern int usb_driver_set_configuration (struct usb_device *udev,int config); + +/* +* timeouts, in milliseconds, used for sending/receiving control messages +* they typically complete within a few frames (msec) after they're issued +* USB identifies 5 second timeouts, maybe more in a few cases, and a few +* slow devices (like some MGE Ellipse UPSes) actually push that limit. +*/ +#define USB_CTRL_GET_TIMEOUT 5000 +#define USB_CTRL_SET_TIMEOUT 5000 + + +/** +* struct usb_sg_request - support for scatter/gather I/O +* @status: zero indicates success, else negative errno +* @bytes: counts bytes transferred. +* +* These requests are initialized using usb_sg_init(), and then are used +* as request handles passed to usb_sg_wait() or usb_sg_cancel(). Most +* members of the request object aren't for driver access. +* +* The status and bytecount values are valid only after usb_sg_wait() +* returns. If the status is zero, then the bytecount matches the total +* from the request. +* +* After an error completion, drivers may need to clear a halt condition +* on the endpoint. +*/ +struct usb_sg_request { +int status; +size_t bytes; + +/* private: +* members below are private to usbcore, +* and are not provided for driver access! +*/ +spinlock_t lock; + +struct usb_device *dev; +int pipe; + +int entries; +struct urb **urbs; + +int count; +struct completion complete; +}; + +int usb_sg_init ( +struct usb_sg_request *io, +struct usb_device *dev, +unsigned pipe, +unsigned period, +struct scatterlist *sg, +int nents, +size_t length, +gfp_t mem_flags +); +void usb_sg_cancel (struct usb_sg_request *io); +void usb_sg_wait (struct usb_sg_request *io); + + +/* ----------------------------------------------------------------------- */ + +/* +* For various legacy reasons, Linux has a small cookie that's paired with +* a struct usb_device to identify an endpoint queue. Queue characteristics +* are defined by the endpoint's descriptor. This cookie is called a "pipe", +* an unsigned int encoded as: +* +* - direction: bit 7 (0 = Host-to-Device [Out], +* 1 = Device-to-Host [In] ... +* like endpoint bEndpointAddress) +* - device address: bits 8-14 ... bit positions known to uhci-hcd +* - endpoint: bits 15-18 ... bit positions known to uhci-hcd +* - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, +* 10 = control, 11 = bulk) +* +* Given the device address and endpoint descriptor, pipes are redundant. +*/ + +/* NOTE: these are not the standard USB_ENDPOINT_XFER_* values!! */ +/* (yet ... they're the values used by usbfs) */ +#define PIPE_ISOCHRONOUS 0 +#define PIPE_INTERRUPT 1 +#define PIPE_CONTROL 2 +#define PIPE_BULK 3 + +#define usb_pipein (pipe) ((pipe) & USB_DIR_IN) +#define usb_pipeout (pipe) (!usb_pipein(pipe)) + +#define usb_pipedevice (pipe) (((pipe) >> 8) & 0x7f) +#define usb_pipeendpoint (pipe) (((pipe) >> 15) & 0xf) + +#define usb_pipetype (pipe) (((pipe) >> 30) & 3) +#define usb_pipeisoc (pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) +#define usb_pipeint (pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) +#define usb_pipecontrol (pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) +#define usb_pipebulk (pipe) (usb_pipetype((pipe)) == PIPE_BULK) + +static inline unsigned int __create_pipe (struct usb_device *dev, +unsigned int endpoint) +{ +return (dev->devnum <<8 ) | (endpoint <<15 ); +} + +/* Create various pipes... */ +#define usb_sndctrlpipe (dev, endpoint) \ + ((PIPE_CONTROL << 30) | __create_pipe(dev, endpoint)) +#define usb_rcvctrlpipe (dev, endpoint) \ + ((PIPE_CONTROL << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) +#define usb_sndisocpipe (dev, endpoint) \ + ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev, endpoint)) +#define usb_rcvisocpipe (dev, endpoint) \ + ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) +#define usb_sndbulkpipe (dev, endpoint) \ + ((PIPE_BULK << 30) | __create_pipe(dev, endpoint)) +#define usb_rcvbulkpipe (dev, endpoint) \ + ((PIPE_BULK << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) +#define usb_sndintpipe (dev, endpoint) \ + ((PIPE_INTERRUPT << 30) | __create_pipe(dev, endpoint)) +#define usb_rcvintpipe (dev, endpoint) \ + ((PIPE_INTERRUPT << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) + +static inline struct usb_host_endpoint * +usb_pipe_endpoint (struct usb_device *dev,unsigned int pipe) +{ +struct usb_host_endpoint **eps; + eps =usb_pipein (pipe) ? dev->ep_in : dev->ep_out; +return eps[usb_pipeendpoint (pipe)]; +} + +/*-------------------------------------------------------------------------*/ + +static inline __u16 +usb_maxpacket (struct usb_device *udev,int pipe,int is_out) +{ +struct usb_host_endpoint *ep; +unsigned epnum =usb_pipeendpoint (pipe); + +if (is_out) { +WARN_ON (usb_pipein (pipe)); + ep = udev->ep_out[epnum]; + }else { +WARN_ON (usb_pipeout (pipe)); + ep = udev->ep_in[epnum]; + } +if (!ep) +return 0 ; + +/* NOTE: only 0x07ff bits are for packet size... */ +return usb_endpoint_maxp (&ep->desc); +} + +/* ----------------------------------------------------------------------- */ + +/* translate USB error codes to codes user space understands */ +static inline int usb_translate_errors (int error_code) +{ +switch (error_code) { +case 0 : +case -ENOMEM : +case -ENODEV : +case -EOPNOTSUPP : +return error_code; +default : +return -EIO ; + } +} + +/* Events from the usb core */ +#define USB_DEVICE_ADD 0x0001 +#define USB_DEVICE_REMOVE 0x0002 +#define USB_BUS_ADD 0x0003 +#define USB_BUS_REMOVE 0x0004 +extern void usb_register_notify (struct notifier_block *nb); +extern void usb_unregister_notify (struct notifier_block *nb); + +/* debugfs stuff */ +extern struct dentry *usb_debug_root; + +#endif /* __KERNEL__ */ + +#endif
Signature · 1 line
1.7.9.5
RFC PATCH v2 2/4 USB: Adapt the usb-compat.h to uboot and fix compiler errors
In reply to Dan MurphyAdapt the usb-compat.h to uBoot.
Use #ifndef __UBOOT__ for code that is not applicable to uBoot. Use #ifdef __UBOOT__ to add code that is uBoot specific.
Create linux-compat.h - Linux kernel compatibility definitions that do not exist in the uBoot. Moved the compatibility definitions from lin_gadget_compat.h to this file as well.
Create usb-mod-devicetable.h - Is a partial back port of mod_devicetable.h in the linux kernel only taking the portion needed for USB
Already existing header files were modified to pick up the new header files.
Currently musb will not compile.
Signed-off-by Dan Murphy <[email protected]>
--- drivers/usb/musb-new/musb_host.h | 1 + drivers/usb/musb-new/usb-compat.h | 30 ---- include/linux/usb/gadget.h | 184 +++++++++++++++++++----- include/linux/usb/linux-compat.h | 234 +++++++++++++++++++++++++++++++ include/linux/usb/usb-compat.h | 186 +++++++++++++++++++++--- include/linux/usb/usb-mod-devicetable.h | 131 +++++++++++++++++ include/usb.h | 119 +--------------- include/usb/lin_gadget_compat.h | 29 +--- 8 files changed, 685 insertions(+), 229 deletions(-) create mode 100644 include/linux/usb/linux-compat.h create mode 100644 include/linux/usb/usb-mod-devicetable.h
drivers/usb/musb-new/musb_host.h +1 -0
@@ -35,6 +35,7 @@#ifndef _MUSB_HOST_H#define _MUSB_HOST_H#ifdef __UBOOT__ +#include <linux/usb/usb-compat.h> #include "usb-compat.h" #endif
drivers/usb/musb-new/usb-compat.h +0 -30
@@ -6,13 +6,6 @@struct usb_hcd {void *hcd_priv; }; - -struct usb_host_endpoint { -struct usb_endpoint_descriptor desc; -struct list_head urb_list; -void *hcpriv; -}; -/* * urb->transfer_flags: *
@@ -20,29 +13,6 @@ struct usb_host_endpoint {*/ #define URB_SHORT_NOT_OK 0x0001/* report short reads as errors */ #define URB_ZERO_PACKET 0x0040/* Finish bulk OUT with short packet */ - -struct urb ; - -typedef void (*usb_complete_t )(struct urb *); - -struct urb { -void *hcpriv;/* private data for host controller */ -struct list_head urb_list;/* list head for use by the urb's -* current owner */ -struct usb_device *dev;/* (in) pointer to associated device */ -struct usb_host_endpoint *ep;/* (internal) pointer to endpoint */ -unsigned int pipe;/* (in) pipe information */ -int status;/* (return) non-ISO status */ -unsigned int transfer_flags;/* (in) URB_SHORT_NOT_OK | ...*/ -void *transfer_buffer;/* (in) associated data buffer */ -dma_addr_t transfer_dma;/* (in) dma addr for transfer_buffer */ -u32 transfer_buffer_length;/* (in) data buffer length */ -u32 actual_length;/* (return) actual transfer length */ -unsigned char *setup_packet;/* (in) setup packet (control only) */ -int start_frame;/* (modify) start frame (ISO) */ -usb_complete_t complete;/* (in) completion routine */ -}; -#define usb_hcd_link_urb_to_ep (hcd, urb) ({ \ int ret = 0; \ list_add_tail(&urb->urb_list, &urb->ep->urb_list); \
include/linux/usb/gadget.h +148 -36
260 lines not on this page · raw message
include/linux/usb/linux-compat.h new file +234 -0
234 lines not on this page · raw message
include/linux/usb/usb-compat.h +168 -18
387 lines not on this page · raw message
include/linux/usb/usb-mod-devicetable.h new file +131 -0
131 lines not on this page · raw message
include/usb.h +2 -117
163 lines not on this page · raw message
include/usb/lin_gadget_compat.h +1 -28
@@ -24,34 +24,7 @@#define __LIN_COMPAT_H__#include <linux/compat.h> - -/* common */ -#define spin_lock_init (...) -#define spin_lock (...) -#define spin_lock_irqsave (lock, flags) do { debug("%lu\n", flags); } while (0) -#define spin_unlock (...) -#define spin_unlock_irqrestore (lock, flags) do {flags = 0; } while (0) -#define disable_irq (...) -#define enable_irq (...) - -#define mutex_init (...) -#define mutex_lock (...) -#define mutex_unlock (...) - -#define GFP_KERNEL 0 - -#define IRQ_HANDLED 1 - -#define ENOTSUPP 524/* Operation is not supported */ - -#define BITS_PER_BYTE 8 -#define BITS_TO_LONGS (nr) \ - DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) -#define DECLARE_BITMAP (name, bits) \ - unsigned long name[BITS_TO_LONGS(bits)] - -#define small_const_nbits (nbits) \ - (__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG) +#include <linux/usb/linux-compat.h> static inline void bitmap_zero (unsigned long *dst,int nbits) {
Signature · 1 line
1.7.9.5
RFC PATCH v2 2/4 USB: Adapt the usb-compat.h to uboot and fix compiler errors
Quoted 13 lines · Dan Murphy
Adapt the
usb-compat.hto uBoot.Use #ifndef
__UBOOT__for code that is not applicable to uBoot. Use #ifdef__UBOOT__to add code that is uBoot specific.Create
linux-compat.h- Linux kernel compatibility definitions that do not exist in the uBoot. Moved the compatibility definitions fromlin_gadget_compat.hto this file as well.Create
usb-mod-devicetable.h- Is a partial back port ofmod_devicetable.hin the linux kernel only taking the portion needed for USBAlready existing header files were modified to pick up the new header files.
[snip]
Quoted 1 line
+++
b/include/linux/usb/linux-compat.h
[snip]
Quoted 1 line
+#define
DIV_ROUND_UP(n, d)(((n) + (d) - 1) / (d))
This is already in <common.h>
Quoted 4 lines
include/linux/usb/usb-compat.h +0
-0
[snip]
Quoted 4 lines
include/linux/usb/usb-compat.h +0
-0@@ -1770,10 +1903,16 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out)unsigned epnum =usb_pipeendpoint (pipe);if (is_out) {
include/linux/usb/usb-compat.h usb_maxpacket(struct usb_device *udev, int pipe, int is_out) · line 1915
Quoted 10 lines
include/linux/usb/usb-compat.h +6
-0+#ifndef __UBOOT__ +/* Fix this warning */ WARN_ON (usb_pipein (pipe)); +#endif ep = udev->ep_out[epnum]; }else { +#ifndef __UBOOT__ +/* Fix this warning */ WARN_ON (usb_pipeout (pipe)); +#endif
Are these warnings that aren't applicable to us, or things that need to be fixed as part of the series, eventually?
But, in general, as this is the approach I suggested, I'm fine with it.
Signature · 8 lines
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RFC PATCH v2 2/4 USB: Adapt the usb-compat.h to uboot and fix compiler errors
In reply to Dan MurphyDear Dan Murphy,
Quoted 18 lines
Adapt the
usb-compat.hto uBoot.Use #ifndef
__UBOOT__for code that is not applicable to uBoot. Use #ifdef__UBOOT__to add code that is uBoot specific.Create
linux-compat.h- Linux kernel compatibility definitions that do not exist in the uBoot. Moved the compatibility definitions fromlin_gadget_compat.hto this file as well.Create
usb-mod-devicetable.h- Is a partial back port ofmod_devicetable.hin the linux kernel only taking the portion needed for USBAlready existing header files were modified to pick up the new header files.
Currently musb will not compile.
Signed-off-by Dan Murphy <[email protected]>
Quoted 13 lines
--- drivers/usb/musb-new/musb_host.h | 1 + drivers/usb/musb-new/usb-compat.h | 30 ---- include/linux/usb/gadget.h | 184 +++++++++++++++++++----- include/linux/usb/linux-compat.h | 234 +++++++++++++++++++++++++++++++ include/linux/usb/usb-compat.h | 186 +++++++++++++++++++++--- include/linux/usb/usb-mod-devicetable.h | 131 +++++++++++++++++ include/usb.h | 119 +--------------- include/usb/lin_gadget_compat.h | 29 +--- 8 files changed, 685 insertions(+), 229 deletions(-) create mode 100644 include/linux/usb/linux-compat.h create mode 100644 include/linux/usb/usb-mod-devicetable.h
Did you actually compile-test this so it doesn't break any USB gadgets?
Best regards,
Marek Vasut
RFC PATCH v2 3/4 USB: dwc3: Initial back port of dwc3 code
In reply to Dan MurphyThis is the initial back port of the linux kernel
usb dwc3 code based on commit
commit 3b9561e9d9b88eca9d4ed6aab025dec2eeeed501
All code not applicable to uBoot is ifdef'd out with
ifndef __UBOOT__ as it is done in the musb-new directory.
This code has not been fully debuged or excersized.
Signed-off-by Dan Murphy <[email protected]>
--- Makefile | 1 + drivers/usb/dwc3/Makefile | 53 + drivers/usb/dwc3/core.c | 847 +++++++++++++ drivers/usb/dwc3/core.h | 974 ++++++++++++++ drivers/usb/dwc3/dwc3-omap.c | 505 ++++++++ drivers/usb/dwc3/dwc3-omap.h | 41 + drivers/usb/dwc3/dwc3-uboot.c | 384 ++++++ drivers/usb/dwc3/ep0.c | 1085 ++++++++++++++++ drivers/usb/dwc3/gadget.c | 2806 +++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/gadget.h | 196 +++ drivers/usb/dwc3/host.c | 107 ++ drivers/usb/dwc3/io.h | 81 ++ 12 files changed, 7080 insertions(+) create mode 100644 drivers/usb/dwc3/Makefile create mode 100644 drivers/usb/dwc3/core.c create mode 100644 drivers/usb/dwc3/core.h create mode 100644 drivers/usb/dwc3/dwc3-omap.c create mode 100644 drivers/usb/dwc3/dwc3-omap.h create mode 100644 drivers/usb/dwc3/dwc3-uboot.c create mode 100644 drivers/usb/dwc3/ep0.c create mode 100644 drivers/usb/dwc3/gadget.c create mode 100644 drivers/usb/dwc3/gadget.h create mode 100644 drivers/usb/dwc3/host.c create mode 100644 drivers/usb/dwc3/io.h
Makefile +1 -0
@@ -327,6 +327,7 @@ LIBS-y += drivers/usb/gadget/libusb_gadget.o LIBS-y += drivers/usb/host/libusb_host.o LIBS-y += drivers/usb/musb/libusb_musb.o LIBS-y += drivers/usb/musb-new/libusb_musb-new.o +LIBS-y += drivers/usb/dwc3/libusb_dwc3.o LIBS-y += drivers/usb/phy/libusb_phy.o LIBS-y += drivers/usb/ulpi/libusb_ulpi.o LIBS-y += drivers/video/libvideo.o
drivers/usb/dwc3/Makefile new file +53 -0
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drivers/usb/dwc3/core.c new file +847 -0
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drivers/usb/dwc3/core.h new file +974 -0
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drivers/usb/dwc3/dwc3-omap.c new file +505 -0
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drivers/usb/dwc3/dwc3-omap.h new file +41 -0
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drivers/usb/dwc3/dwc3-uboot.c new file +384 -0
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drivers/usb/dwc3/ep0.c new file +1085 -0
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drivers/usb/dwc3/gadget.c new file +2806 -0
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drivers/usb/dwc3/gadget.h new file +196 -0
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drivers/usb/dwc3/host.c new file +107 -0
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drivers/usb/dwc3/io.h new file +81 -0
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Signature · 1 line
1.7.9.5
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RFC PATCH v2 3/4 USB: dwc3: Initial back port of dwc3 code
+Felipe
He the right person to comment on this.
cheers,
-roger
Quoted 7,196 lines · Dan Murphy
This is the initial back port of the linux kernel
usb dwc3 code based on commitcommit
3b9561e9d9b88eca9d4ed6aab025dec2eeeed501All code not applicable to uBoot is ifdef'd out with
ifndef
__UBOOT__as it is done in the musb-new directory.This code has not been fully debuged or excersized.
Signed-off-by Dan Murphy <[email protected]>--- Makefile | 1 + drivers/usb/dwc3/Makefile | 53 + drivers/usb/dwc3/core.c | 847 +++++++++++++ drivers/usb/dwc3/core.h | 974 ++++++++++++++ drivers/usb/dwc3/dwc3-omap.c | 505 ++++++++ drivers/usb/dwc3/dwc3-omap.h | 41 + drivers/usb/dwc3/dwc3-uboot.c | 384 ++++++ drivers/usb/dwc3/ep0.c | 1085 ++++++++++++++++ drivers/usb/dwc3/gadget.c | 2806 +++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/gadget.h | 196 +++ drivers/usb/dwc3/host.c | 107 ++ drivers/usb/dwc3/io.h | 81 ++ 12 files changed, 7080 insertions(+) create mode 100644 drivers/usb/dwc3/Makefile create mode 100644 drivers/usb/dwc3/core.c create mode 100644 drivers/usb/dwc3/core.h create mode 100644 drivers/usb/dwc3/dwc3-omap.c create mode 100644 drivers/usb/dwc3/dwc3-omap.h create mode 100644 drivers/usb/dwc3/dwc3-uboot.c create mode 100644 drivers/usb/dwc3/ep0.c create mode 100644 drivers/usb/dwc3/gadget.c create mode 100644 drivers/usb/dwc3/gadget.h create mode 100644 drivers/usb/dwc3/host.c create mode 100644 drivers/usb/dwc3/io.hMakefile +1
-0@@ -327,6 +327,7 @@ LIBS-y += drivers/usb/gadget/libusb_gadget.o LIBS-y += drivers/usb/host/libusb_host.o LIBS-y += drivers/usb/musb/libusb_musb.o LIBS-y += drivers/usb/musb-new/libusb_musb-new.o +LIBS-y += drivers/usb/dwc3/libusb_dwc3.o LIBS-y += drivers/usb/phy/libusb_phy.o LIBS-y += drivers/usb/ulpi/libusb_ulpi.o LIBS-y += drivers/video/libvideo.odrivers/usb/dwc3/Makefile new file +53
-0@@ -0,0 +1,53 @@ +# +# (C) Copyright 2013 +# Texas Instruments Incorporated. +# +# Author: Dan Murphy <[email protected]> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libusb_dwc3.o + +COBJS-$(CONFIG_USB_DWC3) += core.o dwc3-uboot.o +COBJS-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o +COBJS-$(CONFIG_USB_DWC3_HOST) += host.o +COBJS-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o + +CFLAGS_NO_WARN := $(call cc-option,-Wno-unused-variable) \ + $(call cc-option,-Wno-unused-label) +CFLAGS += $(CFLAGS_NO_WARN) + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### +drivers/usb/dwc3/core.c new file +847
-0@@ -0,0 +1,847 @@ +/** + * core.c - DesignWare USB3 DRD Controller Core file + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com + * + * Authors: Felipe Balbi <[email protected]>, + * Sebastian Andrzej Siewior <[email protected]> + * + * Back-ported by: Dan Murphy <[email protected]> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The names of the above-listed copyright holders may not be used + * to endorse or promote products derived from this software without + * specific prior written permission. + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2, as published by the Free + * Software Foundation. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#define __UBOOT__ +#ifndef __UBOOT__ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/spinlock.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/io.h> +#include <linux/list.h> +#include <linux/delay.h> +#include <linux/dma-mapping.h> +#include <linux/of.h> + +#include <linux/usb/otg.h> + +#else +#include <common.h> + +#include <linux/err.h> +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <linux/usb/linux-compat.h> + +#endif + +#include "core.h" +#include "gadget.h" +#include "io.h" + +#ifndef __UBOOT__ +/* TODO: Need to move over the debug files */ +#include "debug.h" +#endif +static char *maximum_speed = "super"; +module_param(maximum_speed, charp, 0); +MODULE_PARM_DESC(maximum_speed, "Maximum supported speed."); + +/* -------------------------------------------------------------------------- */ + +void dwc3_set_mode(struct dwc3 *dwc, u32 mode) +{ + u32 reg; + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); + reg |= DWC3_GCTL_PRTCAPDIR(mode); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + +/** + * dwc3_core_soft_reset - Issues core soft reset and PHY reset + * @dwc: pointer to our context structure + */ +static void dwc3_core_soft_reset(struct dwc3 *dwc) +{ + u32 reg; + + /* Before Resetting PHY, put Core in Reset */ + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg |= DWC3_GCTL_CORESOFTRESET; + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + /* Assert USB3 PHY reset */ + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST; + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + + /* Assert USB2 PHY reset */ + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); +#ifndef __UBOOT__ + /* FIX THIS DM */ + usb_phy_init(dwc->usb2_phy); + usb_phy_init(dwc->usb3_phy); +#endif + mdelay(100); + + /* Clear USB3 PHY reset */ + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST; + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + + /* Clear USB2 PHY reset */ + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + + mdelay(100); + + /* After PHYs are stable we can take Core out of reset state */ + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~DWC3_GCTL_CORESOFTRESET; + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + +/** + * dwc3_free_one_event_buffer - Frees one event buffer + * @dwc: Pointer to our controller context structure + * @evt: Pointer to event buffer to be freed + */ +static void dwc3_free_one_event_buffer(struct dwc3 *dwc, + struct dwc3_event_buffer *evt) +{ + dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma); +} + +/** + * dwc3_alloc_one_event_buffer - Allocates one event buffer structure + * @dwc: Pointer to our controller context structure + * @length: size of the event buffer + * + * Returns a pointer to the allocated event buffer structure on success + * otherwise ERR_PTR(errno). + */ +static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, + unsigned length) +{ + struct dwc3_event_buffer *evt; + +#ifndef __UBOOT__ + evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); +#else + evt = kzalloc(sizeof(*evt), GFP_KERNEL); +#endif + if (!evt) + return ERR_PTR(-ENOMEM); + + evt->dwc = dwc; + evt->length = length; + evt->buf = dma_alloc_coherent(dwc->dev, length, + &evt->dma, GFP_KERNEL); + if (!evt->buf) + return ERR_PTR(-ENOMEM); + + return evt; +} + +/** + * dwc3_free_event_buffers - frees all allocated event buffers + * @dwc: Pointer to our controller context structure + */ +#ifndef __UBOOT__ +static void dwc3_free_event_buffers(struct dwc3 *dwc) +#else +void dwc3_free_event_buffers(struct dwc3 *dwc) +#endif +{ + struct dwc3_event_buffer *evt; + int i; + + for (i = 0; i < dwc->num_event_buffers; i++) { + evt = dwc->ev_buffs[i]; + if (evt) + dwc3_free_one_event_buffer(dwc, evt); + } +} + +/** + * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length + * @dwc: pointer to our controller context structure + * @length: size of event buffer + * + * Returns 0 on success otherwise negative errno. In the error case, dwc + * may contain some buffers allocated but not all which were requested. + */ +#ifndef __UBOOT__ +static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) +#else +int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) +#endif +{ + int num; + int i; + + num = DWC3_NUM_INT(dwc->hwparams.hwparams1); + dwc->num_event_buffers = num; +#ifndef __UBOOT__ + dwc->ev_buffs = devm_kzalloc(dwc->dev, sizeof(*dwc->ev_buffs) * num, + GFP_KERNEL); +#else + dwc->ev_buffs = kzalloc(sizeof(*dwc->ev_buffs) * num, GFP_KERNEL); +#endif + if (!dwc->ev_buffs) { + dev_err(dwc->dev, "can't allocate event buffers array\n"); + return -ENOMEM; + } + + for (i = 0; i < num; i++) { + struct dwc3_event_buffer *evt; + + evt = dwc3_alloc_one_event_buffer(dwc, length); + if (IS_ERR(evt)) { + dev_err(dwc->dev, "can't allocate event buffer\n"); + return PTR_ERR(evt); + } + dwc->ev_buffs[i] = evt; + } + + return 0; +} + +/** + * dwc3_event_buffers_setup - setup our allocated event buffers + * @dwc: pointer to our controller context structure + * + * Returns 0 on success otherwise negative errno. + */ +#ifndef __UBOOT__ +static int dwc3_event_buffers_setup(struct dwc3 *dwc) +#else +int dwc3_event_buffers_setup(struct dwc3 *dwc) +#endif + +{ + struct dwc3_event_buffer *evt; + int n; + + for (n = 0; n < dwc->num_event_buffers; n++) { + evt = dwc->ev_buffs[n]; + dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n", + evt->buf, (unsigned long long) evt->dma, + evt->length); + + evt->lpos = 0; + + dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), + lower_32_bits(evt->dma)); + dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), + upper_32_bits(evt->dma)); + dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), + evt->length & 0xffff); + dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); + } + + return 0; +} +#ifndef __UBOOT__ +static void dwc3_event_buffers_cleanup(struct dwc3 *dwc) +#else +void dwc3_event_buffers_cleanup(struct dwc3 *dwc) +#endif +{ + struct dwc3_event_buffer *evt; + int n; + + for (n = 0; n < dwc->num_event_buffers; n++) { + evt = dwc->ev_buffs[n]; + + evt->lpos = 0; + + dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0); + dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0); + dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0); + dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); + } +} + +static void dwc3_core_num_eps(struct dwc3 *dwc) +{ + struct dwc3_hwparams *parms = &dwc->hwparams; + + dwc->num_in_eps = DWC3_NUM_IN_EPS(parms); + dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps; + + dev_vdbg(dwc->dev, "found %d IN and %d OUT endpoints\n", + dwc->num_in_eps, dwc->num_out_eps); +} +#ifndef __UBOOT__ +static void dwc3_cache_hwparams(struct dwc3 *dwc) +#else +void dwc3_cache_hwparams(struct dwc3 *dwc) +#endif +{ + struct dwc3_hwparams *parms = &dwc->hwparams; + + parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); + parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); + parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); + parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); + parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); + parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); + parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); + parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); + parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); +} + +/** + * dwc3_core_init - Low-level initialization of DWC3 Core + * @dwc: Pointer to our controller context structure + * + * Returns 0 on success otherwise negative errno. + */ +#ifndef __UBOOT__ +static int dwc3_core_init(struct dwc3 *dwc) +#else +int dwc3_core_init(struct dwc3 *dwc) +#endif +{ + unsigned long timeout; + u32 reg; + int ret; + + reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); + /* This should read as U3 followed by revision number */ + if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) { + dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); + ret = -ENODEV; + goto err0; + } + dwc->revision = reg; + + /* issue device SoftReset too */ +#ifndef __UBOOT__ + timeout = jiffies + msecs_to_jiffies(500); +#else + timeout = 500; +#endif + dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST); + do { + reg = dwc3_readl(dwc->regs, DWC3_DCTL); + if (!(reg & DWC3_DCTL_CSFTRST)) + break; + +#ifndef __UBOOT__ + if (time_after(jiffies, timeout)) { +#else + mdelay(1); + timeout--; + + if (!timeout) { +#endif + dev_err(dwc->dev, "Reset Timed Out\n"); + ret = -ETIMEDOUT; + goto err0; + } + + cpu_relax(); + } while (true); + + dwc3_core_soft_reset(dwc); + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~DWC3_GCTL_SCALEDOWN_MASK; + reg &= ~DWC3_GCTL_DISSCRAMBLE; + + switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { + case DWC3_GHWPARAMS1_EN_PWROPT_CLK: + reg &= ~DWC3_GCTL_DSBLCLKGTNG; + break; + default: + dev_dbg(dwc->dev, "No power optimization available\n"); + } + + /* + * WORKAROUND: DWC3 revisions <1.90a have a bug + * where the device can fail to connect at SuperSpeed + * and falls back to high-speed mode which causes + * the device to enter a Connect/Disconnect loop + */ + if (dwc->revision < DWC3_REVISION_190A) + reg |= DWC3_GCTL_U2RSTECN; + + dwc3_core_num_eps(dwc); + + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + return 0; + +err0: + return ret; +} +#ifndef __UBOOT__ +static void dwc3_core_exit(struct dwc3 *dwc) +#else +void dwc3_core_exit(struct dwc3 *dwc) +#endif +{ +#ifndef __UBOOT__ + /* FIX THIS DM */ + usb_phy_shutdown(dwc->usb2_phy); + usb_phy_shutdown(dwc->usb3_phy); +#endif +} + +#ifndef __UBOOT__ +#define DWC3_ALIGN_MASK (16 - 1) + +static int dwc3_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct resource *res; + struct dwc3 *dwc; + struct device *dev = &pdev->dev; + + int ret = -ENOMEM; + + void __iomem *regs; + void *mem; + + u8 mode; + + mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); + if (!mem) { + dev_err(dev, "not enough memory\n"); + return -ENOMEM; + } + dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1); + dwc->mem = mem; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(dev, "missing IRQ\n"); + return -ENODEV; + } + dwc->xhci_resources[1].start = res->start; + dwc->xhci_resources[1].end = res->end; + dwc->xhci_resources[1].flags = res->flags; + dwc->xhci_resources[1].name = res->name; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(dev, "missing memory resource\n"); + return -ENODEV; + } + dwc->xhci_resources[0].start = res->start; + dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + + DWC3_XHCI_REGS_END; + dwc->xhci_resources[0].flags = res->flags; + dwc->xhci_resources[0].name = res->name; + + /* + * Request memory region but exclude xHCI regs, + * since it will be requested by the xhci-plat driver. + */ + res = devm_request_mem_region(dev, res->start + DWC3_GLOBALS_REGS_START, + resource_size(res) - DWC3_GLOBALS_REGS_START, + dev_name(dev)); + if (!res) { + dev_err(dev, "can't request mem region\n"); + return -ENOMEM; + } + + regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); + if (!regs) { + dev_err(dev, "ioremap failed\n"); + return -ENOMEM; + } + + if (node) { + dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); + dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); + } else { + dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); + dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); + } + + if (IS_ERR(dwc->usb2_phy)) { + ret = PTR_ERR(dwc->usb2_phy); + + /* + * if -ENXIO is returned, it means PHY layer wasn't + * enabled, so it makes no sense to return -EPROBE_DEFER + * in that case, since no PHY driver will ever probe. + */ + if (ret == -ENXIO) + return ret; + + dev_err(dev, "no usb2 phy configured\n"); + return -EPROBE_DEFER; + } + + if (IS_ERR(dwc->usb3_phy)) { + ret = PTR_ERR(dwc->usb2_phy); + + /* + * if -ENXIO is returned, it means PHY layer wasn't + * enabled, so it makes no sense to return -EPROBE_DEFER + * in that case, since no PHY driver will ever probe. + */ + if (ret == -ENXIO) + return ret; + + dev_err(dev, "no usb3 phy configured\n"); + return -EPROBE_DEFER; + } + + usb_phy_set_suspend(dwc->usb2_phy, 0); + usb_phy_set_suspend(dwc->usb3_phy, 0); + + spin_lock_init(&dwc->lock); + platform_set_drvdata(pdev, dwc); + + dwc->regs = regs; + dwc->regs_size = resource_size(res); + dwc->dev = dev; + + dev->dma_mask = dev->parent->dma_mask; + dev->dma_parms = dev->parent->dma_parms; + dma_set_coherent_mask(dev, dev->parent->coherent_dma_mask); + + if (!strncmp("super", maximum_speed, 5)) + dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; + else if (!strncmp("high", maximum_speed, 4)) + dwc->maximum_speed = DWC3_DCFG_HIGHSPEED; + else if (!strncmp("full", maximum_speed, 4)) + dwc->maximum_speed = DWC3_DCFG_FULLSPEED1; + else if (!strncmp("low", maximum_speed, 3)) + dwc->maximum_speed = DWC3_DCFG_LOWSPEED; + else + dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; + + dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize"); + + pm_runtime_enable(dev); + pm_runtime_get_sync(dev); + pm_runtime_forbid(dev); + + dwc3_cache_hwparams(dwc); + + ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); + if (ret) { + dev_err(dwc->dev, "failed to allocate event buffers\n"); + ret = -ENOMEM; + goto err0; + } + + ret = dwc3_core_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize core\n"); + goto err0; + } + + ret = dwc3_event_buffers_setup(dwc); + if (ret) { + dev_err(dwc->dev, "failed to setup event buffers\n"); + goto err1; + } + + if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) + mode = DWC3_MODE_HOST; + else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) + mode = DWC3_MODE_DEVICE; + else + mode = DWC3_MODE_DRD; + + switch (mode) { + case DWC3_MODE_DEVICE: + dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); + ret = dwc3_gadget_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize gadget\n"); + goto err2; + } + break; + case DWC3_MODE_HOST: + dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST); + ret = dwc3_host_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize host\n"); + goto err2; + } + break; + case DWC3_MODE_DRD: + dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); + ret = dwc3_host_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize host\n"); + goto err2; + } + + ret = dwc3_gadget_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize gadget\n"); + goto err2; + } + break; + default: + dev_err(dev, "Unsupported mode of operation %d\n", mode); + goto err2; + } + dwc->mode = mode; + + ret = dwc3_debugfs_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize debugfs\n"); + goto err3; + } + + pm_runtime_allow(dev); + + return 0; + +err3: + switch (mode) { + case DWC3_MODE_DEVICE: + dwc3_gadget_exit(dwc); + break; + case DWC3_MODE_HOST: + dwc3_host_exit(dwc); + break; + case DWC3_MODE_DRD: + dwc3_host_exit(dwc); + dwc3_gadget_exit(dwc); + break; + default: + /* do nothing */ + break; + } + +err2: + dwc3_event_buffers_cleanup(dwc); + +err1: + dwc3_core_exit(dwc); + +err0: + dwc3_free_event_buffers(dwc); + + return ret; +} + +static int dwc3_remove(struct platform_device *pdev) +{ + struct dwc3 *dwc = platform_get_drvdata(pdev); + + usb_phy_set_suspend(dwc->usb2_phy, 1); + usb_phy_set_suspend(dwc->usb3_phy, 1); + + pm_runtime_put(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + dwc3_debugfs_exit(dwc); + + switch (dwc->mode) { + case DWC3_MODE_DEVICE: + dwc3_gadget_exit(dwc); + break; + case DWC3_MODE_HOST: + dwc3_host_exit(dwc); + break; + case DWC3_MODE_DRD: + dwc3_host_exit(dwc); + dwc3_gadget_exit(dwc); + break; + default: + /* do nothing */ + break; + } + + dwc3_event_buffers_cleanup(dwc); + dwc3_free_event_buffers(dwc); + dwc3_core_exit(dwc); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int dwc3_prepare(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + unsigned long flags; + + spin_lock_irqsave(&dwc->lock, flags); + + switch (dwc->mode) { + case DWC3_MODE_DEVICE: + case DWC3_MODE_DRD: + dwc3_gadget_prepare(dwc); + /* FALLTHROUGH */ + case DWC3_MODE_HOST: + default: + dwc3_event_buffers_cleanup(dwc); + break; + } + + spin_unlock_irqrestore(&dwc->lock, flags); + + return 0; +} + +static void dwc3_complete(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + unsigned long flags; + + spin_lock_irqsave(&dwc->lock, flags); + + switch (dwc->mode) { + case DWC3_MODE_DEVICE: + case DWC3_MODE_DRD: + dwc3_gadget_complete(dwc); + /* FALLTHROUGH */ + case DWC3_MODE_HOST: + default: + dwc3_event_buffers_setup(dwc); + break; + } + + spin_unlock_irqrestore(&dwc->lock, flags); +} + +static int dwc3_suspend(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + unsigned long flags; + + spin_lock_irqsave(&dwc->lock, flags); + + switch (dwc->mode) { + case DWC3_MODE_DEVICE: + case DWC3_MODE_DRD: + dwc3_gadget_suspend(dwc); + /* FALLTHROUGH */ + case DWC3_MODE_HOST: + default: + /* do nothing */ + break; + } + + dwc->gctl = dwc3_readl(dwc->regs, DWC3_GCTL); + spin_unlock_irqrestore(&dwc->lock, flags); +#ifndef __UBOOT__ + /* FIX THIS DM */ + usb_phy_shutdown(dwc->usb3_phy); + usb_phy_shutdown(dwc->usb2_phy); +#endif + return 0; +} + +static int dwc3_resume(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + unsigned long flags; +#ifndef __UBOOT__ + /* FIX THIS DM */ + usb_phy_init(dwc->usb3_phy); + usb_phy_init(dwc->usb2_phy); +#endif + msleep(100); + + spin_lock_irqsave(&dwc->lock, flags); + + dwc3_writel(dwc->regs, DWC3_GCTL, dwc->gctl); + + switch (dwc->mode) { + case DWC3_MODE_DEVICE: + case DWC3_MODE_DRD: + dwc3_gadget_resume(dwc); + /* FALLTHROUGH */ + case DWC3_MODE_HOST: + default: + /* do nothing */ + break; + } + + spin_unlock_irqrestore(&dwc->lock, flags); + + pm_runtime_disable(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + return 0; +} + +static const struct dev_pm_ops dwc3_dev_pm_ops = { + .prepare = dwc3_prepare, + .complete = dwc3_complete, + + SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) +}; + +#define DWC3_PM_OPS &(dwc3_dev_pm_ops) +#else +#define DWC3_PM_OPS NULL +#endif + +#ifdef CONFIG_OF +static const struct of_device_id of_dwc3_match[] = { + { + .compatible = "synopsys,dwc3" + }, + { }, +}; +MODULE_DEVICE_TABLE(of, of_dwc3_match); +#endif + +static struct platform_driver dwc3_driver = { + .probe = dwc3_probe, + .remove = dwc3_remove, + .driver = { + .name = "dwc3", + .of_match_table = of_match_ptr(of_dwc3_match), + .pm = DWC3_PM_OPS, + }, +}; + +module_platform_driver(dwc3_driver); + +#endif /* __UBOOT__ */ +MODULE_ALIAS("platform:dwc3"); +MODULE_AUTHOR("Felipe Balbi <[email protected]>"); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");drivers/usb/dwc3/core.h new file +974
-0@@ -0,0 +1,974 @@ +/** +* core.h - DesignWare USB3 DRD Core Header +* +* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com +* +* Authors: Felipe Balbi <[email protected]>, +* Sebastian Andrzej Siewior <[email protected]> +* +* Back-ported by: Dan Murphy <[email protected]> +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions, and the following disclaimer, +* without modification. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. The names of the above-listed copyright holders may not be used +* to endorse or promote products derived from this software without +* specific prior written permission. +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") version 2, as published by the Free +* Software Foundation. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __DRIVERS_USB_DWC3_CORE_H +#define __DRIVERS_USB_DWC3_CORE_H + +#define __UBOOT__ +#ifndef __UBOOT__ +#include <linux/device.h> +#include <linux/spinlock.h> +#include <linux/ioport.h> +#include <linux/list.h> +#include <linux/dma-mapping.h> +#include <linux/mm.h> +#include <linux/debugfs.h> + +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#else + +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <linux/compiler.h> +#include <linux/usb/linux-compat.h> + +#endif + +/* Global constants */ +#define DWC3_EP0_BOUNCE_SIZE 512 +#define DWC3_ENDPOINTS_NUM 32 +#define DWC3_XHCI_RESOURCES_NUM 2 + +#define DWC3_EVENT_SIZE 4/* bytes */ +#define DWC3_EVENT_MAX_NUM 64/* 2 events/endpoint */ +#define DWC3_EVENT_BUFFERS_SIZE (DWC3_EVENT_SIZE * DWC3_EVENT_MAX_NUM) +#define DWC3_EVENT_TYPE_MASK 0xfe + +#define DWC3_EVENT_TYPE_DEV 0 +#define DWC3_EVENT_TYPE_CARKIT 3 +#define DWC3_EVENT_TYPE_I2C 4 + +#define DWC3_DEVICE_EVENT_DISCONNECT 0 +#define DWC3_DEVICE_EVENT_RESET 1 +#define DWC3_DEVICE_EVENT_CONNECT_DONE 2 +#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE 3 +#define DWC3_DEVICE_EVENT_WAKEUP 4 +#define DWC3_DEVICE_EVENT_HIBER_REQ 5 +#define DWC3_DEVICE_EVENT_EOPF 6 +#define DWC3_DEVICE_EVENT_SOF 7 +#define DWC3_DEVICE_EVENT_ERRATIC_ERROR 9 +#define DWC3_DEVICE_EVENT_CMD_CMPL 10 +#define DWC3_DEVICE_EVENT_OVERFLOW 11 + +#define DWC3_GEVNTCOUNT_MASK 0xfffc +#define DWC3_GSNPSID_MASK 0xffff0000 +#define DWC3_GSNPSREV_MASK 0xffff + +/* DWC3 registers memory space boundries */ +#define DWC3_XHCI_REGS_START 0x0 +#define DWC3_XHCI_REGS_END 0x7fff +#define DWC3_GLOBALS_REGS_START 0xc100 +#define DWC3_GLOBALS_REGS_END 0xc6ff +#define DWC3_DEVICE_REGS_START 0xc700 +#define DWC3_DEVICE_REGS_END 0xcbff +#define DWC3_OTG_REGS_START 0xcc00 +#define DWC3_OTG_REGS_END 0xccff + +/* Global Registers */ +#define DWC3_GSBUSCFG0 0xc100 +#define DWC3_GSBUSCFG1 0xc104 +#define DWC3_GTXTHRCFG 0xc108 +#define DWC3_GRXTHRCFG 0xc10c +#define DWC3_GCTL 0xc110 +#define DWC3_GEVTEN 0xc114 +#define DWC3_GSTS 0xc118 +#define DWC3_GSNPSID 0xc120 +#define DWC3_GGPIO 0xc124 +#define DWC3_GUID 0xc128 +#define DWC3_GUCTL 0xc12c +#define DWC3_GBUSERRADDR0 0xc130 +#define DWC3_GBUSERRADDR1 0xc134 +#define DWC3_GPRTBIMAP0 0xc138 +#define DWC3_GPRTBIMAP1 0xc13c +#define DWC3_GHWPARAMS0 0xc140 +#define DWC3_GHWPARAMS1 0xc144 +#define DWC3_GHWPARAMS2 0xc148 +#define DWC3_GHWPARAMS3 0xc14c +#define DWC3_GHWPARAMS4 0xc150 +#define DWC3_GHWPARAMS5 0xc154 +#define DWC3_GHWPARAMS6 0xc158 +#define DWC3_GHWPARAMS7 0xc15c +#define DWC3_GDBGFIFOSPACE 0xc160 +#define DWC3_GDBGLTSSM 0xc164 +#define DWC3_GPRTBIMAP_HS0 0xc180 +#define DWC3_GPRTBIMAP_HS1 0xc184 +#define DWC3_GPRTBIMAP_FS0 0xc188 +#define DWC3_GPRTBIMAP_FS1 0xc18c + +#define DWC3_GUSB2PHYCFG (n) (0xc200 + (n * 0x04)) +#define DWC3_GUSB2I2CCTL (n) (0xc240 + (n * 0x04)) + +#define DWC3_GUSB2PHYACC (n) (0xc280 + (n * 0x04)) + +#define DWC3_GUSB3PIPECTL (n) (0xc2c0 + (n * 0x04)) + +#define DWC3_GTXFIFOSIZ (n) (0xc300 + (n * 0x04)) +#define DWC3_GRXFIFOSIZ (n) (0xc380 + (n * 0x04)) + +#define DWC3_GEVNTADRLO (n) (0xc400 + (n * 0x10)) +#define DWC3_GEVNTADRHI (n) (0xc404 + (n * 0x10)) +#define DWC3_GEVNTSIZ (n) (0xc408 + (n * 0x10)) +#define DWC3_GEVNTCOUNT (n) (0xc40c + (n * 0x10)) + +#define DWC3_GHWPARAMS8 0xc600 + +/* Device Registers */ +#define DWC3_DCFG 0xc700 +#define DWC3_DCTL 0xc704 +#define DWC3_DEVTEN 0xc708 +#define DWC3_DSTS 0xc70c +#define DWC3_DGCMDPAR 0xc710 +#define DWC3_DGCMD 0xc714 +#define DWC3_DALEPENA 0xc720 +#define DWC3_DEPCMDPAR2 (n) (0xc800 + (n * 0x10)) +#define DWC3_DEPCMDPAR1 (n) (0xc804 + (n * 0x10)) +#define DWC3_DEPCMDPAR0 (n) (0xc808 + (n * 0x10)) +#define DWC3_DEPCMD (n) (0xc80c + (n * 0x10)) + +/* OTG Registers */ +#define DWC3_OCFG 0xcc00 +#define DWC3_OCTL 0xcc04 +#define DWC3_OEVT 0xcc08 +#define DWC3_OEVTEN 0xcc0C +#define DWC3_OSTS 0xcc10 + +/* Bit fields */ + +/* Global Configuration Register */ +#define DWC3_GCTL_PWRDNSCALE (n) ((n) << 19) +#define DWC3_GCTL_U2RSTECN (1 << 16) +#define DWC3_GCTL_RAMCLKSEL (x) (((x) & DWC3_GCTL_CLK_MASK) << 6) +#define DWC3_GCTL_CLK_BUS (0) +#define DWC3_GCTL_CLK_PIPE (1) +#define DWC3_GCTL_CLK_PIPEHALF (2) +#define DWC3_GCTL_CLK_MASK (3) + +#define DWC3_GCTL_PRTCAP (n) (((n) & (3 << 12)) >> 12) +#define DWC3_GCTL_PRTCAPDIR (n) ((n) << 12) +#define DWC3_GCTL_PRTCAP_HOST 1 +#define DWC3_GCTL_PRTCAP_DEVICE 2 +#define DWC3_GCTL_PRTCAP_OTG 3 + +#define DWC3_GCTL_CORESOFTRESET (1 << 11) +#define DWC3_GCTL_SCALEDOWN (n) ((n) << 4) +#define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3) +#define DWC3_GCTL_DISSCRAMBLE (1 << 3) +#define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1) +#define DWC3_GCTL_DSBLCLKGTNG (1 << 0) + +/* Global USB2 PHY Configuration Register */ +#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) + +/* Global USB3 PIPE Control Register */ +#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) +#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17) + +/* Global TX Fifo Size Register */ +#define DWC3_GTXFIFOSIZ_TXFDEF (n) ((n) & 0xffff) +#define DWC3_GTXFIFOSIZ_TXFSTADDR (n) ((n) & 0xffff0000) + +/* Global HWPARAMS1 Register */ +#define DWC3_GHWPARAMS1_EN_PWROPT (n) (((n) & (3 << 24)) >> 24) +#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0 +#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1 +#define DWC3_GHWPARAMS1_EN_PWROPT_HIB 2 +#define DWC3_GHWPARAMS1_PWROPT (n) ((n) << 24) +#define DWC3_GHWPARAMS1_PWROPT_MASK DWC3_GHWPARAMS1_PWROPT(3) + +/* Global HWPARAMS4 Register */ +#define DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS (n) (((n) & (0x0f << 13)) >> 13) +#define DWC3_MAX_HIBER_SCRATCHBUFS 15 + +/* Device Configuration Register */ +#define DWC3_DCFG_LPM_CAP (1 << 22) +#define DWC3_DCFG_DEVADDR (addr) ((addr) << 3) +#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) + +#define DWC3_DCFG_SPEED_MASK (7 << 0) +#define DWC3_DCFG_SUPERSPEED (4 << 0) +#define DWC3_DCFG_HIGHSPEED (0 << 0) +#define DWC3_DCFG_FULLSPEED2 (1 << 0) +#define DWC3_DCFG_LOWSPEED (2 << 0) +#define DWC3_DCFG_FULLSPEED1 (3 << 0) + +#define DWC3_DCFG_LPM_CAP (1 << 22) + +/* Device Control Register */ +#define DWC3_DCTL_RUN_STOP (1 << 31) +#define DWC3_DCTL_CSFTRST (1 << 30) +#define DWC3_DCTL_LSFTRST (1 << 29) + +#define DWC3_DCTL_HIRD_THRES_MASK (0x1f << 24) +#define DWC3_DCTL_HIRD_THRES (n) ((n) << 24) + +#define DWC3_DCTL_APPL1RES (1 << 23) + +/* These apply for core versions 1.87a and earlier */ +#define DWC3_DCTL_TRGTULST_MASK (0x0f << 17) +#define DWC3_DCTL_TRGTULST (n) ((n) << 17) +#define DWC3_DCTL_TRGTULST_U2 (DWC3_DCTL_TRGTULST(2)) +#define DWC3_DCTL_TRGTULST_U3 (DWC3_DCTL_TRGTULST(3)) +#define DWC3_DCTL_TRGTULST_SS_DIS (DWC3_DCTL_TRGTULST(4)) +#define DWC3_DCTL_TRGTULST_RX_DET (DWC3_DCTL_TRGTULST(5)) +#define DWC3_DCTL_TRGTULST_SS_INACT (DWC3_DCTL_TRGTULST(6)) + +/* These apply for core versions 1.94a and later */ +#define DWC3_DCTL_KEEP_CONNECT (1 << 19) +#define DWC3_DCTL_L1_HIBER_EN (1 << 18) +#define DWC3_DCTL_CRS (1 << 17) +#define DWC3_DCTL_CSS (1 << 16) + +#define DWC3_DCTL_INITU2ENA (1 << 12) +#define DWC3_DCTL_ACCEPTU2ENA (1 << 11) +#define DWC3_DCTL_INITU1ENA (1 << 10) +#define DWC3_DCTL_ACCEPTU1ENA (1 << 9) +#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1) + +#define DWC3_DCTL_ULSTCHNGREQ_MASK (0x0f << 5) +#define DWC3_DCTL_ULSTCHNGREQ (n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK) + +#define DWC3_DCTL_ULSTCHNG_NO_ACTION (DWC3_DCTL_ULSTCHNGREQ(0)) +#define DWC3_DCTL_ULSTCHNG_SS_DISABLED (DWC3_DCTL_ULSTCHNGREQ(4)) +#define DWC3_DCTL_ULSTCHNG_RX_DETECT (DWC3_DCTL_ULSTCHNGREQ(5)) +#define DWC3_DCTL_ULSTCHNG_SS_INACTIVE (DWC3_DCTL_ULSTCHNGREQ(6)) +#define DWC3_DCTL_ULSTCHNG_RECOVERY (DWC3_DCTL_ULSTCHNGREQ(8)) +#define DWC3_DCTL_ULSTCHNG_COMPLIANCE (DWC3_DCTL_ULSTCHNGREQ(10)) +#define DWC3_DCTL_ULSTCHNG_LOOPBACK (DWC3_DCTL_ULSTCHNGREQ(11)) + +/* Device Event Enable Register */ +#define DWC3_DEVTEN_VNDRDEVTSTRCVEDEN (1 << 12) +#define DWC3_DEVTEN_EVNTOVERFLOWEN (1 << 11) +#define DWC3_DEVTEN_CMDCMPLTEN (1 << 10) +#define DWC3_DEVTEN_ERRTICERREN (1 << 9) +#define DWC3_DEVTEN_SOFEN (1 << 7) +#define DWC3_DEVTEN_EOPFEN (1 << 6) +#define DWC3_DEVTEN_HIBERNATIONREQEVTEN (1 << 5) +#define DWC3_DEVTEN_WKUPEVTEN (1 << 4) +#define DWC3_DEVTEN_ULSTCNGEN (1 << 3) +#define DWC3_DEVTEN_CONNECTDONEEN (1 << 2) +#define DWC3_DEVTEN_USBRSTEN (1 << 1) +#define DWC3_DEVTEN_DISCONNEVTEN (1 << 0) + +/* Device Status Register */ +#define DWC3_DSTS_DCNRD (1 << 29) + +/* This applies for core versions 1.87a and earlier */ +#define DWC3_DSTS_PWRUPREQ (1 << 24) + +/* These apply for core versions 1.94a and later */ +#define DWC3_DSTS_RSS (1 << 25) +#define DWC3_DSTS_SSS (1 << 24) + +#define DWC3_DSTS_COREIDLE (1 << 23) +#define DWC3_DSTS_DEVCTRLHLT (1 << 22) + +#define DWC3_DSTS_USBLNKST_MASK (0x0f << 18) +#define DWC3_DSTS_USBLNKST (n) (((n) & DWC3_DSTS_USBLNKST_MASK) >> 18) + +#define DWC3_DSTS_RXFIFOEMPTY (1 << 17) + +#define DWC3_DSTS_SOFFN_MASK (0x3fff << 3) +#define DWC3_DSTS_SOFFN (n) (((n) & DWC3_DSTS_SOFFN_MASK) >> 3) + +#define DWC3_DSTS_CONNECTSPD (7 << 0) + +#define DWC3_DSTS_SUPERSPEED (4 << 0) +#define DWC3_DSTS_HIGHSPEED (0 << 0) +#define DWC3_DSTS_FULLSPEED2 (1 << 0) +#define DWC3_DSTS_LOWSPEED (2 << 0) +#define DWC3_DSTS_FULLSPEED1 (3 << 0) + +/* Device Generic Command Register */ +#define DWC3_DGCMD_SET_LMP 0x01 +#define DWC3_DGCMD_SET_PERIODIC_PAR 0x02 +#define DWC3_DGCMD_XMIT_FUNCTION 0x03 + +/* These apply for core versions 1.94a and later */ +#define DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO 0x04 +#define DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI 0x05 + +#define DWC3_DGCMD_SELECTED_FIFO_FLUSH 0x09 +#define DWC3_DGCMD_ALL_FIFO_FLUSH 0x0a +#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c +#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10 + +#define DWC3_DGCMD_STATUS (n) (((n) >> 15) & 1) +#define DWC3_DGCMD_CMDACT (1 << 10) +#define DWC3_DGCMD_CMDIOC (1 << 8) + +/* Device Generic Command Parameter Register */ +#define DWC3_DGCMDPAR_FORCE_LINKPM_ACCEPT (1 << 0) +#define DWC3_DGCMDPAR_FIFO_NUM (n) ((n) << 0) +#define DWC3_DGCMDPAR_RX_FIFO (0 << 5) +#define DWC3_DGCMDPAR_TX_FIFO (1 << 5) +#define DWC3_DGCMDPAR_LOOPBACK_DIS (0 << 0) +#define DWC3_DGCMDPAR_LOOPBACK_ENA (1 << 0) + +/* Device Endpoint Command Register */ +#define DWC3_DEPCMD_PARAM_SHIFT 16 +#define DWC3_DEPCMD_PARAM (x) ((x) << DWC3_DEPCMD_PARAM_SHIFT) +#define DWC3_DEPCMD_GET_RSC_IDX (x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f) +#define DWC3_DEPCMD_STATUS (x) (((x) >> 15) & 1) +#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11) +#define DWC3_DEPCMD_CMDACT (1 << 10) +#define DWC3_DEPCMD_CMDIOC (1 << 8) + +#define DWC3_DEPCMD_DEPSTARTCFG (0x09 << 0) +#define DWC3_DEPCMD_ENDTRANSFER (0x08 << 0) +#define DWC3_DEPCMD_UPDATETRANSFER (0x07 << 0) +#define DWC3_DEPCMD_STARTTRANSFER (0x06 << 0) +#define DWC3_DEPCMD_CLEARSTALL (0x05 << 0) +#define DWC3_DEPCMD_SETSTALL (0x04 << 0) +/* This applies for core versions 1.90a and earlier */ +#define DWC3_DEPCMD_GETSEQNUMBER (0x03 << 0) +/* This applies for core versions 1.94a and later */ +#define DWC3_DEPCMD_GETEPSTATE (0x03 << 0) +#define DWC3_DEPCMD_SETTRANSFRESOURCE (0x02 << 0) +#define DWC3_DEPCMD_SETEPCONFIG (0x01 << 0) + +/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */ +#define DWC3_DALEPENA_EP (n) (1 << n) + +#define DWC3_DEPCMD_TYPE_CONTROL 0 +#define DWC3_DEPCMD_TYPE_ISOC 1 +#define DWC3_DEPCMD_TYPE_BULK 2 +#define DWC3_DEPCMD_TYPE_INTR 3 + +/* Structures */ + +struct dwc3_trb ; + +/** +* struct dwc3_event_buffer - Software event buffer representation +* @list: a list of event buffers +* @buf: _THE_ buffer +* @length: size of this buffer +* @lpos: event offset +* @count: cache of last read event count register +* @flags: flags related to this event buffer +* @dma: dma_addr_t +* @dwc: pointer to DWC controller +*/ +struct dwc3_event_buffer { +void *buf; +unsigned length; +unsigned int lpos; +unsigned int count; +unsigned int flags; + +#define DWC3_EVENT_PENDING BIT(0) + +dma_addr_t dma; + +struct dwc3 *dwc; +}; + +#define DWC3_EP_FLAG_STALLED (1 << 0) +#define DWC3_EP_FLAG_WEDGED (1 << 1) + +#define DWC3_EP_DIRECTION_TX true +#define DWC3_EP_DIRECTION_RX false + +#define DWC3_TRB_NUM 32 +#define DWC3_TRB_MASK (DWC3_TRB_NUM - 1) + +/** +* struct dwc3_ep - device side endpoint representation +* @endpoint: usb endpoint +* @request_list: list of requests for this endpoint +* @req_queued: list of requests on this ep which have TRBs setup +* @trb_pool: array of transaction buffers +* @trb_pool_dma: dma address of @trb_pool +* @free_slot: next slot which is going to be used +* @busy_slot: first slot which is owned by HW +* @desc: usb_endpoint_descriptor pointer +* @dwc: pointer to DWC controller +* @flags: endpoint flags (wedged, stalled, ...) +* @current_trb: index of current used trb +* @number: endpoint number (1 - 15) +* @type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK +* @resource_index: Resource transfer index +* @interval: the intervall on which the ISOC transfer is started +* @name: a human readable name e.g. ep1out-bulk +* @direction: true for TX, false for RX +* @stream_capable: true when streams are enabled +*/ +struct dwc3_ep { +struct usb_ep endpoint; +struct list_head request_list; +struct list_head req_queued; + +struct dwc3_trb *trb_pool; +dma_addr_t trb_pool_dma; +u32 free_slot; +u32 busy_slot; +const struct usb_ss_ep_comp_descriptor *comp_desc; +struct dwc3 *dwc; + +unsigned flags; +#define DWC3_EP_ENABLED (1 << 0) +#define DWC3_EP_STALL (1 << 1) +#define DWC3_EP_WEDGE (1 << 2) +#define DWC3_EP_BUSY (1 << 4) +#define DWC3_EP_PENDING_REQUEST (1 << 5) +#define DWC3_EP_MISSED_ISOC (1 << 6) + +/* This last one is specific to EP0 */ +#define DWC3_EP0_DIR_IN (1 << 31) + +unsigned current_trb; + +u8 number; +u8 type; +u8 resource_index; +u32 interval; + +char name[20 ]; + +unsigned direction:1 ; +unsigned stream_capable:1 ; +}; + +enum dwc3_phy { +DWC3_PHY_UNKNOWN =0 , +DWC3_PHY_USB3 , +DWC3_PHY_USB2 , +}; + +enum dwc3_ep0_next { +DWC3_EP0_UNKNOWN =0 , +DWC3_EP0_COMPLETE , +DWC3_EP0_NRDY_DATA , +DWC3_EP0_NRDY_STATUS , +}; + +enum dwc3_ep0_state { +EP0_UNCONNECTED =0 , +EP0_SETUP_PHASE , +EP0_DATA_PHASE , +EP0_STATUS_PHASE , +}; + +enum dwc3_link_state { +/* In SuperSpeed */ +DWC3_LINK_STATE_U0 =0x00 ,/* in HS, means ON */ +DWC3_LINK_STATE_U1 =0x01 , +DWC3_LINK_STATE_U2 =0x02 ,/* in HS, means SLEEP */ +DWC3_LINK_STATE_U3 =0x03 ,/* in HS, means SUSPEND */ +DWC3_LINK_STATE_SS_DIS =0x04 , +DWC3_LINK_STATE_RX_DET =0x05 ,/* in HS, means Early Suspend */ +DWC3_LINK_STATE_SS_INACT =0x06 , +DWC3_LINK_STATE_POLL =0x07 , +DWC3_LINK_STATE_RECOV =0x08 , +DWC3_LINK_STATE_HRESET =0x09 , +DWC3_LINK_STATE_CMPLY =0x0a , +DWC3_LINK_STATE_LPBK =0x0b , +DWC3_LINK_STATE_RESET =0x0e , +DWC3_LINK_STATE_RESUME =0x0f , +DWC3_LINK_STATE_MASK =0x0f , +}; + +/* TRB Length, PCM and Status */ +#define DWC3_TRB_SIZE_MASK (0x00ffffff) +#define DWC3_TRB_SIZE_LENGTH (n) ((n) & DWC3_TRB_SIZE_MASK) +#define DWC3_TRB_SIZE_PCM1 (n) (((n) & 0x03) << 24) +#define DWC3_TRB_SIZE_TRBSTS (n) (((n) & (0x0f << 28)) >> 28) + +#define DWC3_TRBSTS_OK 0 +#define DWC3_TRBSTS_MISSED_ISOC 1 +#define DWC3_TRBSTS_SETUP_PENDING 2 +#define DWC3_TRB_STS_XFER_IN_PROG 4 + +/* TRB Control */ +#define DWC3_TRB_CTRL_HWO (1 << 0) +#define DWC3_TRB_CTRL_LST (1 << 1) +#define DWC3_TRB_CTRL_CHN (1 << 2) +#define DWC3_TRB_CTRL_CSP (1 << 3) +#define DWC3_TRB_CTRL_TRBCTL (n) (((n) & 0x3f) << 4) +#define DWC3_TRB_CTRL_ISP_IMI (1 << 10) +#define DWC3_TRB_CTRL_IOC (1 << 11) +#define DWC3_TRB_CTRL_SID_SOFN (n) (((n) & 0xffff) << 14) + +#define DWC3_TRBCTL_NORMAL DWC3_TRB_CTRL_TRBCTL(1) +#define DWC3_TRBCTL_CONTROL_SETUP DWC3_TRB_CTRL_TRBCTL(2) +#define DWC3_TRBCTL_CONTROL_STATUS2 DWC3_TRB_CTRL_TRBCTL(3) +#define DWC3_TRBCTL_CONTROL_STATUS3 DWC3_TRB_CTRL_TRBCTL(4) +#define DWC3_TRBCTL_CONTROL_DATA DWC3_TRB_CTRL_TRBCTL(5) +#define DWC3_TRBCTL_ISOCHRONOUS_FIRST DWC3_TRB_CTRL_TRBCTL(6) +#define DWC3_TRBCTL_ISOCHRONOUS DWC3_TRB_CTRL_TRBCTL(7) +#define DWC3_TRBCTL_LINK_TRB DWC3_TRB_CTRL_TRBCTL(8) + +/** +* struct dwc3_trb - transfer request block (hw format) +* @bpl: DW0-3 +* @bph: DW4-7 +* @size: DW8-B +* @trl: DWC-F +*/ +struct dwc3_trb { +u32 bpl; +u32 bph; +u32 size; +u32 ctrl; +} __packed; + +/** +* dwc3_hwparams - copy of HWPARAMS registers +* @hwparams0 - GHWPARAMS0 +* @hwparams1 - GHWPARAMS1 +* @hwparams2 - GHWPARAMS2 +* @hwparams3 - GHWPARAMS3 +* @hwparams4 - GHWPARAMS4 +* @hwparams5 - GHWPARAMS5 +* @hwparams6 - GHWPARAMS6 +* @hwparams7 - GHWPARAMS7 +* @hwparams8 - GHWPARAMS8 +*/ +struct dwc3_hwparams { +u32 hwparams0; +u32 hwparams1; +u32 hwparams2; +u32 hwparams3; +u32 hwparams4; +u32 hwparams5; +u32 hwparams6; +u32 hwparams7; +u32 hwparams8; +}; + +/* HWPARAMS0 */ +#define DWC3_MODE (n) ((n) & 0x7) + +#define DWC3_MODE_DEVICE 0 +#define DWC3_MODE_HOST 1 +#define DWC3_MODE_DRD 2 +#define DWC3_MODE_HUB 3 + +#define DWC3_MDWIDTH (n) (((n) & 0xff00) >> 8) + +/* HWPARAMS1 */ +#define DWC3_NUM_INT (n) (((n) & (0x3f << 15)) >> 15) + +/* HWPARAMS3 */ +#define DWC3_NUM_IN_EPS_MASK (0x1f << 18) +#define DWC3_NUM_EPS_MASK (0x3f << 12) +#define DWC3_NUM_EPS (p) (((p)->hwparams3 & \ + (DWC3_NUM_EPS_MASK)) >> 12) +#define DWC3_NUM_IN_EPS (p) (((p)->hwparams3 & \ + (DWC3_NUM_IN_EPS_MASK)) >> 18) + +/* HWPARAMS7 */ +#define DWC3_RAM1_DEPTH (n) ((n) & 0xffff) + +struct dwc3_request { +struct usb_request request; +struct list_head list; +struct dwc3_ep *dep; +u32 start_slot; + +u8 epnum; +struct dwc3_trb *trb; +dma_addr_t trb_dma; + +unsigned direction:1 ; +unsigned mapped:1 ; +unsigned queued:1 ; +}; + +/* +* struct dwc3_scratchpad_array - hibernation scratchpad array +* (format defined by hw) +*/ +struct dwc3_scratchpad_array { +__le64 dma_adr[DWC3_MAX_HIBER_SCRATCHBUFS ]; +}; + +/** +* struct dwc3 - representation of our controller +* @ctrl_req: usb control request which is used for ep0 +* @ep0_trb: trb which is used for the ctrl_req +* @ep0_bounce: bounce buffer for ep0 +* @setup_buf: used while precessing STD USB requests +* @ctrl_req_addr: dma address of ctrl_req +* @ep0_trb: dma address of ep0_trb +* @ep0_usb_req: dummy req used while handling STD USB requests +* @ep0_bounce_addr: dma address of ep0_bounce +* @lock: for synchronizing +* @dev: pointer to our struct device +* @xhci: pointer to our xHCI child +* @event_buffer_list: a list of event buffers +* @gadget: device side representation of the peripheral controller +* @gadget_driver: pointer to the gadget driver +* @regs: base address for our registers +* @regs_size: address space size +* @num_event_buffers: calculated number of event buffers +* @u1u2: only used on revisions <1.83a for workaround +* @maximum_speed: maximum speed requested (mainly for testing purposes) +* @revision: revision register contents +* @mode: mode of operation +* @usb2_phy: pointer to USB2 PHY +* @usb3_phy: pointer to USB3 PHY +* @dcfg: saved contents of DCFG register +* @gctl: saved contents of GCTL register +* @is_selfpowered: true when we are selfpowered +* @three_stage_setup: set if we perform a three phase setup +* @ep0_bounced: true when we used bounce buffer +* @ep0_expect_in: true when we expect a DATA IN transfer +* @start_config_issued: true when StartConfig command has been issued +* @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround +* @needs_fifo_resize: not all users might want fifo resizing, flag it +* @resize_fifos: tells us it's ok to reconfigure our TxFIFO sizes. +* @isoch_delay: wValue from Set Isochronous Delay request; +* @u2sel: parameter from Set SEL request. +* @u2pel: parameter from Set SEL request. +* @u1sel: parameter from Set SEL request. +* @u1pel: parameter from Set SEL request. +* @num_out_eps: number of out endpoints +* @num_in_eps: number of in endpoints +* @ep0_next_event: hold the next expected event +* @ep0state: state of endpoint zero +* @link_state: link state +* @speed: device speed (super, high, full, low) +* @mem: points to start of memory which is used for this struct. +* @hwparams: copy of hwparams registers +* @root: debugfs root folder pointer +*/ +struct dwc3 { +struct usb_ctrlrequest *ctrl_req; +struct dwc3_trb *ep0_trb; +void *ep0_bounce; +u8 *setup_buf; +dma_addr_t ctrl_req_addr; +dma_addr_t ep0_trb_addr; +dma_addr_t ep0_bounce_addr; +struct dwc3_request ep0_usb_req; + +/* device lock */ +spinlock_t lock; + +struct device *dev; + +struct platform_device *xhci; +/* struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM]; */ + +struct dwc3_event_buffer **ev_buffs; +struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM ]; + +struct usb_gadget gadget; +struct usb_gadget_driver *gadget_driver; + +struct usb_phy *usb2_phy; +struct usb_phy *usb3_phy; + +void __iomem *regs; +size_t regs_size; + +/* used for suspend/resume */ +u32 dcfg; +u32 gctl; + +u32 num_event_buffers; +u32 u1u2; +u32 maximum_speed; +u32 revision; +u32 mode; + +#define DWC3_REVISION_173A 0x5533173a +#define DWC3_REVISION_175A 0x5533175a +#define DWC3_REVISION_180A 0x5533180a +#define DWC3_REVISION_183A 0x5533183a +#define DWC3_REVISION_185A 0x5533185a +#define DWC3_REVISION_187A 0x5533187a +#define DWC3_REVISION_188A 0x5533188a +#define DWC3_REVISION_190A 0x5533190a +#define DWC3_REVISION_194A 0x5533194a +#define DWC3_REVISION_200A 0x5533200a +#define DWC3_REVISION_202A 0x5533202a +#define DWC3_REVISION_210A 0x5533210a +#define DWC3_REVISION_220A 0x5533220a +#define DWC3_REVISION_230A 0x5533230a +#define DWC3_REVISION_240A 0x5533240a +#define DWC3_REVISION_250A 0x5533250a + +unsigned is_selfpowered:1 ; +unsigned three_stage_setup:1 ; +unsigned ep0_bounced:1 ; +unsigned ep0_expect_in:1 ; +unsigned start_config_issued:1 ; +unsigned setup_packet_pending:1 ; +unsigned delayed_status:1 ; +unsigned needs_fifo_resize:1 ; +unsigned resize_fifos:1 ; +unsigned pullups_connected:1 ; + +enum dwc3_ep0_next ep0_next_event; +enum dwc3_ep0_state ep0state; +enum dwc3_link_state link_state; + +u16 isoch_delay; +u16 u2sel; +u16 u2pel; +u8 u1sel; +u8 u1pel; + +u8 speed; + +u8 num_out_eps; +u8 num_in_eps; + +void *mem; + +struct dwc3_hwparams hwparams; +struct dentry *root; +struct debugfs_regset32 *regset; + +u8 test_mode; +u8 test_mode_nr; +}; + +/* -------------------------------------------------------------------------- */ + +/* -------------------------------------------------------------------------- */ + +struct dwc3_event_type { +u32 is_devspec:1 ; +u32 type:6 ; +u32 reserved8_31:25 ; +} __packed; + +#define DWC3_DEPEVT_XFERCOMPLETE 0x01 +#define DWC3_DEPEVT_XFERINPROGRESS 0x02 +#define DWC3_DEPEVT_XFERNOTREADY 0x03 +#define DWC3_DEPEVT_RXTXFIFOEVT 0x04 +#define DWC3_DEPEVT_STREAMEVT 0x06 +#define DWC3_DEPEVT_EPCMDCMPLT 0x07 + +/** +* struct dwc3_event_depvt - Device Endpoint Events +* @one_bit: indicates this is an endpoint event (not used) +* @endpoint_number: number of the endpoint +* @endpoint_event: The event we have: +* 0x00 - Reserved +* 0x01 - XferComplete +* 0x02 - XferInProgress +* 0x03 - XferNotReady +* 0x04 - RxTxFifoEvt (IN->Underrun, OUT->Overrun) +* 0x05 - Reserved +* 0x06 - StreamEvt +* 0x07 - EPCmdCmplt +* @reserved11_10: Reserved, don't use. +* @status: Indicates the status of the event. Refer to databook for +* more information. +* @parameters: Parameters of the current event. Refer to databook for +* more information. +*/ +struct dwc3_event_depevt { +u32 one_bit:1 ; +u32 endpoint_number:5 ; +u32 endpoint_event:4 ; +u32 reserved11_10:2 ; +u32 status:4 ; + +/* Within XferNotReady */ +#define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3) + +/* Within XferComplete */ +#define DEPEVT_STATUS_BUSERR (1 << 0) +#define DEPEVT_STATUS_SHORT (1 << 1) +#define DEPEVT_STATUS_IOC (1 << 2) +#define DEPEVT_STATUS_LST (1 << 3) + +/* Stream event only */ +#define DEPEVT_STREAMEVT_FOUND 1 +#define DEPEVT_STREAMEVT_NOTFOUND 2 + +/* Control-only Status */ +#define DEPEVT_STATUS_CONTROL_DATA 1 +#define DEPEVT_STATUS_CONTROL_STATUS 2 + +u32 parameters:16 ; +} __packed; + +/** +* struct dwc3_event_devt - Device Events +* @one_bit: indicates this is a non-endpoint event (not used) +* @device_event: indicates it's a device event. Should read as 0x00 +* @type: indicates the type of device event. +* 0 - DisconnEvt +* 1 - USBRst +* 2 - ConnectDone +* 3 - ULStChng +* 4 - WkUpEvt +* 5 - Reserved +* 6 - EOPF +* 7 - SOF +* 8 - Reserved +* 9 - ErrticErr +* 10 - CmdCmplt +* 11 - EvntOverflow +* 12 - VndrDevTstRcved +* @reserved15_12: Reserved, not used +* @event_info: Information about this event +* @reserved31_24: Reserved, not used +*/ +struct dwc3_event_devt { +u32 one_bit:1 ; +u32 device_event:7 ; +u32 type:4 ; +u32 reserved15_12:4 ; +u32 event_info:8 ; +u32 reserved31_24:8 ; +} __packed; + +/** +* struct dwc3_event_gevt - Other Core Events +* @one_bit: indicates this is a non-endpoint event (not used) +* @device_event: indicates it's (0x03) Carkit or (0x04) I2C event. +* @phy_port_number: self-explanatory +* @reserved31_12: Reserved, not used. +*/ +struct dwc3_event_gevt { +u32 one_bit:1 ; +u32 device_event:7 ; +u32 phy_port_number:4 ; +u32 reserved31_12:20 ; +} __packed; + +/** +* union dwc3_event - representation of Event Buffer contents +* @raw: raw 32-bit event +* @type: the type of the event +* @depevt: Device Endpoint Event +* @devt: Device Event +* @gevt: Global Event +*/ +union dwc3_event { +u32 raw; +struct dwc3_event_type type; +struct dwc3_event_depevt depevt; +struct dwc3_event_devt devt; +struct dwc3_event_gevt gevt; +}; + +/* +* DWC3 Features to be used as Driver Data +*/ + +#define DWC3_HAS_PERIPHERAL BIT(0) +#define DWC3_HAS_XHCI BIT(1) +#define DWC3_HAS_OTG BIT(3) + +/* prototypes */ +void dwc3_set_mode (struct dwc3 *dwc,u32 mode); +int dwc3_gadget_resize_tx_fifos (struct dwc3 *dwc); + +/* TODO rework this for uboot +#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) +*/ +#if defined(CONFIG_USB_DWC3_HOST ) || \ + defined(CONFIG_USB_DWC3_DUAL_ROLE ) +int dwc3_host_init (struct dwc3 *dwc); +void dwc3_host_exit (struct dwc3 *dwc); +#else +static inline int dwc3_host_init (struct dwc3 *dwc) +{return 0 ; } +static inline void dwc3_host_exit (struct dwc3 *dwc) +{ } +#endif + +/* TODO rework this for uboot +#if IS_ENABLED(CONFIG_USB_DWC3_GADGET) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) +*/ +#if defined(CONFIG_USB_DWC3_GADGET ) || \ + defined(CONFIG_USB_DWC3_DUAL_ROLE ) +int dwc3_gadget_init (struct dwc3 *dwc); +void dwc3_gadget_exit (struct dwc3 *dwc); +#else +static inline int dwc3_gadget_init (struct dwc3 *dwc) +{return 0 ; } +static inline void dwc3_gadget_exit (struct dwc3 *dwc) +{ } +#endif + +/* power management interface */ +/* TODO rework this for uboot +#if !IS_ENABLED(CONFIG_USB_DWC3_HOST) */ +#if defined (CONFIG_USB_DWC3_HOST ) +int dwc3_gadget_prepare (struct dwc3 *dwc); +void dwc3_gadget_complete (struct dwc3 *dwc); +int dwc3_gadget_suspend (struct dwc3 *dwc); +int dwc3_gadget_resume (struct dwc3 *dwc); +#endif +/* +#else +static inline int dwc3_gadget_prepare(struct dwc3 *dwc) +{ +return 0; +} + +static inline void dwc3_gadget_complete(struct dwc3 *dwc) +{ +} + +static inline int dwc3_gadget_suspend(struct dwc3 *dwc) +{ +return 0; +} + +static inline int dwc3_gadget_resume(struct dwc3 *dwc) +{ +return 0; +} +#endif +*/ + +#ifdef __UBOOT__ +int dwc3_core_init (struct dwc3 *dwc); +int dwc3_event_buffers_setup (struct dwc3 *dwc); +void dwc3_core_exit (struct dwc3 *dwc); +int dwc3_alloc_event_buffers (struct dwc3 *dwc,unsigned length); +void dwc3_free_event_buffers (struct dwc3 *dwc); +void dwc3_event_buffers_cleanup (struct dwc3 *dwc); +void dwc3_cache_hwparams (struct dwc3 *dwc); +#endif + +#endif /* __DRIVERS_USB_DWC3_CORE_H */ drivers/usb/dwc3/dwc3-omap.c new file +505
-0@@ -0,0 +1,505 @@ +/** +* dwc3-omap.c - OMAP Specific Glue layer +* +* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com +* +* Authors: Felipe Balbi <[email protected]>, +* Sebastian Andrzej Siewior <[email protected]> +* +* Back-ported by: Dan Murphy <[email protected]> +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions, and the following disclaimer, +* without modification. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. The names of the above-listed copyright holders may not be used +* to endorse or promote products derived from this software without +* specific prior written permission. +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") version 2, as published by the Free +* Software Foundation. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define __UBOOT__ +#ifndef __UBOOT__ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/interrupt.h> +#include <linux/spinlock.h> +#include <linux/platform_device.h> +#include <linux/platform_data/dwc3-omap.h> +#include <linux/usb/dwc3-omap.h> +#include <linux/pm_runtime.h> +#include <linux/dma-mapping.h> +#include <linux/ioport.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/usb/otg.h> + +#else + +#include <linux/usb/linux-compat.h> +#include <usb/lin_gadget_compat.h> + +#include "io.h" +#include "dwc3-omap.h" + +#endif + +/* +* All these registers belong to OMAP's Wrapper around the +* DesignWare USB3 Core. +*/ + +#define USBOTGSS_REVISION 0x0000 +#define USBOTGSS_SYSCONFIG 0x0010 +#define USBOTGSS_IRQ_EOI 0x0020 +#define USBOTGSS_IRQSTATUS_RAW_0 0x0024 +#define USBOTGSS_IRQSTATUS_0 0x0028 +#define USBOTGSS_IRQENABLE_SET_0 0x002c +#define USBOTGSS_IRQENABLE_CLR_0 0x0030 +#define USBOTGSS_IRQSTATUS_RAW_1 0x0034 +#define USBOTGSS_IRQSTATUS_1 0x0038 +#define USBOTGSS_IRQENABLE_SET_1 0x003c +#define USBOTGSS_IRQENABLE_CLR_1 0x0040 +#define USBOTGSS_UTMI_OTG_CTRL 0x0080 +#define USBOTGSS_UTMI_OTG_STATUS 0x0084 +#define USBOTGSS_MMRAM_OFFSET 0x0100 +#define USBOTGSS_FLADJ 0x0104 +#define USBOTGSS_DEBUG_CFG 0x0108 +#define USBOTGSS_DEBUG_DATA 0x010c + +/* SYSCONFIG REGISTER */ +#define USBOTGSS_SYSCONFIG_DMADISABLE (1 << 16) + +/* IRQ_EOI REGISTER */ +#define USBOTGSS_IRQ_EOI_LINE_NUMBER (1 << 0) + +/* IRQS0 BITS */ +#define USBOTGSS_IRQO_COREIRQ_ST (1 << 0) + +/* IRQ1 BITS */ +#define USBOTGSS_IRQ1_DMADISABLECLR (1 << 17) +#define USBOTGSS_IRQ1_OEVT (1 << 16) +#define USBOTGSS_IRQ1_DRVVBUS_RISE (1 << 13) +#define USBOTGSS_IRQ1_CHRGVBUS_RISE (1 << 12) +#define USBOTGSS_IRQ1_DISCHRGVBUS_RISE (1 << 11) +#define USBOTGSS_IRQ1_IDPULLUP_RISE (1 << 8) +#define USBOTGSS_IRQ1_DRVVBUS_FALL (1 << 5) +#define USBOTGSS_IRQ1_CHRGVBUS_FALL (1 << 4) +#define USBOTGSS_IRQ1_DISCHRGVBUS_FALL (1 << 3) +#define USBOTGSS_IRQ1_IDPULLUP_FALL (1 << 0) + +/* UTMI_OTG_CTRL REGISTER */ +#define USBOTGSS_UTMI_OTG_CTRL_DRVVBUS (1 << 5) +#define USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS (1 << 4) +#define USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS (1 << 3) +#define USBOTGSS_UTMI_OTG_CTRL_IDPULLUP (1 << 0) + +/* UTMI_OTG_STATUS REGISTER */ +#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE (1 << 31) +#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT (1 << 9) +#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE (1 << 8) +#define USBOTGSS_UTMI_OTG_STATUS_IDDIG (1 << 4) +#define USBOTGSS_UTMI_OTG_STATUS_SESSEND (1 << 3) +#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID (1 << 2) +#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID (1 << 1) + +struct dwc3_omap { +/* device lock */ +spinlock_t lock; + +struct device *dev; + +int irq; +void __iomem *base; + +u32 utmi_otg_status; + +u32 dma_status:1 ; +}; + +static struct dwc3_omap *_omap; + +static inline u32 dwc3_omap_readl (void __iomem *base,u32 offset) +{ +return readl (base + offset); +} + +static inline void dwc3_omap_writel (void __iomem *base,u32 offset,u32 value) +{ +writel (value, base + offset); +} + +int dwc3_omap_mailbox (enum omap_dwc3_vbus_id_status status) +{ +u32 val; +struct dwc3_omap *omap = _omap; + + if (!omap) +#ifndef __UBOOT__ +return -EPROBE_DEFER ; +#else +return -EINVAL ; +#endif + +switch (status) { +case OMAP_DWC3_ID_GROUND : +dev_dbg (omap->dev,"ID GND\n" ); + + val =dwc3_omap_readl (omap->base,USBOTGSS_UTMI_OTG_STATUS ); + val &= ~(USBOTGSS_UTMI_OTG_STATUS_IDDIG + |USBOTGSS_UTMI_OTG_STATUS_VBUSVALID + |USBOTGSS_UTMI_OTG_STATUS_SESSEND ); + val |=USBOTGSS_UTMI_OTG_STATUS_SESSVALID + |USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT ; +dwc3_omap_writel (omap->base,USBOTGSS_UTMI_OTG_STATUS , val); +break ; + +case OMAP_DWC3_VBUS_VALID : +dev_dbg (omap->dev,"VBUS Connect\n" ); + + val =dwc3_omap_readl (omap->base,USBOTGSS_UTMI_OTG_STATUS ); + val &= ~USBOTGSS_UTMI_OTG_STATUS_SESSEND ; + val |=USBOTGSS_UTMI_OTG_STATUS_IDDIG + |USBOTGSS_UTMI_OTG_STATUS_VBUSVALID + |USBOTGSS_UTMI_OTG_STATUS_SESSVALID + |USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT ; +dwc3_omap_writel (omap->base,USBOTGSS_UTMI_OTG_STATUS , val); +break ; + +case OMAP_DWC3_ID_FLOAT : +case OMAP_DWC3_VBUS_OFF : +dev_dbg (omap->dev,"VBUS Disconnect\n" ); + + val =dwc3_omap_readl (omap->base,USBOTGSS_UTMI_OTG_STATUS ); + val &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSVALID + |USBOTGSS_UTMI_OTG_STATUS_VBUSVALID + |USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT ); + val |=USBOTGSS_UTMI_OTG_STATUS_SESSEND + |USBOTGSS_UTMI_OTG_STATUS_IDDIG ; +dwc3_omap_writel (omap->base,USBOTGSS_UTMI_OTG_STATUS , val); +break ; + +default : +dev_dbg (omap->dev,"ID float\n" ); + } + +return 0 ; +} +EXPORT_SYMBOL_GPL (dwc3_omap_mailbox); + +static irqreturn_t dwc3_omap_interrupt (int irq,void *_omap) +{ +struct dwc3_omap *omap = _omap; +u32 reg; + +spin_lock (&omap->lock); + + reg =dwc3_omap_readl (omap->base,USBOTGSS_IRQSTATUS_1 ); + +if (reg &USBOTGSS_IRQ1_DMADISABLECLR ) { +dev_dbg (omap->dev,"DMA Disable was Cleared\n" ); + omap->dma_status = false; + } + +if (reg &USBOTGSS_IRQ1_OEVT ) +dev_dbg (omap->dev,"OTG Event\n" ); + +if (reg &USBOTGSS_IRQ1_DRVVBUS_RISE ) +dev_dbg (omap->dev,"DRVVBUS Rise\n" ); + +if (reg &USBOTGSS_IRQ1_CHRGVBUS_RISE ) +dev_dbg (omap->dev,"CHRGVBUS Rise\n" ); + +if (reg &USBOTGSS_IRQ1_DISCHRGVBUS_RISE ) +dev_dbg (omap->dev,"DISCHRGVBUS Rise\n" ); + +if (reg &USBOTGSS_IRQ1_IDPULLUP_RISE ) +dev_dbg (omap->dev,"IDPULLUP Rise\n" ); + +if (reg &USBOTGSS_IRQ1_DRVVBUS_FALL ) +dev_dbg (omap->dev,"DRVVBUS Fall\n" ); + +if (reg &USBOTGSS_IRQ1_CHRGVBUS_FALL ) +dev_dbg (omap->dev,"CHRGVBUS Fall\n" ); + +if (reg &USBOTGSS_IRQ1_DISCHRGVBUS_FALL ) +dev_dbg (omap->dev,"DISCHRGVBUS Fall\n" ); + +if (reg &USBOTGSS_IRQ1_IDPULLUP_FALL ) +dev_dbg (omap->dev,"IDPULLUP Fall\n" ); + +dwc3_omap_writel (omap->base,USBOTGSS_IRQSTATUS_1 , reg); + + reg =dwc3_omap_readl (omap->base,USBOTGSS_IRQSTATUS_0 ); +dwc3_omap_writel (omap->base,USBOTGSS_IRQSTATUS_0 , reg); + +spin_unlock (&omap->lock); + +return IRQ_HANDLED ; +} + +#ifndef __UBOOT__ +static int dwc3_omap_remove_core (struct device *dev,void *c) +{ +struct platform_device *pdev =to_platform_device (dev); + +platform_device_unregister (pdev); + +return 0 ; +} +#endif + +#ifndef __UBOOT__ +static void dwc3_omap_enable_irqs(struct dwc3_omap *omap) +#else +void dwc3_omap_enable_irqs (struct dwc3_omap *omap) +#endif +{ +u32 reg; + +/* enable all IRQs */ + reg =USBOTGSS_IRQO_COREIRQ_ST ; +dwc3_omap_writel (omap->base,USBOTGSS_IRQENABLE_SET_0 , reg); + + reg = (USBOTGSS_IRQ1_OEVT | +USBOTGSS_IRQ1_DRVVBUS_RISE | +USBOTGSS_IRQ1_CHRGVBUS_RISE | +USBOTGSS_IRQ1_DISCHRGVBUS_RISE | +USBOTGSS_IRQ1_IDPULLUP_RISE | +USBOTGSS_IRQ1_DRVVBUS_FALL | +USBOTGSS_IRQ1_CHRGVBUS_FALL | +USBOTGSS_IRQ1_DISCHRGVBUS_FALL | +USBOTGSS_IRQ1_IDPULLUP_FALL ); + +dwc3_omap_writel (omap->base,USBOTGSS_IRQENABLE_SET_1 , reg); +} + +static void dwc3_omap_disable_irqs (struct dwc3_omap *omap) +{ +/* disable all IRQs */ +dwc3_omap_writel (omap->base,USBOTGSS_IRQENABLE_SET_1 ,0x00 ); +dwc3_omap_writel (omap->base,USBOTGSS_IRQENABLE_SET_0 ,0x00 ); +} +#ifndef __UBOOT__ +static u64 dwc3_omap_dma_mask =DMA_BIT_MASK (32 ); + +static int dwc3_omap_probe (struct platform_device *pdev) +{ +struct device_node *node = pdev->dev.of_node; + +struct dwc3_omap *omap; +struct resource *res; +struct device *dev = &pdev->dev; + +int ret = -ENOMEM ; +int irq; + +int utmi_mode =0 ; + +u32 reg; + +void __iomem *base; + +if (!node) { +dev_err (dev,"device node not found\n" ); +return -EINVAL ; + } + + omap =devm_kzalloc (dev,sizeof (*omap),GFP_KERNEL ); +if (!omap) { +dev_err (dev,"not enough memory\n" ); +return -ENOMEM ; + } + +platform_set_drvdata (pdev, omap); + + irq =platform_get_irq (pdev,0 ); +if (irq <0 ) { +dev_err (dev,"missing IRQ resource\n" ); +return -EINVAL ; + } + + res =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); +if (!res) { +dev_err (dev,"missing memory base resource\n" ); +return -EINVAL ; + } + + base =devm_ioremap_nocache (dev, res->start,resource_size (res)); +if (!base) { +dev_err (dev,"ioremap failed\n" ); +return -ENOMEM ; + } + +spin_lock_init (&omap->lock); + + omap->dev = dev; + omap->irq = irq; + omap->base = base; + dev->dma_mask = &dwc3_omap_dma_mask; + +/* +* REVISIT if we ever have two instances of the wrapper, we will be +* in big trouble +*/ + _omap = omap; + +pm_runtime_enable (dev); + ret =pm_runtime_get_sync (dev); +if (ret <0 ) { +dev_err (dev,"get_sync failed with err %d\n" , ret); +return ret; + } + + reg =dwc3_omap_readl (omap->base,USBOTGSS_UTMI_OTG_STATUS ); + +of_property_read_u32 (node,"utmi-mode" , &utmi_mode); + +switch (utmi_mode) { +case DWC3_OMAP_UTMI_MODE_SW : + reg |=USBOTGSS_UTMI_OTG_STATUS_SW_MODE ; +break ; +case DWC3_OMAP_UTMI_MODE_HW : + reg &= ~USBOTGSS_UTMI_OTG_STATUS_SW_MODE ; +break ; +default : +dev_dbg (dev,"UNKNOWN utmi mode %d\n" , utmi_mode); + } + +dwc3_omap_writel (omap->base,USBOTGSS_UTMI_OTG_STATUS , reg); + +/* check the DMA Status */ + reg =dwc3_omap_readl (omap->base,USBOTGSS_SYSCONFIG ); + omap->dma_status = !!(reg &USBOTGSS_SYSCONFIG_DMADISABLE ); + + ret =devm_request_irq (dev, omap->irq, dwc3_omap_interrupt,0 , +"dwc3-omap" , omap); +if (ret) { +dev_err (dev,"failed to request IRQ #%d --> %d\n" , + omap->irq, ret); +return ret; + } + +dwc3_omap_enable_irqs (omap); + + ret =of_platform_populate (node,NULL ,NULL , dev); +if (ret) { +dev_err (&pdev->dev,"failed to create dwc3 core\n" ); +return ret; + } + +return 0 ; +} + +static int dwc3_omap_remove (struct platform_device *pdev) +{ +struct dwc3_omap *omap =platform_get_drvdata (pdev); + +dwc3_omap_disable_irqs (omap); +pm_runtime_put_sync (&pdev->dev); +pm_runtime_disable (&pdev->dev); +device_for_each_child (&pdev->dev,NULL , dwc3_omap_remove_core); + +return 0 ; +} + +static const struct of_device_id of_dwc3_match[] = { + { + .compatible ="ti,dwc3" + }, + { }, +}; +MODULE_DEVICE_TABLE (of, of_dwc3_match); + +#ifdef CONFIG_PM_SLEEP +static int dwc3_omap_prepare (struct device *dev) +{ +struct dwc3_omap *omap =dev_get_drvdata (dev); + +dwc3_omap_disable_irqs (omap); + +return 0 ; +} + +static void dwc3_omap_complete (struct device *dev) +{ +struct dwc3_omap *omap =dev_get_drvdata (dev); + +dwc3_omap_enable_irqs (omap); +} + +static int dwc3_omap_suspend (struct device *dev) +{ +struct dwc3_omap *omap =dev_get_drvdata (dev); + + omap->utmi_otg_status =dwc3_omap_readl (omap->base, +USBOTGSS_UTMI_OTG_STATUS ); + +return 0 ; +} + +static int dwc3_omap_resume (struct device *dev) +{ +struct dwc3_omap *omap =dev_get_drvdata (dev); + +dwc3_omap_writel (omap->base,USBOTGSS_UTMI_OTG_STATUS , + omap->utmi_otg_status); + +pm_runtime_disable (dev); +pm_runtime_set_active (dev); +pm_runtime_enable (dev); + +return 0 ; +} + +static const struct dev_pm_ops dwc3_omap_dev_pm_ops = { + .prepare = dwc3_omap_prepare, + .complete = dwc3_omap_complete, + +SET_SYSTEM_SLEEP_PM_OPS (dwc3_omap_suspend, dwc3_omap_resume) +}; + +#define DEV_PM_OPS (&dwc3_omap_dev_pm_ops) +#else +#define DEV_PM_OPS NULL +#endif /* CONFIG_PM_SLEEP */ + +static struct platform_driver dwc3_omap_driver = { + .probe = dwc3_omap_probe, + .remove = dwc3_omap_remove, + .driver = { + .name ="omap-dwc3" , + .of_match_table = of_dwc3_match, + .pm =DEV_PM_OPS , + }, +}; + +module_platform_driver (dwc3_omap_driver); +#endif /* __UBOOT__ */ + +MODULE_ALIAS ("platform:omap-dwc3" ); +MODULE_AUTHOR ("Felipe Balbi <[email protected]>" ); +MODULE_LICENSE ("Dual BSD/GPL" ); +MODULE_DESCRIPTION ("DesignWare USB3 OMAP Glue Layer" );drivers/usb/dwc3/dwc3-omap.h new file +41
-0@@ -0,0 +1,41 @@ +/* +* Copyright (C) 2013 by Texas Instruments +* * +* Back-ported by: Dan Murphy <[email protected]> +* +* The Inventra Controller Driver for Linux is free software; you +* can redistribute it and/or modify it under the terms of the GNU +* General Public License version 2 as published by the Free Software +* Foundation. +*/ + +#ifndef __DWC3_OMAP_H__ +#define __DWC3_OMAP_H__ + +enum omap_dwc3_vbus_id_status { +OMAP_DWC3_UNKNOWN =0 , +OMAP_DWC3_ID_GROUND , +OMAP_DWC3_ID_FLOAT , +OMAP_DWC3_VBUS_VALID , +OMAP_DWC3_VBUS_OFF , +}; + +enum dwc3_omap_utmi_mode { +DWC3_OMAP_UTMI_MODE_UNKNOWN =0 , +DWC3_OMAP_UTMI_MODE_HW , +DWC3_OMAP_UTMI_MODE_SW , +}; + +#if defined(CONFIG_USB_DWC3 ) +extern int dwc3_omap_mailbox (enum omap_dwc3_vbus_id_status status); +#endif +/* +TODO need this override for non-USB_DWC3 +#else +static inline int dwc3_omap_mailbox(enum omap_dwc3_vbus_id_status status) +{ +return -ENODEV; +} +#endif +*/ +#endif /* __DWC3_OMAP_H__ */ drivers/usb/dwc3/dwc3-uboot.c new file +384
-0@@ -0,0 +1,384 @@ +/** +* dwc3-uboot.c - dwc3 uboot initialization +* +* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com +* +* Authors: Dan Murphy <[email protected]> +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions, and the following disclaimer, +* without modification. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. The names of the above-listed copyright holders may not be used +* to endorse or promote products derived from this software without +* specific prior written permission. +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") version 2, as published by the Free +* Software Foundation. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <usb.h> +#include <linux/usb/linux-compat.h> +#include <linux/usb/usb-compat.h> +#include <usb_defs.h> + +#include "core.h" +#include "io.h" +#include "dwc3-omap.h" + +#define DWC3_ALIGN_MASK (16 - 1) + +static char *maximum_speed ="super" ; + + +#include <asm/omap_common.h> +/* IRQS0 BITS */ +#define USBOTGSS_IRQO_COREIRQ_ST (1 << 0) + +/* IRQ1 BITS */ +#define USBOTGSS_IRQ1_DMADISABLECLR (1 << 17) +#define USBOTGSS_IRQ1_OEVT (1 << 16) +#define USBOTGSS_IRQ1_DRVVBUS_RISE (1 << 13) +#define USBOTGSS_IRQ1_CHRGVBUS_RISE (1 << 12) +#define USBOTGSS_IRQ1_DISCHRGVBUS_RISE (1 << 11) +#define USBOTGSS_IRQ1_IDPULLUP_RISE (1 << 8) +#define USBOTGSS_IRQ1_DRVVBUS_FALL (1 << 5) +#define USBOTGSS_IRQ1_CHRGVBUS_FALL (1 << 4) +#define USBOTGSS_IRQ1_DISCHRGVBUS_FALL (1 << 3) +#define USBOTGSS_IRQ1_IDPULLUP_FALL (1 << 0) + +#define USBOTGSS_IRQENABLE_SET_0 0x4A02002c +#define USBOTGSS_IRQENABLE_SET_1 0x4A02003c +#define USBOTGSS_SYSCONFIG 0x4A020010 +#define USBOTGSS_IRQSTATUS_0 0x4A020028 +#define USBOTGSS_IRQSTATUS_1 0x4A020038 +#define USBOTGSS_UTMI_OTG_STATUS 0x4A020084 + +struct usb_dpll_params { +u16 m; +u8 n; +u8 freq:3 ; +u8 sd; +u32 mf; +}; + +static struct usb_dpll_params omap_usb3_dpll_params[6 ] = { + {1250 ,5 ,4 ,20 ,0 },/* 12 MHz */ + {0 ,0 ,0 ,0 ,0 },/* for 13 MHz TBD */ + {3125 ,20 ,4 ,20 ,0 },/* 16.8 MHz */ + {1172 ,8 ,4 ,20 ,65537 },/* 19.2 MHz */ + {1250 ,12 ,4 ,20 ,0 },/* 26 MHz */ + {3125 ,47 ,4 ,20 ,92843 },/* 38.4 MHz */ +}; + +#define USB3_PHY_PLL_CONFIGURATION1 0x4A084C0C +#define USB3_PHY_PLL_REGN_MASK 0xFE +#define USB3_PHY_PLL_REGN_SHIFT 1 +#define USB3_PHY_PLL_REGM_MASK 0x1FFE00 +#define USB3_PHY_PLL_REGM_SHIFT 9 +#define USB3_PHY_PLL_CONFIGURATION2 0x4A084C10 +#define USB3_PHY_PLL_SELFREQDCO_MASK 0xE +#define USB3_PHY_PLL_SELFREQDCO_SHIFT 1 +#define USB3_PHY_PLL_CONFIGURATION4 0x4A084C20 +#define USB3_PHY_PLL_REGM_F_MASK 0x3FFFF +#define USB3_PHY_PLL_REGM_F_SHIFT 0 +#define USB3_PHY_PLL_CONFIGURATION3 0x4A084C14 +#define USB3_PHY_PLL_SD_MASK 0x3FC00 +#define USB3_PHY_PLL_SD_SHIFT 9 +#define USB3_PHY_CONTROL_PHY_POWER_USB 0x4A002370 +#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000 +#define USB3_PWRCTL_CLK_FREQ_MASK 0xFFC +#define USB3_PHY_PARTIAL_RX_POWERON (1<<6) +#define USB3_PHY_TX_RX_POWERON 0x3 +#define USB3_PWRCTL_CLK_CMD_SHIFT 14 +#define USB3_PWRCTL_CLK_FREQ_SHIFT 22 +#define USB3_PHY_PLL_IDLE 1 + +#define USB3_PHY_PLL_STATUS 0x4A084C04 +#define USB3_PHY_PLL_TICOPWDN 0x10000 +#define USB3_PHY_PLL_LOCK 0x2 +#define CONTROL_DEV_CONF 0x4A002300 +#define CONTROL_DEV_CONF_USBPHY_PD 1 + +#define USB3_PHY_PLL_GO 0x4A084C08 +#define USB3_PHY_SET_PLL_GO 1 + +void setup_usb (void ) +{ +u32 val; +u32 retry; +u8 vali; +writel (0x118 ,0x4A0029EC ); +writel (0x1180000 ,0x4A0029F0 ); +writel (0x118 ,0x4A0029F4 ); +/* Turn on 32K AON clk */ +writel (0x100 ,0x4A008640 ); +/* Setting USBOTGSS_SYSCONFIG set to NO idle */ + val =readl (0x4A020010 ); +writel (0x10034 ,0x4A020010 ); + +/* Set the IRQ Enables */ +/* Clear status */ + val =readl (USBOTGSS_UTMI_OTG_STATUS ); +writel (val,USBOTGSS_UTMI_OTG_STATUS ); +/* Enable interrupts */ +writel (0x1 ,USBOTGSS_IRQENABLE_SET_0 ); +writel (0x13939 ,USBOTGSS_IRQENABLE_SET_1 ); +/* Check for non zero status */ + val =readl (USBOTGSS_IRQSTATUS_1 ); +writel (val,USBOTGSS_IRQSTATUS_1 ); + val =readl (USBOTGSS_IRQSTATUS_0 ); +writel (val,USBOTGSS_IRQSTATUS_0 ); +} + +#ifdef CONFIG_USB_DWC3_HOST +static struct musb *host; +static struct usb_hcd hcd; +static enum usb_device_speed host_speed; + +#define DWC_HOST_TIMEOUT 0x3ffffff + +static struct usb_host_endpoint hep; +static struct urb urb; + +static void dwc3_host_complete_urb (struct urb *urb) +{ + urb->dev->status &= ~USB_ST_NOT_PROC ; + urb->dev->act_len = urb->actual_length; + +return ; +} + +static struct urb *construct_urb (struct usb_device *dev,int endpoint_type, +unsigned long pipe,void *buffer,int len, +struct devrequest *setup,int interval) +{ +int epnum =usb_pipeendpoint (pipe); +int is_in =usb_pipein (pipe); + +memset (&urb,0 ,sizeof (struct urb )); +memset (&hep,0 ,sizeof (struct usb_host_endpoint )); + +INIT_LIST_HEAD (&hep.urb_list); + +INIT_LIST_HEAD (&urb.urb_list); + urb.ep = &hep; + urb.complete = dwc3_host_complete_urb; + urb.status = -EINPROGRESS ; + urb.dev = dev; + urb.pipe = pipe; + urb.transfer_buffer = buffer; + urb.transfer_dma = (unsigned long )buffer; + urb.transfer_buffer_length = len; + urb.setup_packet = (unsigned char *)setup; + + urb.ep->desc.wMaxPacketSize = +__cpu_to_le16 (is_in ? dev->epmaxpacketin[epnum] : + dev->epmaxpacketout[epnum]); + urb.ep->desc.bmAttributes = endpoint_type; + urb.ep->desc.bEndpointAddress = + (is_in ?USB_DIR_IN :USB_DIR_OUT ) | epnum; + urb.ep->desc.bInterval = interval; + +return &urb; +} + +static int submit_urb (struct usb_hcd *hcd,struct urb *urb) +{ +return NULL ; +} + +int submit_control_msg (struct usb_device *dev,unsigned long pipe, +void *buffer,int len,struct devrequest *setup) +{ +struct urb *urb =construct_urb (dev,USB_ENDPOINT_XFER_CONTROL , pipe, + buffer, len, setup,0 ); + +/* Fix speed for non hub-attached devices */ +if (!dev->parent) + dev->speed = host_speed; + +return submit_urb (&hcd, urb); +} + + +int submit_bulk_msg (struct usb_device *dev,unsigned long pipe, +void *buffer,int len) +{ +struct urb *urb =construct_urb (dev,USB_ENDPOINT_XFER_BULK , pipe, + buffer, len,NULL ,0 ); +return submit_urb (&hcd, urb); +} + +int submit_int_msg (struct usb_device *dev,unsigned long pipe, +void *buffer,int len,int interval) +{ +struct urb *urb =construct_urb (dev,USB_ENDPOINT_XFER_INT , pipe, + buffer, len,NULL , interval); +return submit_urb (&hcd, urb); +} + +/* The init sequence was abstracted from the core.c probe function */ +int usb_lowlevel_init (int index,void **controller) +{ +struct dwc3 *dwc; +int ret = -ENOMEM ; +void *mem; +u8 mode; + + mem =kzalloc (sizeof (*dwc) +DWC3_ALIGN_MASK ,GFP_KERNEL ); +if (!mem) { +dev_err (dev,"not enough memory\n" ); +return -ENOMEM ; + } + dwc =PTR_ALIGN (mem,DWC3_ALIGN_MASK +1 ); + dwc->mem = mem; + dwc->regs =0x4A030000 ; + +if (!strncmp ("super" , maximum_speed,5 )) + dwc->maximum_speed =DWC3_DCFG_SUPERSPEED ; +else if (!strncmp ("high" , maximum_speed,4 )) + dwc->maximum_speed =DWC3_DCFG_HIGHSPEED ; +else if (!strncmp ("full" , maximum_speed,4 )) + dwc->maximum_speed =DWC3_DCFG_FULLSPEED1 ; +else if (!strncmp ("low" , maximum_speed,3 )) + dwc->maximum_speed =DWC3_DCFG_LOWSPEED ; +else + dwc->maximum_speed =DWC3_DCFG_SUPERSPEED ; + +setup_usb (); + +dwc3_cache_hwparams (dwc); + + ret =dwc3_alloc_event_buffers (dwc,DWC3_EVENT_BUFFERS_SIZE ); +if (ret) { +dev_err (dwc->dev,"failed to allocate event buffers\n" ); + ret = -ENOMEM ; + goto err0; + } + + ret =dwc3_core_init (dwc); +if (ret) { +dev_err (dev,"failed to initialize core\n" ); + goto err0; + } + + ret =dwc3_event_buffers_setup (dwc); +if (ret) { +dev_err (dwc->dev,"failed to setup event buffers\n" ); + goto err1; + } +/* TODO: Figure out how to enable this +if (CONFIG_USB_DWC3_HOST) +mode = DWC3_MODE_HOST; +else if (CONFIG_USB_DWC3_GADGET) +mode = DWC3_MODE_DEVICE; +else +mode = DWC3_MODE_DRD; +*/ + mode =DWC3_MODE_HOST ; +switch (mode) { +case DWC3_MODE_DEVICE : +dwc3_set_mode (dwc,DWC3_GCTL_PRTCAP_DEVICE ); + ret =dwc3_gadget_init (dwc); +if (ret) { +printf ("failed to initialize gadget\n" ); + goto err2; + } +break ; +case DWC3_MODE_HOST : +dwc3_set_mode (dwc,DWC3_GCTL_PRTCAP_HOST ); + ret =dwc3_host_init (dwc); +if (ret) { +printf ("failed to initialize host\n" ); + goto err2; + } +break ; +case DWC3_MODE_DRD : +dwc3_set_mode (dwc,DWC3_GCTL_PRTCAP_OTG ); + ret =dwc3_host_init (dwc); +if (ret) { +printf ("failed to initialize host\n" ); + goto err2; + } + + ret =dwc3_gadget_init (dwc); +if (ret) { +printf ("failed to initialize gadget\n" ); + goto err2; + } +break ; +default : +printf ("Unsupported mode of operation %d\n" , mode); + goto err2; + } + dwc->mode = mode; + +return 0 ; + +err2: +dwc3_event_buffers_cleanup (dwc); + +err1: +dwc3_core_exit (dwc); + +err0: +dwc3_free_event_buffers (dwc); + +return ret; +} + +int usb_lowlevel_stop (int index) +{ +return 0 ; +} +#endif /* CONFIG_USB_DWC3_HOST */ + +#ifdef CONFIG_USB_DWC3_GADGET +int usb_gadget_unregister_driver (struct usb_gadget_driver *driver) +{ +return 0 ; +} + +static struct dwc *gadget; +int usb_gadget_register_driver (struct usb_gadget_driver *driver) +{ +int ret; + +if (!driver ||/* driver->speed < USB_SPEED_FULL ||*/ !driver->bind || + !driver->setup) { +printf ("bad parameter.\n" ); +return -EINVAL ; + } + +if (!gadget) { +printf ("Controller uninitialized\n" ); +return -ENXIO ; + } + +return 0 ; +} + +int usb_gadget_handle_interrupts (void ) +{ +return 0 ; +} +#endif /* CONFIG_USB_DWC3_GADGET */ drivers/usb/dwc3/ep0.c new file +1085
-0@@ -0,0 +1,1085 @@ +/** +* ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling +* +* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com +* +* Authors: Felipe Balbi <[email protected]>, +* Sebastian Andrzej Siewior <[email protected]> +* +* Back-ported by: Dan Murphy <[email protected]> +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions, and the following disclaimer, +* without modification. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. The names of the above-listed copyright holders may not be used +* to endorse or promote products derived from this software without +* specific prior written permission. +* +* ALTERNATIVELY, this software may be distributed under the terms of the +* GNU General Public License ("GPL") version 2, as published by the Free +* Software Foundation. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define __UBOOT__ +#ifndef __UBOOT__ +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/spinlock.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/list.h> +#include <linux/dma-mapping.h> + +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <linux/usb/composite.h> +#else + +#include <common.h> + +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <linux/usb/composite.h> +#include <linux/usb/linux-compat.h> +#include <usb/lin_gadget_compat.h> + +#endif +#include "core.h" +#include "gadget.h" +#include "io.h" + +static void __dwc3_ep0_do_control_status (struct dwc3 *dwc,struct dwc3_ep *dep); +static void __dwc3_ep0_do_control_data (struct dwc3 *dwc, +struct dwc3_ep *dep,struct dwc3_request *req); + +static const char *dwc3_ep0_state_string (enum dwc3_ep0_state state) +{ +switch (state) { +case EP0_UNCONNECTED : +return "Unconnected" ; +case EP0_SETUP_PHASE : +return "Setup Phase" ; +case EP0_DATA_PHASE : +return "Data Phase" ; +case EP0_STATUS_PHASE : +return "Status Phase" ; +default : +return "UNKNOWN" ; + } +} + +static int dwc3_ep0_start_trans (struct dwc3 *dwc,u8 epnum,dma_addr_t buf_dma, +u32 len,u32 type) +{ +struct dwc3_gadget_ep_cmd_params params; +struct dwc3_trb *trb; +struct dwc3_ep *dep; + +int ret; + + dep = dwc->eps[epnum]; +if (dep->flags &DWC3_EP_BUSY ) { +dev_vdbg (dwc->dev,"%s: still busy\n" , dep->name); +return 0 ; + } + + trb = dwc->ep0_trb; + + trb->bpl =lower_32_bits (buf_dma); + trb->bph =upper_32_bits (buf_dma); + trb->size = len; + trb->ctrl = type; + + trb->ctrl |= (DWC3_TRB_CTRL_HWO + |DWC3_TRB_CTRL_LST + |DWC3_TRB_CTRL_IOC + |DWC3_TRB_CTRL_ISP_IMI ); + +memset (¶ms,0 ,sizeof (params)); + params.param0 =upper_32_bits (dwc->ep0_trb_addr); + params.param1 =lower_32_bits (dwc->ep0_trb_addr); + + ret =dwc3_send_gadget_ep_cmd (dwc, dep->number, +DWC3_DEPCMD_STARTTRANSFER , ¶ms); +if (ret <0 ) { +dev_dbg (dwc->dev,"failed to send STARTTRANSFER command\n" ); +return ret; + } + + dep->flags |=DWC3_EP_BUSY ; + dep->resource_index =dwc3_gadget_ep_get_transfer_index (dwc, + dep->number); + + dwc->ep0_next_event =DWC3_EP0_COMPLETE ; + +return 0 ; +} + +static int __dwc3_gadget_ep0_queue (struct dwc3_ep *dep, +struct dwc3_request *req) +{ +struct dwc3 *dwc = dep->dwc; + + req->request.actual =0 ; + req->request.status = -EINPROGRESS ; + req->epnum = dep->number; + +list_add_tail (&req->list, &dep->request_list); + +/* +* Gadget driver might not be quick enough to queue a request +* before we get a Transfer Not Ready event on this endpoint. +* +* In that case, we will set DWC3_EP_PENDING_REQUEST. When that +* flag is set, it's telling us that as soon as Gadget queues the +* required request, we should kick the transfer here because the +* IRQ we were waiting for is long gone. +*/ +if (dep->flags &DWC3_EP_PENDING_REQUEST ) { +unsigned direction; + + direction = !!(dep->flags &DWC3_EP0_DIR_IN ); + +if (dwc->ep0state !=EP0_DATA_PHASE ) { +#ifndef __UBOOT__ +dev_WARN (dwc->dev,"Unexpected pending request\n" ); +#else +printf ("Unexpected pending request\n" ); +#endif +return 0 ; + } + +__dwc3_ep0_do_control_data (dwc, dwc->eps[direction], req); + + dep->flags &= ~(DWC3_EP_PENDING_REQUEST | +DWC3_EP0_DIR_IN ); + +return 0 ; + } + +/* +* In case gadget driver asked us to delay the STATUS phase, +* handle it here. +*/ +if (dwc->delayed_status) { +unsigned direction; + + direction = !dwc->ep0_expect_in; + dwc->delayed_status = false; +Lines of this file are not shown. View the raw message.
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RFC PATCH v2 4/4 omap5: usb: Add usb otg clocks and enable
In reply to Dan MurphyAdd and enable the USB OTG clocks.
Signed-off-by Dan Murphy <[email protected]>
--- arch/arm/cpu/armv7/omap5/hw_data.c | 14 ++++++++++++++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 + arch/arm/include/asm/arch-omap5/clock.h | 4 ++++ arch/arm/include/asm/omap_common.h | 1 + common/cmd_usb.c | 6 +++++- include/configs/omap5_common.h | 9 +++++++++ 6 files changed, 34 insertions(+), 1 deletion(-)
arch/arm/cpu/armv7/omap5/hw_data.c +14 -0
@@ -456,6 +456,20 @@ void enable_basic_clocks(void) OPTFCLKEN_SCRM_PER_MASK);setbits_le32 ((*prcm)->cm_wkupaon_scrm_clkctrl,OPTFCLKEN_SCRM_CORE_MASK ); + +/* TODO wrap this with USB defines */ +/* Setting OCP2SCP1 register */ +setbits_le32 ((*prcm)->cm_l3init_ocp2scp1_clkctrl, +MODULE_CLKCTRL_MODULEMODE_HW_AUTO ); + +/* Select USB OTG SS clock */ +setbits_le32 ((*prcm)->cm_l3init_usb_otg_ss_clkctrl, + (MODULE_CLKCTRL_MODULEMODE_HW_AUTO | +OPTFCLKEN_USB_OTG_SS_FCLK_MASK )); + +/* Setting l3init register */ +setbits_le32 ((*prcm)->cm_l3init_clkstctrl,OPTFCLKEN_USB_OTG_SS_FCLK_MASK ); + }void enable_basic_uboot_clocks (void )
arch/arm/cpu/armv7/omap5/prcm-regs.c +1 -0
@@ -718,6 +718,7 @@ struct prcm_regs const omap5_es2_prcm = { .cm_l3init_p1500_clkctrl = 0x4a009678, .cm_l3init_fsusb_clkctrl = 0x4a0096d0, .cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0, + .cm_l3init_usb_otg_ss_clkctrl = 0x4a0096f0,/* prm irqstatus regs */ .prm_irqstatus_mpu_2 = 0x4ae06014,
arch/arm/include/asm/arch-omap5/clock.h +4 -0
@@ -165,6 +165,10 @@/* CM_L3INIT_USBPHY_CLKCTRL */ #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8 +/* CM_L3INIT_USB_OTG_SS_CLKCTRL */ +#define OPTFCLKEN_USB_OTG_SS_FCLK_SHIFT 8 +#define OPTFCLKEN_USB_OTG_SS_FCLK_MASK (1 << 8) +/* CM_MPU_MPU_CLKCTRL */ #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24)
arch/arm/include/asm/omap_common.h +1 -0
@@ -241,6 +241,7 @@ struct prcm_regs {u32 cm_l3init_p1500_clkctrl;u32 cm_l3init_fsusb_clkctrl;u32 cm_l3init_ocp2scp1_clkctrl; +u32 cm_l3init_usb_otg_ss_clkctrl;u32 prm_irqstatus_mpu_2;
common/cmd_usb.c +5 -1
@@ -31,6 +31,7 @@#include <asm/unaligned.h> #include <part.h> #include <usb.h> +#include <linux/usb/usb-compat.h> #ifdef CONFIG_USB_STORAGE static int usb_stor_curr_dev =-1 ;/* current device */
@@ -160,6 +161,7 @@ static void usb_display_string(struct usb_device *dev, int index) static void usb_display_desc(struct usb_device *dev) { +#if 0 if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) { printf("%d: %s, USB Revision %x.%x\n", dev->devnum, usb_get_class_desc(dev->config.if_desc[0].desc.bInterfaceClass),
@@ -189,7 +191,7 @@ static void usb_display_desc(struct usb_device *dev) (dev->descriptor.bcdDevice>>8 ) &0xff , dev->descriptor.bcdDevice & 0xff); } - +#endif } static void usb_display_conf_desc(struct usb_config_descriptor *config,
@@ -350,10 +352,12 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) pre[index++] =' ' ; pre[index++] = has_child ?'|' :' ' ; pre[index] =0 ; +#if 0 printf (" %s (%s, %dmA)\n" ,usb_get_class_desc ( dev->config.if_desc[0 ].desc.bInterfaceClass),portspeed (dev->speed), dev->config.desc.bMaxPower *2 ); +#endif if (strlen (dev->mf) ||strlen (dev->prod) ||strlen (dev->serial))printf (" %s %s %s %s\n" , pre, dev->mf, dev->prod, dev->serial);printf (" %s\n" , pre);
include/configs/omap5_common.h +9 -0
@@ -96,6 +96,15 @@#define CONFIG_SYS_CONSOLE_IS_IN_ENV +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_DWC3 +#define CONFIG_USB_DWC3_GADGET +#define CONFIG_USB_DWC3_DUAL_ROLE +#define CONFIG_USB_DWC3_OMAP +#define CONFIG_USB_DWC3_HOST +/* Flash */ #define CONFIG_SYS_NO_FLASH
Signature · 1 line
1.7.9.5
v2 cover DWC back port from Linux kernel
In reply to Dan MurphyDear Dan Murphy,
Quoted 7 lines
This patch series has been generated in an effort to get comments on the implementation of the dwc code within the uBoot.
V2 incorporates comments to first port the kernel header backward to uBoot and then produce the uBoot changes so the uBoot changes are easily distinguishable from the original kernel source.
Quoted 7 lines
The first patch is the one of major concern as this patch will make an attempt to commonize the usb headers so that there is re-use and prepare the usb headers for future usb code back ports from the linux kernel.
This code will compile for omap5 and omap4 but fails for am335x. Before I invest anymore time in this I would like to understand if there are any comments on the overall implemenation.
Ok, the code is nicely contained and can be easily resynced with mainline. Please continue and sorry for the long delay.
Best regards,
Marek Vasut