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MIPS: pbl: add nmon MIPS nano-monitor

PATCH Applied Antony Pavlov 2 participants 5 messages Jun 24, 2013 – Jun 25, 2013 MIPS

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Antony Pavlov

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#0 lore raw

cover MIPS: pbl: add nmon MIPS nano-monitor

nmon is a tiny monitor (<1200 bytes) program
for the MIPS processors.
It can operate with NO working RAM at all!
It uses only the processor registers and NS16550-compatible UART port for operation, so it can be used for a memory controller setup code debugging.

With no changes nmon should work on different MIPS processors as it uses only common MIPS-I instructions.

[PATCH 1/3] MIPS: pbl: add nmon MIPS nano-monitor [PATCH 2/3] MIPS: qemu-malta: rework debug_ll.h [PATCH 3/3] MIPS: qemu-malta: add nmon

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author
#1 lore raw

PATCH 1/3 MIPS: pbl: add nmon MIPS nano-monitor

nmon is a tiny monitor (<1200 bytes) program
for the MIPS processors.
It can operate with NO working RAM at all!
It uses only the processor registers and NS16550-compatible UART port for operation, so it can be used for a memory controller setup code debugging.

With no changes nmon should work on different MIPS processors as it uses only common MIPS-I instructions.

nmon is inspired by mmon, MIPS VR4300 Mini-monitor.

mmon is copyrighted 1996, 2003 by Eric Smith. Also Alexander Voropay must be noted for his work on qemu & YAMON mmon adaptations made in 2006 and 2007.

See http://www.brouhaha.com/~eric/software/mmon/
for mmon details.

The mmon's features missed in nmon:

* batch memory dumps;
* byte and 16-bit half-words dumps and stores;
* fill memory;
* load S-records (this function make sense only
if RAM works properly).

nmon has only 4 commands:
q - quit to barebox
d <addr> - read 32-bit word from <addr> address w <addr> <val> - write 32-bit word <val> to <addr> g <addr> - jump to <addr>

Addresses and data must be given in hexadecimal.
Everything (including hex digits 'a'..'f') must
be in lower case.

EXAMPLE: change value of word with address 0xa0000000

nmon> d a0000000
00000000
nmon> w a0000000 12345678
nmon> d a0000000
12345678
nmon>

There is no error checking of any kind. If you
give an invalid address you will probably get
an exception which will hang the board and you
will have to press the reset button.

You can interrupt current command (e.g. you have
made error in input <addr> value) by pressing
the <ESC> key.

Signed-off-by Antony Pavlov <[email protected]>
---
 arch/mips/Kconfig                        |   46 +++++
 arch/mips/include/asm/debug_ll_ns16550.h |  100 ++++++++++-
 arch/mips/include/asm/pbl_nmon.h         |  270 ++++++++++++++++++++++++++++++
 3 files changed, 410 insertions(+), 6 deletions(-)
 create mode 100644 arch/mips/include/asm/pbl_nmon.h
arch/mips/Kconfig +46 -0
index 6179fd8..b2452c7 100644
@@ -245,6 +245,52 @@ config CMD_MIPS_CPUINFO
 	  Say yes here to get a cpuinfo command to show some
 	  information about the cpu model.
 
+config HAS_NMON
+	bool
+
+config NMON
+	bool "nmon"
+	depends on HAS_NMON
+	depends on DEBUG_LL
+	help
+	  Say yes here to add the nmon to pbl.
+	  nmon -- nano-monitor program for the MIPS processors.
+	  It can operate with NO working RAM, using only
+	  the processor registers.
+
+config NMON_USER_START
+	bool "'press any key to start nmon' dialog"
+	depends on NMON
+	help
+	  Say yes here to get the 'press any key to start nmon'
+	  dialog on start.
+
+config NMON_1S_DELAY
+	prompt "number of delay loops for 1s time interval"
+	depends on NMON_USER_START
+	hex
+	default 0x400000
+	help
+	nmon uses a very simple delay loop for time measurement.
+	The delay is CPU-dependent or even board-dependent.
+	The NMON_1S_DELAY parameter specify delay loop count
+	for near 1 second time interval.
+
+config NMON_USER_START_DELAY
+	prompt "'press any key to start nmon' dialog delay"
+	depends on NMON_USER_START
+	hex
+	default 3
+	help
+	  Select the delay interval for nmon 'press any key to start nmon' dialog.
+
+config NMON_HELP
+	bool "nmon help message"
+	depends on NMON
+	help
+	  Say yes here to get the nmon commands message on
+	  every nmon start.
+
 endmenu
 
 source common/Kconfig
arch/mips/include/asm/debug_ll_ns16550.h +94 -6

130 lines not on this page · raw message

arch/mips/include/asm/pbl_nmon.h new file +270 -0

270 lines not on this page · raw message

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1.7.10.4


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author
#2 lore raw

PATCH 2/3 MIPS: qemu-malta: rework debug_ll.h

In reply to Antony Pavlov
Signed-off-by Antony Pavlov <[email protected]>
---
 .../boards/qemu-malta/include/board/debug_ll.h     |   27 ++++++++++++++++++++
 arch/mips/boards/qemu-malta/init.c                 |    2 +-
 arch/mips/mach-malta/include/mach/debug_ll.h       |    9 +++----
 arch/mips/mach-malta/include/mach/hardware.h       |    4 +--
 4 files changed, 33 insertions(+), 9 deletions(-)
 create mode 100644 arch/mips/boards/qemu-malta/include/board/debug_ll.h
arch/mips/boards/qemu-malta/include/board/debug_ll.h new file +27 -0
new file mode 100644
index 0000000..1e56040
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2013 Antony Pavlov <[email protected]>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__
+#define __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__
+
+#include <mach/hardware.h>
+
+#define DEBUG_LL_UART_ADDR	MALTA_PIIX4_UART0
+#define DEBUG_LL_UART_SHIFT	0
+#define DEBUG_LL_UART_DIVISOR 1843200 /* no matter for emulated port */
+
+#endif /* __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__ */
arch/mips/boards/qemu-malta/init.c +1 -1
index db26b3b..f77fcad 100644
@@ -44,7 +44,7 @@ static struct NS16550_plat serial_plat = {
 static int malta_console_init(void)
 {
 	/* Register the serial port */
-	add_ns16550_device(DEVICE_ID_DYNAMIC, DEBUG_LL_UART_ADDR, 8,
+	add_ns16550_device(DEVICE_ID_DYNAMIC, MALTA_PIIX4_UART0, 8,
 			IORESOURCE_MEM_8BIT, &serial_plat);
 
 	return 0;
arch/mips/mach-malta/include/mach/debug_ll.h +4 -5
index 3e8b01b..c9e89bc 100644
@@ -18,11 +18,10 @@
 /** @file
  *  This File contains declaration for early output support
  */
-#ifndef __INCLUDE_ARCH_DEBUG_LL_H__
-#define   __INCLUDE_ARCH_DEBUG_LL_H__
-
-#include <mach/hardware.h>
+#ifndef __MACH_MALTA_DEBUG_LL_H__
+#define __MACH_MALTA_DEBUG_LL_H__
 
+#include <board/debug_ll.h>
 #include <asm/debug_ll_ns16550.h>
 
-#endif  /* __INCLUDE_ARCH_DEBUG_LL_H__ */
+#endif /* __MACH_MALTA_DEBUG_LL_H__ */
arch/mips/mach-malta/include/mach/hardware.h +1 -3
index 8bd814d..affb4ea 100644
@@ -18,9 +18,7 @@
 #ifndef __INCLUDE_ARCH_HARDWARE_H__
 #define   __INCLUDE_ARCH_HARDWARE_H__
 
-#define DEBUG_LL_UART_ADDR	0xb00003f8
-#define DEBUG_LL_UART_SHIFT	0
-#define DEBUG_LL_UART_DIVISOR	1	/* no matter for emulated port */
+#define MALTA_PIIX4_UART0	0xb00003f8
 
 /*
  * Reset register.
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author
#3 lore raw

PATCH 3/3 MIPS: qemu-malta: add nmon

In reply to Antony Pavlov
Signed-off-by Antony Pavlov <[email protected]>
---
 arch/mips/boards/qemu-malta/include/board/board_pbl_start.h |    3 +++
 arch/mips/mach-malta/Kconfig                                |    1 +
 2 files changed, 4 insertions(+)
arch/mips/boards/qemu-malta/include/board/board_pbl_start.h +3 -0
index 5b06770..bcd9789 100644
@@ -18,6 +18,7 @@
  */
 
 #include <asm/pbl_macros.h>
+#include <asm/pbl_nmon.h>
 
 	.macro	board_pbl_start
 	.set	push

@@ -28,6 +29,8 @@
 	/* cpu specific setup ... */
 	/* ... absent */
 
+	mips_nmon
+
 	copy_to_link_location	pbl_start
 
 	.set	pop
arch/mips/mach-malta/Kconfig +1 -0
index 1d291dc..67763f8 100644
@@ -11,6 +11,7 @@ config BOARD_QEMU_MALTA
 	bool "qemu malta"
 	select HAVE_PBL_IMAGE
 	select HAVE_IMAGE_COMPRESSION
+	select HAS_NMON
 
 endchoice
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Applied
#4 lore raw
In reply to Antony Pavlov
Quoted 7 lines · Antony Pavlov

nmon is a tiny monitor (<1200 bytes) program
for the MIPS processors.
It can operate with NO working RAM at all!
It uses only the processor registers and NS16550-compatible UART port for operation, so it can be used for a memory controller setup code debugging.

Quoted 6 lines

With no changes nmon should work on different MIPS processors as it uses only common MIPS-I instructions.

[PATCH 1/3] MIPS: pbl: add nmon MIPS nano-monitor [PATCH 2/3] MIPS: qemu-malta: rework debug_ll.h [PATCH 3/3] MIPS: qemu-malta: add nmon

Applied, thanks

Sascha

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