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socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

U-Boot New Chin Liang See 5 participants 8 messages Jun 27, 2013 – Jul 1, 2013 2 messages not in the archive

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#2 lore raw

socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)
(quoted diff) +0 -0

b/include/configs/socfpga_cyclone5.h
index 5633d2a..86563b7 100644

include/configs/socfpga_cyclone5.h +21 -7
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Running on virtual target or real hardware */ #define
+CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
 #define CONFIG_L2_OFF
@@ -32,11 +34,12 @@
 #define CONFIG_SINGLE_BOOTLOADER
 #define CONFIG_SOCFPGA
 
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_SYS_TEXT_BASE        0x08000040
-#define V_NS16550_CLK            1000000
-#define CONFIG_BAUDRATE            57600
-#define CONFIG_SYS_HZ            1000
-#define CONFIG_TIMER_CLOCK_KHZ        2400
+#else
+#define CONFIG_SYS_TEXT_BASE        0x01000040
+#endif
 #define CONFIG_SYS_LOAD_ADDR        0x7fc0
 
 /* Console I/O Buffer Size */
@@ -165,7 +168,7 @@
 /* SDRAM Bank #1 */
 #define CONFIG_SYS_SDRAM_BASE        0x00000000
 /* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE        0x80000000
+#define PHYS_SDRAM_1_SIZE        0x40000000
 
 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_START    0x00000000
@@ -181,8 +184,13 @@
 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 #define CONFIG_CONS_INDEX               1
 #define CONFIG_SYS_NS16550_COM1        UART0_BASE
-
 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK            1000000
+#else
+#define V_NS16550_CLK            100000000
+#endif
+#define CONFIG_BAUDRATE            115200
 
 /*
  * FLASH
@@ -195,9 +203,15 @@
 /* This timer use eosc1 where the clock frequency is fixed
  * throughout any condition */
 #define CONFIG_SYS_TIMERBASE        SOCFPGA_OSC1TIMER0_ADDRESS
-
 /* reload value when timer count to zero */
 #define TIMER_LOAD_VAL            0xFFFFFFFF
+/* Timer info */
+#define CONFIG_SYS_HZ            1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ        2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ        25000
+#endif
 
 #define CONFIG_ENV_IS_NOWHERE
 

--
1.7.7.4

Reviewed-by
#3 lore raw

Hi!

Quoted 14 lines

socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)
include/configs/socfpga_cyclone5.h +0 -0
index 5633d2a..86563b7 100644

include/configs/socfpga_cyclone5.h line 27

Quoted 6 lines
include/configs/socfpga_cyclone5.h +2 -0
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Running on virtual target or real hardware */ #define
+CONFIG_SOCFPGA_VIRTUAL_TARGET
 

Unfortunately, it came word-wrapped. Looks ok otherwise.

Thanks,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#4 lore raw

Hi Pavel,

Quoted 10 lines · ZY - pavel

Hi!

Quoted 8 lines

socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)
Quoted 14 lines

include/configs/socfpga_cyclone5.h line 27

Quoted 12 lines
include/configs/socfpga_cyclone5.h +2 -0
index 5633d2a..86563b7 100644
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Running on virtual target or real hardware */ #define
+CONFIG_SOCFPGA_VIRTUAL_TARGET
 

Unfortunately, it came word-wrapped. Looks ok otherwise.

Hmmm... seems the mail client did this when sending. I will resubmit this patch with new mail client. Thanks

Chin Liang

Quoted 5 lines

Thanks,
Pavel

#5 lore raw

Hi Chin Liang,

Quoted 23 lines · Chin Liang See
Quoted 8 lines
Quoted 8 lines

socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 files changed, 21 insertions(+), 7 deletions(-)
Quoted 14 lines

include/configs/socfpga_cyclone5.h line 27

Quoted 12 lines
include/configs/socfpga_cyclone5.h +2 -0
index 5633d2a..86563b7 100644
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Running on virtual target or real hardware */ #define
+CONFIG_SOCFPGA_VIRTUAL_TARGET
 

Unfortunately, it came word-wrapped. Looks ok otherwise.

Quoted 2 lines

Hmmm... seems the mail client did this when sending. I will resubmit this patch with new mail client.

It always recommended to use "git send-email" for patch submission.

Best regards,
Stefan

#6 lore raw

PATCH v2 1/1 socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

In reply to Pavel Machek

socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)
(quoted diff) +0 -0

b/include/configs/socfpga_cyclone5.h
index 5633d2a..be3799b 100644

include/configs/socfpga_cyclone5.h +8 -6
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Virtual target or real hardware */
+#define CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
 #define CONFIG_L2_OFF
@@ -32,11 +34,12 @@
 #define CONFIG_SINGLE_BOOTLOADER
 #define CONFIG_SOCFPGA
 
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_SYS_TEXT_BASE		0x08000040
-#define V_NS16550_CLK			1000000
-#define CONFIG_BAUDRATE			57600
-#define CONFIG_SYS_HZ			1000
-#define CONFIG_TIMER_CLOCK_KHZ		2400
+#else
+#define CONFIG_SYS_TEXT_BASE		0x01000040
+#endif
 #define CONFIG_SYS_LOAD_ADDR		0x7fc0
 
 /* Console I/O Buffer Size */
@@ -165,7 +168,7 @@
 /* SDRAM Bank #1 */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
 /* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE		0x80000000
+#define PHYS_SDRAM_1_SIZE		0x40000000
 
 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_START	0x00000000
@@ -181,8 +184,13 @@
 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 #define CONFIG_CONS_INDEX               1
 #define CONFIG_SYS_NS16550_COM1		UART0_BASE
-
 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,

115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK 1000000
+#else
+#define V_NS16550_CLK 100000000
+#endif
+#define CONFIG_BAUDRATE 115200

/*
* FLASH
@@ -195,9 +203,15 @@
/* This timer use eosc1 where the clock frequency is fixed
* throughout any condition */
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
-
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL 0xFFFFFFFF
+/* Timer info */
+#define CONFIG_SYS_HZ 1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ 25000
+#endif

#define CONFIG_ENV_IS_NOWHERE

Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v2 1/1 socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

Dear Chin Liang See,

Quoted 2 lines · In message <[email protected]> you wrote:

socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit

Please keep the Subject SHORT - it should be 50 characters or less!

And please do not repeat the Subject in the commit messgae - this is redundant and thus makes no sense.

Chose a short and descriptive Subject, and provide prosa in the commit mesage.

Thanks!!

Wolfgang Denk

Signature · 8 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The alternative to genuflecting before the  god  of  code-bumming  is
finding  a  better  algorithm.  It should be clear that none such was
available. If your code is too slow, you must make it faster.  If  no
better algorithm is available, you must trim cycles.
                                 - td at alice.UUCP (Tom Duff) 29 Aug 88
#8 lore raw

PATCH v2 1/1 socfpga: Separating the configuration file for Virtual Target and real hardware Cyclone V development kit

Hi Wolfgang,

Quoted 6 lines · ZY - wd

Dear Chin Liang See,

Quoted 2 lines · In message <[email protected]> you wrote:

socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit

Quoted 8 lines

Please keep the Subject SHORT - it should be 50 characters or less!

And please do not repeat the Subject in the commit messgae - this is redundant and thus makes no sense.

Chose a short and descriptive Subject, and provide prosa in the commit mesage.

Noted with thanks.
Let me fix it on next revision

Chin Liang

Quoted 5 lines

Thanks!!

Wolfgang Denk

#9 lore raw

PATCH v3 1/1 socfpga: Adding configuration for development kit

In reply to Wolfgang Denk

socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit

---
 include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)
(quoted diff) +0 -0

b/include/configs/socfpga_cyclone5.h
index 5633d2a..be3799b 100644

include/configs/socfpga_cyclone5.h +8 -6
@@ -22,6 +22,8 @@
 /*
  * High level configuration
  */
+/* Virtual target or real hardware */
+#define CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
 #define CONFIG_L2_OFF
@@ -32,11 +34,12 @@
 #define CONFIG_SINGLE_BOOTLOADER
 #define CONFIG_SOCFPGA
 
+/* base address for .text section */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_SYS_TEXT_BASE		0x08000040
-#define V_NS16550_CLK			1000000
-#define CONFIG_BAUDRATE			57600
-#define CONFIG_SYS_HZ			1000
-#define CONFIG_TIMER_CLOCK_KHZ		2400
+#else
+#define CONFIG_SYS_TEXT_BASE		0x01000040
+#endif
 #define CONFIG_SYS_LOAD_ADDR		0x7fc0
 
 /* Console I/O Buffer Size */
@@ -165,7 +168,7 @@
 /* SDRAM Bank #1 */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
 /* SDRAM memory size */
-#define PHYS_SDRAM_1_SIZE		0x80000000
+#define PHYS_SDRAM_1_SIZE		0x40000000
 
 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_START	0x00000000
@@ -181,8 +184,13 @@
 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 #define CONFIG_CONS_INDEX               1
 #define CONFIG_SYS_NS16550_COM1		UART0_BASE
-
 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,

115200}
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define V_NS16550_CLK 1000000
+#else
+#define V_NS16550_CLK 100000000
+#endif
+#define CONFIG_BAUDRATE 115200

/*
* FLASH
@@ -195,9 +203,15 @@
/* This timer use eosc1 where the clock frequency is fixed
* throughout any condition */
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
-
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL 0xFFFFFFFF
+/* Timer info */
+#define CONFIG_SYS_HZ 1000
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_TIMER_CLOCK_KHZ 2400
+#else
+#define CONFIG_TIMER_CLOCK_KHZ 25000
+#endif

#define CONFIG_ENV_IS_NOWHERE

Signature · 1 line
1.7.9.5