ARM: LPAE: don't reject mapping /dev/mem above 4GB
PATCH v2 1/1 ARM: LPAE: don't reject mapping /dev/mem above 4GB
With LPAE enabled, physical address space is larger than 4GB. Allow mapping any part of it via /dev/mem by utilizing the same check as in arm64.
PHYS_MASK covers 40 bits with LPAE enabled and 32 bits otherwise.
---
v2:
- Removed #ifdef and changed original function as suggested by Catalin Marinas
arch/arm/mm/mmap.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
arch/arm/mm/mmap.c +2 -4
@@ -204,13 +204,11 @@ int valid_phys_addr_range(phys_addr_t addr, size_t size) }/* -* We don't use supersection mappings for mmap() on /dev/mem, which -* means that we can't map the memory area above the 4G barrier into -* userspace. +* Do not allow /dev/mem mappings beyond the supported physical range. */ int valid_mmap_phys_addr_range (unsigned long pfn,size_t size) { -return !(pfn + (size >>PAGE_SHIFT ) >0x00100000 ); +return !(((pfn <<PAGE_SHIFT ) + size) & ~PHYS_MASK ); }#ifdef CONFIG_STRICT_DEVMEM
Signature · 1 line
1.8.1.2
PATCH v2 1/1 ARM: LPAE: don't reject mapping /dev/mem above 4GB
Quoted 21 lines · Sergey Dyasly
With LPAE enabled, physical address space is larger than 4GB. Allow mapping any part of it via
/dev/memby utilizing the same check as in arm64.
PHYS_MASKcovers 40 bits with LPAE enabled and 32 bits otherwise.Signed-off-by Sergey Dyasly <[email protected]>---
v2:
- Removed #ifdef and changed original function as suggested by Catalin Marinasarch/arm/mm/mmap.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)arch/arm/mm/mmap.c +0
-0@@ -204,13 +204,11 @@ int valid_phys_addr_range(phys_addr_t addr, size_t size) }
arch/arm/mm/mmap.c int valid_phys_addr_range(phys_addr_t addr, size_t size) · line 211
Quoted 10 lines
arch/arm/mm/mmap.c +2
-4/* -* We don't use supersection mappings for mmap() on /dev/mem, which -* means that we can't map the memory area above the 4G barrier into -* userspace. +* Do not allow /dev/mem mappings beyond the supported physical range. */ int valid_mmap_phys_addr_range (unsigned long pfn,size_t size) { -return !(pfn + (size >>PAGE_SHIFT ) >0x00100000 ); +return !(((pfn <<PAGE_SHIFT ) + size) & ~PHYS_MASK );
I don't think that's what I suggested. For classic MMU ~PHYS_MASK is 0.
Signature · 1 line
Catalin
PATCH v2 1/1 ARM: LPAE: don't reject mapping /dev/mem above 4GB
Quoted 7 lines · On Tue, 2 Jul 2013 18:15:31 +0100 Catalin Marinas <[email protected]>…
arch/arm/mm/mmap.c int valid_phys_addr_range(phys_addr_t addr, size_t size) · line 211
Quoted 4 lines
int
valid_mmap_phys_addr_range(unsigned long pfn, size_t size){arch/arm/mm/mmap.c +1
-1-return !(pfn + (size >>PAGE_SHIFT ) >0x00100000 ); +return !(((pfn <<PAGE_SHIFT ) + size) & ~PHYS_MASK );I don't think that's what I suggested. For classic MMU ~PHYS_MASK is 0.
Thanks for your comments!
Indeed, I did some testing today and v2 check doesn't work at all because of 32-bit overflow in case of using '<<' operator. Also, it turned out that v1 doesn't reject mappings > 40 bit in case of LPAE (the same overflow).
I didn't want to additionally define PHYS_MASK_SHIFT, so I came up with something like:
return (pfn + (size >> PAGE_SHIFT)) <= (1 + (PHYS_MASK >> PAGE_SHIFT))
I will post v3 tomorrow.
Best regards,
Sergey Dyasly