powerpc/c29xpcie: add support for C29XPCIE board

PATCH New Po Liu 3 participants 4 messages Jul 3, 2013 – Jul 4, 2013

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Po Liu

author

2013-07-03 08:38 UTC #0 lore raw

PATCH v4 1/1 powerpc/c29xpcie: add support for C29XPCIE board

From: Mingkai Hu <[email protected]>

C29XPCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. It includes C293PCIE board, C293PCIE board and C291PCIE board.

- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash

Signed-off-by Mingkai Hu <[email protected]>

Singed-off-by Po Liu <[email protected]>

---
Base on the patch [PATCH 1/2 v3] powerpc/85xx: Add C29x SoC support Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293, replace with CONFIG_C29X
- Adjust the TLB config mode
- Add SEC node removal method by check the CPU SVR
- Clean up the C29XPCIE.h file
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
Changes for v4:
- Clean up comments in tlb.c
- Change NAND flash TLB and LAW size to 16KB
- Modify flash tlb mode in c29xpcie.c
- Change cpld.h and cpld.c code for read/write cpld register
- Continue clean up the C29XPCIE.h file

 board/freescale/c29xpcie/Makefile   |  34 +++
 board/freescale/c29xpcie/c29xpcie.c | 151 ++++++++++++
 board/freescale/c29xpcie/cpld.c     | 134 ++++++++++
 board/freescale/c29xpcie/cpld.h     |  43 ++++
 board/freescale/c29xpcie/ddr.c      |  89 +++++++
 board/freescale/c29xpcie/law.c      |  22 ++
 board/freescale/c29xpcie/tlb.c      |  83 +++++++
 boards.cfg                          |   2 +
 include/configs/C29XPCIE.h          | 475 ++++++++++++++++++++++++++++++++++++
 9 files changed, 1033 insertions(+)
 create mode 100644 board/freescale/c29xpcie/Makefile
 create mode 100644 board/freescale/c29xpcie/c29xpcie.c
 create mode 100644 board/freescale/c29xpcie/cpld.c
 create mode 100644 board/freescale/c29xpcie/cpld.h
 create mode 100644 board/freescale/c29xpcie/ddr.c
 create mode 100644 board/freescale/c29xpcie/law.c
 create mode 100644 board/freescale/c29xpcie/tlb.c
 create mode 100644 include/configs/C29XPCIE.h

board/freescale/c29xpcie/Makefile new file +34 -0

new file mode 100644
index 0000000..15bef9a
@@ -0,0 +1,34 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= cpld.o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/freescale/c29xpcie/c29xpcie.c new file +151 -0

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board/freescale/c29xpcie/cpld.c new file +134 -0

134 lines not on this page · raw message

board/freescale/c29xpcie/cpld.h new file +43 -0

43 lines not on this page · raw message

board/freescale/c29xpcie/ddr.c new file +89 -0

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board/freescale/c29xpcie/law.c new file +22 -0

new file mode 100644
index 0000000..10a2fbf
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
+					LAW_TRGT_IF_PLATFORM_SRAM),
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);

board/freescale/c29xpcie/tlb.c new file +83 -0

83 lines not on this page · raw message

boards.cfg +2 -0

index c0c4282..4c68e9f 100644
@@ -771,6 +771,8 @@ MPC8569MDS_NAND              powerpc     mpc85xx     mpc8569mds          freesca
 MPC8572DS                    powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS
 MPC8572DS_36BIT              powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:36BIT
 MPC8572DS_NAND               powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:NAND
+C29XPCIE                     powerpc     mpc85xx     c29xpcie            freescale      -           C29XPCIE:C29XPCIE,36BIT
+C29XPCIE_SPIFLASH            powerpc     mpc85xx     c29xpcie            freescale      -           C29XPCIE:C29XPCIE,36BIT,SPIFLASH
 P1010RDB_36BIT_NAND          powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND
 P1010RDB_36BIT_NAND_SECBOOT  powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT
 P1010RDB_36BIT_NOR           powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT

include/configs/C29XPCIE.h new file +475 -0

475 lines not on this page · raw message

Signature · 1 line

1.8.0

Wolfgang Denk

2013-07-03 11:14 UTC #1 lore raw

PATCH v4 1/1 powerpc/c29xpcie: add support for C29XPCIE board

Dear Po Liu,

Quoted 5 lines · In message <[email protected]> you wrote:

From: Mingkai Hu <[email protected]>
C29XPCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. It includes C293PCIE board, C293PCIE board and C291PCIE board.

Why don't you keep thread information so we can easily look up previous review comments? This is a mandatory requirement when resubmitting patches - see bullet # 3 at [1]

Quoted 10 lines

 board/freescale/c29xpcie/Makefile   |  34 +++
 board/freescale/c29xpcie/c29xpcie.c | 151 ++++++++++++
 board/freescale/c29xpcie/cpld.c     | 134 ++++++++++
 board/freescale/c29xpcie/cpld.h     |  43 ++++
 board/freescale/c29xpcie/ddr.c      |  89 +++++++
 board/freescale/c29xpcie/law.c      |  22 ++
 board/freescale/c29xpcie/tlb.c      |  83 +++++++
 boards.cfg                          |   2 +
 include/configs/C29XPCIE.h          | 475 ++++++++++++++++++++++++++++++++++++
 9 files changed, 1033 insertions(+)

Quoted 8 lines

 create mode 100644 board/freescale/c29xpcie/Makefile
 create mode 100644 board/freescale/c29xpcie/c29xpcie.c
 create mode 100644 board/freescale/c29xpcie/cpld.c
 create mode 100644 board/freescale/c29xpcie/cpld.h
 create mode 100644 board/freescale/c29xpcie/ddr.c
 create mode 100644 board/freescale/c29xpcie/law.c
 create mode 100644 board/freescale/c29xpcie/tlb.c
 create mode 100644 include/configs/C29XPCIE.h

Why do you ignore review comments (see [2]) ?

You still fail to add a MAINTAINERS entry!

[1] http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
[2] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/164730

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
In the beginning, there was nothing, which exploded.
                                - Terry Pratchett, _Lords and Ladies_

Scott Wood

2013-07-03 19:00 UTC #2 lore raw

PATCH v4 1/1 powerpc/c29xpcie: add support for C29XPCIE board

In reply to Po Liu

board/freescale/c29xpcie/tlb.c line 34

Quoted 4 lines · Po Liu

board/freescale/c29xpcie/tlb.c new file +4 -0

+	/* TLB 1 */
+	SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
+			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+			0, 0, BOOKE_PAGESZ_4K, 1),

Again, does this ever get used? Could you try removing it and seeing what happens?

I suspect it is no longer used since the change to a cacheable spintable.

include/configs/C29XPCIE.h line 273

Quoted 6 lines

include/configs/C29XPCIE.h new file +6 -0

+#if defined(CONFIG_RAMBOOT_SPIFLASH)
+#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#else
+#undef CONFIG_SYS_RAMBOOT
+#endif

When was CONFIG_SYS_RAMBOOT defined before, such that you need to undef it here?

Quoted 23 lines

include/configs/C29XPCIE.h new file +8 -0

+#define CONFIG_BOARD_EARLY_INIT_R
+
+#define CONFIG_SYS_INIT_RAM_LOCK
+#define CONFIG_SYS_INIT_RAM_ADDR	0xffd00000
+#define CONFIG_SYS_INIT_RAM_END		0x00004000
+
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END \
+						-

GENERATED_GBL_DATA_SIZE)

include/configs/C29XPCIE.h new file +14 -0

+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+
+/* Serial Port */
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
+
+#define CONFIG_SERIAL_MULTI		/* Enable both serial ports */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV

include/configs/C29XPCIE.h line 306

Quoted 10 lines

include/configs/C29XPCIE.h new file +10 -0

+
+#define CONFIG_SYS_BAUDRATE_TABLE	\
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CCSRBAR+0x4500)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
+
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "

Again, we don't need to define CONFIG_SYS_PROMPT_HUSH_PS2. This is already the default, and the commit that added it as the default seemed to suggest that defining it in board config files at all was to be deprecated.

If I'm missing something, or you have some specific reason for continuing to leave it in, or I'm being unclear, please answer with that, rather than just ignoring feedback.

Quoted 1 line

+#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */

Please consider setting this to -1, now that it no longer disables compiling the auto-boot code.

-Scott

Po Liu

author

2013-07-04 09:33 UTC #3 lore raw

PATCH v5 2/2 powerpc/c29xpcie: add support for C29XPCIE board

In reply to Po Liu

From: Mingkai Hu <[email protected]>

C29XPCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. It includes C293PCIE board, C293PCIE board and C291PCIE board.

- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash

Signed-off-by Mingkai Hu <[email protected]>

Singed-off-by Po Liu <[email protected]>

---
Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293, replace with CONFIG_C29X
- Adjust the TLB config mode
- Add SEC node removal method by check the CPU SVR
- Clean up the C29XPCIE.h file
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
Changes for v4:
- Clean up comments in tlb.c
- Change NAND flash TLB and LAW size to 16KB
- Modify flash tlb mode in c29xpcie.c
- Change cpld.h and cpld.c code for read/write cpld register
- Continue clean up the C29XPCIE.h file
Changes for v5:
- Add C29XPCIE board to MAINTAINERS
- Clean up the C29XPCIE.h file
a. Remove #undef CONFIG_SYS_RAMBOOT
b. Remove #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " c. Modify CONFIG_BOOTDELAY to -1
- Remove 0xfffff000 LAW in tlb.c

 MAINTAINERS                         |   4 +
 board/freescale/c29xpcie/Makefile   |  34 +++
 board/freescale/c29xpcie/c29xpcie.c | 151 ++++++++++++
 board/freescale/c29xpcie/cpld.c     | 134 ++++++++++
 board/freescale/c29xpcie/cpld.h     |  43 ++++
 board/freescale/c29xpcie/ddr.c      |  89 +++++++
 board/freescale/c29xpcie/law.c      |  22 ++
 board/freescale/c29xpcie/tlb.c      |  79 ++++++
 boards.cfg                          |   2 +
 include/configs/C29XPCIE.h          | 472 ++++++++++++++++++++++++++++++++++++
 10 files changed, 1030 insertions(+)
 create mode 100644 board/freescale/c29xpcie/Makefile
 create mode 100644 board/freescale/c29xpcie/c29xpcie.c
 create mode 100644 board/freescale/c29xpcie/cpld.c
 create mode 100644 board/freescale/c29xpcie/cpld.h
 create mode 100644 board/freescale/c29xpcie/ddr.c
 create mode 100644 board/freescale/c29xpcie/law.c
 create mode 100644 board/freescale/c29xpcie/tlb.c
 create mode 100644 include/configs/C29XPCIE.h

MAINTAINERS +4 -0

index 7820375..26fc123 100644
@@ -538,6 +538,10 @@ Detlev Zundel <[email protected]>
 
 	inka4x0		MPC5200
 
+Po Liu <[email protected]>
+
+	C29XPCIE	C29X
+
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:

board/freescale/c29xpcie/Makefile new file +34 -0

new file mode 100644
index 0000000..15bef9a
@@ -0,0 +1,34 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-y	+= $(BOARD).o
+COBJS-y	+= cpld.o
+COBJS-y	+= ddr.o
+COBJS-y	+= law.o
+COBJS-y	+= tlb.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/freescale/c29xpcie/c29xpcie.c new file +151 -0

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board/freescale/c29xpcie/cpld.c new file +134 -0

134 lines not on this page · raw message

board/freescale/c29xpcie/cpld.h new file +43 -0

43 lines not on this page · raw message

board/freescale/c29xpcie/ddr.c new file +89 -0

89 lines not on this page · raw message

board/freescale/c29xpcie/law.c new file +22 -0

new file mode 100644
index 0000000..10a2fbf
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
+					LAW_TRGT_IF_PLATFORM_SRAM),
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);

board/freescale/c29xpcie/tlb.c new file +79 -0

79 lines not on this page · raw message

boards.cfg +2 -0

index c0c4282..4c68e9f 100644
@@ -771,6 +771,8 @@ MPC8569MDS_NAND              powerpc     mpc85xx     mpc8569mds          freesca
 MPC8572DS                    powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS
 MPC8572DS_36BIT              powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:36BIT
 MPC8572DS_NAND               powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:NAND
+C29XPCIE                     powerpc     mpc85xx     c29xpcie            freescale      -           C29XPCIE:C29XPCIE,36BIT
+C29XPCIE_SPIFLASH            powerpc     mpc85xx     c29xpcie            freescale      -           C29XPCIE:C29XPCIE,36BIT,SPIFLASH
 P1010RDB_36BIT_NAND          powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND
 P1010RDB_36BIT_NAND_SECBOOT  powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT
 P1010RDB_36BIT_NOR           powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT

include/configs/C29XPCIE.h new file +472 -0

472 lines not on this page · raw message

Signature · 1 line

1.8.0