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ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

PATCH New Fabio Estevam 5 participants 5 messages Jul 8, 2013 – Jul 12, 2013 Arm (32-bit)

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#0 lore raw

PATCH 1/1 ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

From: Fabio Estevam <[email protected]>

imx_v6_v7_defconfig handles both multi-core and single-core SoCs, and it has CONFIG_SMP=y selected by default.

With such config we cannot select ARM_ERRATA_364296, as it depends on !SMP.

Let ARM_ERRATA_364296 be undependent on CONFIG_SMP, so that we can select this erratum for the ARM1136 SoCs, even if CONFIG_SMP=y is enabled.

---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/Kconfig +1 -1
index 0ac9be6..ba412e0 100644
@@ -1316,7 +1316,7 @@ config ARM_ERRATA_754327
 
 config ARM_ERRATA_364296
 	bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
-	depends on CPU_V6 && !SMP
+	depends on CPU_V6
 	help
 	  This options enables the workaround for the 364296 ARM1136
 	  r0p2 erratum (possible cache data corruption with
Signature · 1 line
1.8.1.2
#1 lore raw

PATCH 1/1 ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

Quoted 9 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

imx_v6_v7_defconfig handles both multi-core and single-core SoCs, and it has CONFIG_SMP=y selected by default.

With such config we cannot select ARM_ERRATA_364296, as it depends on !SMP.

Let ARM_ERRATA_364296 be undependent on CONFIG_SMP, so that we can select this erratum for the ARM1136 SoCs, even if CONFIG_SMP=y is enabled.

I'll wait for ARM Ltd folk to comment on this (they're at Linaro Connect at the moment which has extremely poor 'net connectivity from what I've been hearing). We might need to bypass the workaround code in the non-SMP case.

#2 lore raw

PATCH 1/1 ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

Quoted 8 lines · Russell King - ARM Linux
Quoted 7 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

imx_v6_v7_defconfig handles both multi-core and single-core SoCs, and it has CONFIG_SMP=y selected by default.

With such config we cannot select ARM_ERRATA_364296, as it depends on !SMP.

Quoted 7 lines
Quoted 2 lines

Let ARM_ERRATA_364296 be undependent on CONFIG_SMP, so that we can select this erratum for the ARM1136 SoCs, even if CONFIG_SMP=y is enabled.

I'll wait for ARM Ltd folk to comment on this (they're at Linaro Connect at the moment which has extremely poor 'net connectivity from what I've been hearing). We might need to bypass the workaround code in the non-SMP case.

The workaround (in proc-v6.S) checks the midr specifically for 1136 r0p2, so it should be fine to remove the CONFIG_SMP dependency given that the 1136 is UP only.

Will

#3 lore raw

PATCH 1/1 ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

In reply to Fabio Estevam
Quoted 11 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

imx_v6_v7_defconfig handles both multi-core and single-core SoCs, and it has CONFIG_SMP=y selected by default.

With such config we cannot select ARM_ERRATA_364296, as it depends on !SMP.

Let ARM_ERRATA_364296 be undependent on CONFIG_SMP, so that we can select this erratum for the ARM1136 SoCs, even if CONFIG_SMP=y is enabled.

This looks sensible. The enabled code checks for the specific affected CPU ID in the CP15 Main ID Register, so it shouldn't get activated on any other kind of CPU even if the option is enabled.

1136 can't be deployed as SMP, so the patch shouldn't break any existing configuration.

Strictly speaking, && !SMP may be incorrect, since it is valid (if not very useful) to build a v6 kernel with SMP and SMP_ON_UP, and run it on 1136 hardware, even if the kernel is non-multiplatform.

Quoted 25 lines
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/Kconfig +1 -1
index 0ac9be6..ba412e0 100644
@@ -1316,7 +1316,7 @@ config ARM_ERRATA_754327
 
 config ARM_ERRATA_364296
 	bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
-	depends on CPU_V6 && !SMP
+	depends on CPU_V6
 	help
 	  This options enables the workaround for the 364296 ARM1136
 	  r0p2 erratum (possible cache data corruption with
Signature · 7 lines
1.8.1.2


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#4 lore raw

PATCH 1/1 ARM: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP

In reply to Fabio Estevam
Quoted 11 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

imx_v6_v7_defconfig handles both multi-core and single-core SoCs, and it has CONFIG_SMP=y selected by default.

With such config we cannot select ARM_ERRATA_364296, as it depends on !SMP.

Let ARM_ERRATA_364296 be undependent on CONFIG_SMP, so that we can select this erratum for the ARM1136 SoCs, even if CONFIG_SMP=y is enabled.

I've just seen the patch (long email backlog).