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powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

PATCH Superseded ying.zhang at freescale.com 2 participants 8 messages Jul 9, 2013 – Jul 12, 2013

Subsystems (5)
PowerPC Kbuild Memory technology devices (MTD) MMC, SD and SDIO +1 more subsystems

v7 of 11 Superseded Latest is v11 →

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ying.zhang at freescale.com

author
#0 lore raw

PATCH v7 1/7 powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

From: Ying Zhang <[email protected]>

1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- No change.
Change from v5:
- No change.
Change from v4:
- Use !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)
- to replace to new symbols.
Change from v3:
- Give up new symbol and delete the line
- ifndef CONFIG_SPL_BUILD in common/env_common.c
Change from v2:
- Split from "Add the symbol for the minimal SPL used to eliminate unused
- code"
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 arch/powerpc/cpu/mpc85xx/tlb.c |    3 ++-
 arch/powerpc/cpu/mpc8xxx/law.c |    6 ++++--
 include/configs/MPC8313ERDB.h  |    1 -
 include/configs/P1022DS.h      |    1 -
 include/configs/p1_p2_rdb_pc.h |    1 -
 5 files changed, 6 insertions(+), 6 deletions(-)
arch/powerpc/cpu/mpc85xx/tlb.c +2 -1
index 0dff37f..b903d02 100644
@@ -55,7 +55,8 @@ void init_tlbs(void)
 	return ;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 		       phys_addr_t *rpn)
 {
arch/powerpc/cpu/mpc8xxx/law.c +4 -2
index 6f9d568..6c0a307 100644
@@ -92,7 +92,8 @@ void disable_law(u8 idx)
 	return;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 static int get_law_entry(u8 i, struct law_entry *e)
 {
 	u32 lawar;

@@ -122,7 +123,8 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 	return idx;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
 	u32 idx;
include/configs/MPC8313ERDB.h +0 -1
index 1d753e7..0c15195 100644
@@ -40,7 +40,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
 #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
include/configs/P1022DS.h +0 -1
index 9c27182..bcbda30 100644
@@ -41,7 +41,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
include/configs/p1_p2_rdb_pc.h +0 -1
index 2fa5372..b35b966 100644
@@ -159,7 +159,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
Signature · 1 line
1.7.0.4
author
#1 lore raw

PATCH v7 2/7 powerpc: mpc85xx: Support booting from SD Card with SPL

From: Ying Zhang <[email protected]>

This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.

This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- Split to the patch "Support booting from SD Card with SPL" and the patch
- "Enable P1022DS to boot from SD Card with SPL". this patch only support
- booting from SD Card with SPL
Change from v5:
- Add new symbol CONFIG_SPL_ENV_IMPORT for contain the functionality
- env_import.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 README                                             |    4 +
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds            |    5 +
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c        |    4 +
 doc/README.mpc85xx-sd-spi-boot                     |   81 ++++++++++++
 drivers/mmc/Makefile                               |    3 +
 drivers/mmc/fsl_esdhc_spl.c                        |  131 ++++++++++++++++++++
 drivers/mmc/mmc.c                                  |    2 +
 include/fsl_esdhc.h                                |    1 +
 spl/Makefile                                       |    3 +
 9 files changed, 234 insertions(+), 0 deletions(-)
 create mode 100644 doc/README.mpc85xx-sd-spi-boot
 create mode 100644 drivers/mmc/fsl_esdhc_spl.c
README +4 -0
index 85e5a8d..9543749 100644
@@ -3023,6 +3023,10 @@ FIT uImage format:
 		Support for NAND boot using simple NAND drivers that
 		expose the cmd_ctrl() interface.
 
+		CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+		Set for the SPL on PPC mpc8xxx targets, support for
+		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +5 -0
index 20284ed..8aeb1a0 100644
@@ -60,6 +60,11 @@ SECTIONS
 	}
 	_edata  =  .;
 
+	. = .;
+	__start___ex_table = .;
+	__ex_table : { *(__ex_table) }
+	__stop___ex_table = .;
+
 	. = ALIGN(8);
 	__init_begin = .;
 	__init_end = .;
arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +4 -0
index e958e13..56128a7 100644
@@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 		if (dimm_params[i].n_ranks) {
 			if (dimm_params[i].registered_dimm) {
 				temp1 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected RDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			} else {
 				temp2 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected UDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			}
 		}
 	}
doc/README.mpc85xx-sd-spi-boot new file +81 -0

81 lines not on this page · raw message

drivers/mmc/Makefile +3 -0
index 24648a2..7e1628b 100644
@@ -48,6 +48,9 @@ COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
 COBJS-$(CONFIG_DWMMC) += dw_mmc.o
 COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
 COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+ifdef CONFIG_SPL_BUILD
+COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+endif
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
drivers/mmc/fsl_esdhc_spl.c new file +131 -0

131 lines not on this page · raw message

drivers/mmc/mmc.c +2 -0
index 73f7195..a9ada1f 100644
@@ -1499,7 +1499,9 @@ int mmc_initialize(bd_t *bis)
 	if (board_mmc_init(bis) < 0)
 		cpu_mmc_init(bis);
 
+#ifndef CONFIG_SPL_BUILD
 	print_mmc_devices(',');
+#endif
 
 	do_preinit();
 	return 0;
include/fsl_esdhc.h +1 -0
index 67d6057..b17c424 100644
@@ -198,5 +198,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd);
 static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
 static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
 #endif /* CONFIG_FSL_ESDHC */
+void mmc_boot(void);
 
 #endif  /* __FSL_ESDHC_H__ */
spl/Makefile +3 -0
index 01873de..eef8c87 100644
@@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
+endif
 endif
 ifeq ($(CPU),mpc86xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
Signature · 1 line
1.7.0.4
author
#2 lore raw

PATCH v7 3/7 powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Enable p1022ds to start from eSDHC with SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- Split from the patch "powerpc/p1022ds: boot from SD Card with SPL",
- this patch only enables p1022ds to boot from SD Card with SPL. Change from v5:
- No change.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- No change.

 README                           |    4 ++
 board/freescale/common/Makefile  |    2 -
 board/freescale/p1022ds/Makefile |    3 +
 board/freescale/p1022ds/spl.c    |  111 ++++++++++++++++++++++++++++++++++++++
 board/freescale/p1022ds/tlb.c    |    9 +++-
 include/configs/P1022DS.h        |   54 ++++++++++++++++---
 6 files changed, 173 insertions(+), 10 deletions(-)
 create mode 100644 board/freescale/p1022ds/spl.c
README +4 -0
index 9543749..5872b5e 100644
@@ -3027,6 +3027,10 @@ FIT uImage format:
 		Set for the SPL on PPC mpc8xxx targets, support for
 		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
 
+		CONFIG_SPL_COMMON_INIT_DDR
+		Set for common ddr init with serial presence detect in
+		SPL binary.
+
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
board/freescale/common/Makefile +0 -2
index 37236d0..e991def 100644
@@ -61,9 +61,7 @@ COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
 COBJS-$(CONFIG_MPC8536DS)	+= ics307_clk.o
 COBJS-$(CONFIG_MPC8572DS)	+= ics307_clk.o
-ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_P1022DS)		+= ics307_clk.o
-endif
 COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P3041DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P4080DS)		+= ics307_clk.o
board/freescale/p1022ds/Makefile +3 -0
index 0eeef05..9746063 100644
@@ -24,6 +24,9 @@ ifdef MINIMAL
 COBJS-y        += spl_minimal.o tlb.o law.o
 
 else
+ifdef CONFIG_SPL_BUILD
+COBJS-y += spl.o
+endif
 COBJS-y	+= $(BOARD).o
 COBJS-y	+= ddr.o
 COBJS-y	+= law.o
board/freescale/p1022ds/spl.c new file +111 -0

111 lines not on this page · raw message

board/freescale/p1022ds/tlb.c +8 -1
index 3acc449..9b14c37 100644
@@ -74,7 +74,8 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 7, BOOKE_PAGESZ_4K, 1),
 
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+#if defined(CONFIG_SYS_RAMBOOT) || \
+	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
 	/* **** - eSDHC/eSPI/NAND boot */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
 			MAS3_SX|MAS3_SW|MAS3_SR, 0,

@@ -93,6 +94,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
 			0, 10, BOOKE_PAGESZ_16K, 1),
 #endif
 
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+	/* *I*G - L2SRAM */
+	SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+			0, 11, BOOKE_PAGESZ_256K, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);
include/configs/P1022DS.h +47 -7

79 lines not on this page · raw message

Signature · 1 line
1.7.0.4
author
#3 lore raw

PATCH v7 4/7 powerpc : spi flash : Support to start from eSPI with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- No change.
Change from v5:
- Split from "powerpc/p1022ds: boot from spi flash with SPL"
- this patch add the capability starting from eSPI with SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 drivers/mtd/spi/Makefile       |    1 +
 drivers/mtd/spi/fsl_espi_spl.c |   78 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c    |    2 +
 3 files changed, 81 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/spi/fsl_espi_spl.c
drivers/mtd/spi/Makefile +1 -0
index ecbb210..39e4e1d 100644
@@ -27,6 +27,7 @@ LIB	:= $(obj)libspi_flash.o
 
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)	+= spi_spl_load.o
+COBJS-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
 endif
 
 COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash.o
drivers/mtd/spi/fsl_espi_spl.c new file +78 -0

78 lines not on this page · raw message

drivers/mtd/spi/spi_flash.c +2 -0
index 6a6fe37..e474f5c 100644
@@ -554,12 +554,14 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 	}
 #endif
+#ifndef CONFIG_SPL_BUILD
 	printf("SF: Detected %s with page size ", flash->name);
 	print_size(flash->sector_size, ", total ");
 	print_size(flash->size, "");
 	if (flash->memory_map)
 		printf(", mapped at %p", flash->memory_map);
 	puts("\n");
+#endif
 #ifndef CONFIG_SPI_FLASH_BAR
 	if (flash->size > SPI_FLASH_16MB_BOUN) {
 		puts("SF: Warning - Only lower 16MiB accessible,");
Signature · 1 line
1.7.0.4
author
#4 lore raw

PATCH v7 5/7 powerpc : p1022ds : enable p1022ds to start from eSPI with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Enable p1022ds to start from eSPI with SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- No longer changes the header file included by the file
- "board/freescale/p1022ds/spl.c"
Change from v5:
- Split from "powerpc/p1022ds: boot from spi flash with SPL"
- this patch enable P1022DS to start from eSPI with SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 board/freescale/p1022ds/spl.c |   10 ++++++++++
 include/configs/P1022DS.h     |   36 +++++++++++++++++++++++++++++-------
 2 files changed, 39 insertions(+), 7 deletions(-)
board/freescale/p1022ds/spl.c +10 -0
index 9927671..b6669f3 100644
@@ -27,6 +27,7 @@
 #include <i2c.h>
 #include "../common/ngpixis.h"
 #include <fsl_esdhc.h>
+#include <spi_flash.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -53,6 +54,11 @@ void board_init_f(ulong bootflag)
 	setbits_be32(&gur->pmuxcr,
 		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
 
+#ifdef CONFIG_SPL_SPI_BOOT
+	/* Enable the SPI */
+	clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
+#endif
+
 	/* Read back the register to synchronize the write. */
 	in_be32(&gur->pmuxcr);
 

@@ -66,6 +72,8 @@ void board_init_f(ulong bootflag)
 			bus_clk / 16 / CONFIG_BAUDRATE);
 #ifdef CONFIG_SPL_MMC_BOOT
 	puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	puts("\nSPI Flash boot...\n");
 #endif
 
 	/* copy code to RAM and jump to it - this should not return */

@@ -107,5 +115,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	spi_boot();
 #endif
 }
include/configs/P1022DS.h +29 -7
index 7cb049c..607b754 100644
@@ -48,11 +48,33 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_RAMBOOT_SPIFLASH
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW			/* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #define CONFIG_NAND_FSL_ELBC

@@ -318,7 +340,7 @@
  * Config the L2 Cache as L2 SRAM
 */
 #if defined(CONFIG_SPL_BUILD)
-#if defined(CONFIG_SDCARD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_INIT_L2_ADDR                0xf8f80000
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS   CONFIG_SYS_INIT_L2_ADDR
 #define CONFIG_SYS_L2_SIZE             (256 << 10)

@@ -562,7 +584,7 @@
 /*
  * Environment
  */
-#ifdef CONFIG_RAMBOOT_SPIFLASH
+#ifdef CONFIG_SPIFLASH
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
Signature · 1 line
1.7.0.4
author
#5 lore raw

PATCH v7 6/7 NAND: TPL : introduce the TPL based on the SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can not be more than 4K. So, the SPL cannot initialize the DDR with the SPD code. This patch introduces TPL to enable a loader stub that is loaded by the code from the SPL. It initializes the DDR with the SPD or other operations.

The TPL's size is sizeable, the maximum size is decided by the memory's size that TPL runs. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image

This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- Modify the description of the patch.
- Add the separate the autoconf.mk for TPL.
- Delete the file tpl/Makefile and the directory tpl.
- Reuse the spl/Makefie in TPL.
Change from v5:
- Use ifdef to define "nand_load_image" to non-static for non-SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".

 Makefile                        |   43 ++++++++++++++++++++++--
 README                          |    9 +++++
 config.mk                       |   17 +++++++++
 doc/README.TPL                  |   69 +++++++++++++++++++++++++++++++++++++++
 drivers/mtd/nand/Makefile       |    8 ++++
 drivers/mtd/nand/fsl_elbc_spl.c |    5 ++-
 include/nand.h                  |    3 ++
 spl/Makefile                    |   37 ++++++++++++++++++++-
 8 files changed, 185 insertions(+), 6 deletions(-)
 create mode 100644 doc/README.TPL
Makefile +39 -4
index 7de687c..e3b7a1b 100644
@@ -413,6 +413,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
+ALL-$(CONFIG_TPL) += $(obj)spl/u-boot-tpl.bin
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))

@@ -492,12 +493,25 @@ $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
 
-
+ifdef CONFIG_TPL
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-tpl.bin \
+		$(obj)u-boot.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+			-I binary -O binary \
+			$(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl-pad.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+			-I binary -O binary \
+			$(obj)spl/u-boot-tpl.bin $(obj)spl/u-boot-tpl-pad.bin
+		cat $(obj)spl/u-boot-spl-pad.bin $(obj)spl/u-boot-tpl-pad.bin \
+			$(obj)u-boot.bin > $@
+#		rm $(obj)spl/u-boot-spl-pad.bin $(obj)spl/u-boot-tpl-pad.bin
+else
 $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
 			-I binary -O binary $< $(obj)spl/u-boot-spl-pad.bin
 		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
 		rm $(obj)spl/u-boot-spl-pad.bin
+endif
 
 $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \

@@ -621,7 +635,12 @@ $(obj)u-boot-nand.bin:	nand_spl $(obj)u-boot.bin
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(obj)spl/u-boot-spl.bin:	$(SUBDIR_TOOLS) depend
-		$(MAKE) -C spl all
+		$(MAKE) -C spl clean
+		$(MAKE) -C spl all CONFIG_SPL_BUILD=y
+
+$(obj)spl/u-boot-tpl.bin:	$(SUBDIR_TOOLS) depend
+		$(MAKE) -C spl clean
+		$(MAKE) -C spl all CONFIG_TPL_BUILD=y CONFIG_SPL_BUILD=y
 
 updater:
 		$(MAKE) -C tools/updater all

@@ -630,6 +649,7 @@ updater:
 # parallel sub-makes creating .depend files simultaneously.
 depend dep:	$(TIMESTAMP_FILE) $(VERSION_FILE) \
 		$(obj)include/spl-autoconf.mk \
+		$(obj)include/tpl-autoconf.mk \
 		$(obj)include/autoconf.mk \
 		$(obj)include/generated/generic-asm-offsets.h \
 		$(obj)include/generated/asm-offsets.h

@@ -705,6 +725,15 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
 		sed -n -f tools/scripts/define2mk.sed > [email protected] && \
 	mv [email protected] $@
 # Auto-generate the spl-autoconf.mk file (which is included by all makefiles for SPL)
+$(obj)include/tpl-autoconf.mk: $(obj)include/config.h
+	@$(XECHO) Generating $@ ; \
+	set -e ; \
+	: Extract the config macros ; \
+	$(CPP) $(CFLAGS) -DCONFIG_TPL_BUILD  -DCONFIG_SPL_BUILD\
+			-DDO_DEPS_ONLY -dM include/common.h | \
+	sed -n -f tools/scripts/define2mk.sed > [email protected] && \
+	mv [email protected] $@
+
 $(obj)include/spl-autoconf.mk: $(obj)include/config.h
 	@$(XECHO) Generating $@ ; \
 	set -e ; \

@@ -715,12 +744,14 @@ $(obj)include/spl-autoconf.mk: $(obj)include/config.h
 
 $(obj)include/generated/generic-asm-offsets.h:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(obj)lib/asm-offsets.s
 	@$(XECHO) Generating $@
 	tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@
 
 $(obj)lib/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(src)lib/asm-offsets.c
 	@mkdir -p $(obj)lib
 	$(CC) -DDO_DEPS_ONLY \

@@ -729,12 +760,14 @@ $(obj)lib/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
 
 $(obj)include/generated/asm-offsets.h:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
 	@$(XECHO) Generating $@
 	tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@
 
 $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
-	$(obj)include/spl-autoconf.mk
+	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk
 	@mkdir -p $(obj)$(CPUDIR)/$(SOC)
 	if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
 		$(CC) -DDO_DEPS_ONLY \

@@ -807,7 +840,8 @@ unconfig:
 	@rm -f $(obj)include/config.h $(obj)include/config.mk \
 		$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
 		$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep \
-		$(obj)include/spl-autoconf.mk
+		$(obj)include/spl-autoconf.mk \
+		$(obj)include/tpl-autoconf.mk
 
 %_config::	unconfig
 	@$(MKCONFIG) -A $(@:_config=)

@@ -893,6 +927,7 @@ clobber:	tidy
 	@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
 	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
 	@rm -f $(obj)spl/u-boot-spl.lds
+	@rm -f $(obj)spl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
 	@rm -f $(obj)MLO MLO.byteswap
 	@rm -f $(obj)SPL
 	@rm -f $(obj)tools/xway-swap-bytes
README +9 -0
index 5872b5e..753975f 100644
@@ -3100,6 +3100,10 @@ FIT uImage format:
 		option to re-enable it. This will affect the output of the
 		bootm command when booting a FIT image.
 
+- TPL framework
+		CONFIG_TPL
+		Enable building of TPL globally.
+
 Modem Support:
 --------------
 

@@ -4137,6 +4141,11 @@ Low Level (hardware related) configuration options:
 		that is executed before the actual U-Boot. E.g. when
 		compiling a NAND SPL.
 
+- CONFIG_TPL_BUILD
+		Modifies the behaviour of start.S  when compiling a loader
+		that is executed after the SPL and before the actual U-Boot.
+		It is loaded by the SPL.
+
 - CONFIG_SYS_MPC85XX_NO_RESETVEC
 		Only for 85xx systems. If this variable is specified, the section
 		.resetvec is not kept and the section .bootpg is placed in the
config.mk +17 -0
index f42b655..6c0976d 100644
@@ -161,6 +161,10 @@ CHECK	= sparse
 #########################################################################
 
 # Load generated board configuration
+ifeq ($(CONFIG_TPL_BUILD),y)
+# Include TPL autoconf
+sinclude $(OBJTREE)/include/tpl-autoconf.mk
+else
 ifeq ($(CONFIG_SPL_BUILD),y)
 # Include SPL autoconf
 sinclude $(OBJTREE)/include/spl-autoconf.mk

@@ -168,6 +172,7 @@ else
 # Include normal autoconf
 sinclude $(OBJTREE)/include/autoconf.mk
 endif
+endif
 sinclude $(OBJTREE)/include/config.mk
 
 # Some architecture config.mk files need to know what CPUDIR is set to,

@@ -239,6 +244,9 @@ endif
 
 ifeq ($(CONFIG_SPL_BUILD),y)
 CPPFLAGS += -DCONFIG_SPL_BUILD
+ifeq ($(CONFIG_TPL_BUILD),y)
+CPPFLAGS += -DCONFIG_TPL_BUILD
+endif
 endif
 
 # Does this architecture support generic board init?

@@ -310,10 +318,19 @@ ifneq ($(CONFIG_SYS_TEXT_BASE),)
 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
 endif
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+LDFLAGS_u-boot-tpl += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
+ifneq ($(CONFIG_SPL_TEXT_BASE),)
+LDFLAGS_u-boot-tpl += -Ttext $(CONFIG_SPL_TEXT_BASE)
+endif
+else
+ifeq ($(CONFIG_SPL_BUILD),y)
 LDFLAGS_u-boot-spl += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
 ifneq ($(CONFIG_SPL_TEXT_BASE),)
 LDFLAGS_u-boot-spl += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
+endif
+endif
 
 # Linus' kernel sanity checking tool
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
doc/README.TPL new file +69 -0

69 lines not on this page · raw message

drivers/mtd/nand/Makefile +8 -0
index bb81e84..6507fcf 100644
@@ -29,6 +29,8 @@ ifdef CONFIG_CMD_NAND
 
 ifdef CONFIG_SPL_BUILD
 
+ifndef CONFIG_TPL_BUILD
+
 ifdef CONFIG_SPL_NAND_DRIVERS
 NORMAL_DRIVERS=y
 endif

@@ -40,6 +42,10 @@ COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 COBJS-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o
 
+else
+COBJS-y += nand.o
+endif
+
 else # not spl
 
 NORMAL_DRIVERS=y

@@ -82,9 +88,11 @@ COBJS-$(CONFIG_NAND_DOCG4) += docg4.o
 
 else  # minimal SPL drivers
 
+ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+endif
 
 endif # drivers
 endif # nand
drivers/mtd/nand/fsl_elbc_spl.c +4 -1
index 50ff4fe..d00a13a 100644
@@ -47,7 +47,10 @@ static void nand_wait(void)
 	}
 }
 
-static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+#ifndef CONFIG_TPL_BUILD
+static
+#endif
+int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
 {
 	fsl_lbc_t *regs = LBC_BASE_ADDR;
 	uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
include/nand.h +3 -0
index 228d871..2aa7238 100644
@@ -153,6 +153,9 @@ int nand_unlock(nand_info_t *meminfo, loff_t start, size_t length,
 int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
 
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
+#ifdef CONFIG_TPL_BUILD
+int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst);
+#endif
 void nand_deselect(void);
 
 #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
spl/Makefile +36 -1
index eef8c87..efdfe1a 100644
@@ -15,14 +15,24 @@
 # Based on top-level Makefile.
 #
 
-CONFIG_SPL_BUILD := y
+ifeq ($(CONFIG_SPL_BUILD),y)
 export CONFIG_SPL_BUILD
+endif
+ifeq ($(CONFIG_TPL_BUILD),y)
+export CONFIG_TPL_BUILD
+endif
 
 include $(TOPDIR)/config.mk
 
 # We want the final binaries in this directory
 obj := $(OBJTREE)/spl/
 
+clean:
+	@find $(obj) -type f \
+		\( -name 'core' -o -name '*.bak' -o -name '*~' \
+		-o -name '*.o'  -o -name '*.a' \) -print \
+		| xargs rm -f
+
 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(SRCTREE)/board/$(VENDOR)/common/Makefile),y,n)
 
 ifdef	CONFIG_SPL_START_S_PATH

@@ -150,6 +160,7 @@ LDPPFLAGS += \
 	$(shell $(LD) --version | \
 	  sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
 
+ifndef CONFIG_TPL_BUILD
 $(OBJTREE)/MLO:	$(obj)u-boot-spl.bin
 	$(OBJTREE)/tools/mkimage -T omapimage \
 		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@

@@ -162,6 +173,17 @@ $(OBJTREE)/SPL : $(obj)u-boot-spl.bin depend
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common $@
 
 ALL-y	+= $(obj)u-boot-spl.bin
+else
+$(OBJTREE)/MLO: $(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage \
+		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+
+$(OBJTREE)/MLO.byteswap: $(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
+		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+
+ALL-y   += $(obj)u-boot-tpl.bin
+endif
 
 ifdef CONFIG_SAMSUNG
 ALL-y	+= $(obj)$(BOARD)-spl.bin

@@ -175,6 +197,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
 		$(obj)u-boot-spl.bin $(obj)$(BOARD)-spl.bin
 endif
 
+ifndef CONFIG_TPL_BUILD
 $(obj)u-boot-spl.bin:	$(obj)u-boot-spl
 	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
 

@@ -185,6 +208,18 @@ GEN_UBOOT = \
 
 $(obj)u-boot-spl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
 	$(GEN_UBOOT)
+else
+$(obj)u-boot-tpl.bin:   $(obj)u-boot-tpl
+	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
+
+GEN_UBOOT = \
+	cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \
+		--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
+		-Map u-boot-tpl.map -o u-boot-tpl
+
+$(obj)u-boot-tpl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
+	$(GEN_UBOOT)
+endif
 
 $(START):	depend
 	$(MAKE) -C $(SRCTREE)/$(START_PATH) $@
Signature · 1 line
1.7.0.4
#6 lore raw

PATCH v7 6/7 NAND: TPL : introduce the TPL based on the SPL

Quoted 5 lines · ying.zhang at freescale.com
(quoted diff) +3 -1
+During the TPL build a variable named CONFIG_TPL_BUILD is exported
+in the make environment and also appended to CPPFLAGS with  
-DCONFIG_TPL_BUILD.
+Source files can therefore be compiled for TPL with different

settings.

doc/README.TPL line 37

Quoted 10 lines
doc/README.TPL new file +10 -0
+
+For example:
+
+ifeq ($(CONFIG_TPL_BUILD),y)
+COBJS-y += board_tpl.o
+else
+COBJS-y += board.o
+endif
+
+COBJS-$(CONFIG_TPL_BUILD) += foo.o

This is not how it should normally be done. Normally the board config file should determine which SPL options to choose, based on whether CONFIG_TPL_BUILD is set.

drivers/mtd/nand/Makefile ifdef CONFIG_CMD_NAND · line 32

Quoted 9 lines
drivers/mtd/nand/Makefile +1 -0
index bb81e84..6507fcf 100644
@@ -29,6 +29,8 @@ ifdef CONFIG_CMD_NAND
 
 ifdef CONFIG_SPL_BUILD
 
+ifndef CONFIG_TPL_BUILD

Why? Let the board file define what it wants for the TPL case, just as in SPL.

drivers/mtd/nand/Makefile COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o · line 47

Quoted 10 lines
drivers/mtd/nand/Makefile +3 -0
 ifdef CONFIG_SPL_NAND_DRIVERS
 NORMAL_DRIVERS=y
 endif

@@ -40,6 +42,10 @@ COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 COBJS-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o
 
+else
+COBJS-y += nand.o
+endif

What do you need nand.c for? Why do you think all other TPLs will have the same need?

drivers/mtd/nand/Makefile COBJS-$(CONFIG_NAND_DOCG4) += docg4.o · line 95

Quoted 12 lines
drivers/mtd/nand/Makefile +2 -0
 else # not spl
 
 NORMAL_DRIVERS=y

@@ -82,9 +88,11 @@ COBJS-$(CONFIG_NAND_DOCG4) += docg4.o
 
 else  # minimal SPL drivers
 
+ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+endif

How are you going to get here in the first place without CONFIG_SPL_BUILD?

Quoted 5 lines
drivers/mtd/nand/Makefile +1 -0
@@ -162,6 +173,17 @@ $(OBJTREE)/SPL : $(obj)u-boot-spl.bin depend
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common $@
 
 ALL-y	+= $(obj)u-boot-spl.bin
+else

drivers/mtd/nand/Makefile $(OBJTREE)/SPL : $(obj)u-boot-spl.bin depend · line 186

Quoted 10 lines
drivers/mtd/nand/Makefile +10 -0
+$(OBJTREE)/MLO: $(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage \
+		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+
+$(OBJTREE)/MLO.byteswap: $(obj)u-boot-tpl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
+		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+
+ALL-y   += $(obj)u-boot-tpl.bin
+endif

Why? There's not even a user of MLO with TPL.

In any case, is there no way we can just set filename variables based on SPL/TPL here, rather than duplicating code?

Quoted 10 lines
drivers/mtd/nand/Makefile +3 -0
+ifndef CONFIG_TPL_BUILD
 $(obj)u-boot-spl.bin:	$(obj)u-boot-spl
 	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@

@@ -185,6 +208,18 @@ GEN_UBOOT = \
 
 $(obj)u-boot-spl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
 	$(GEN_UBOOT)
+else
+$(obj)u-boot-tpl.bin:   $(obj)u-boot-tpl

drivers/mtd/nand/Makefile GEN_UBOOT = \ · line 222

Quoted 10 lines
drivers/mtd/nand/Makefile +10 -0
+	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
+
+GEN_UBOOT = \
+	cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \
+		--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
+		-Map u-boot-tpl.map -o u-boot-tpl
+
+$(obj)u-boot-tpl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
+	$(GEN_UBOOT)
+endif

Likewise.

-Scott

author
#7 lore raw

PATCH v7 7/7 powerpc: p1022ds: add TPL for p1022ds nand boot

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

TPL is introduced in the patch "NAND: TPL : introduce the TPL based on the SPL", here enable TPL for p1022ds nand boot.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v6:
- Delete the file "board/freescale/p1022ds/tpl.c".
- Reuse the file "board/freescale/p1022ds/spl.c" in the TPL. Change from v5:
- Change functionality nand_load_image to nand_load, it is called in TPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".

 board/freescale/p1022ds/spl.c         |   15 +++++++
 board/freescale/p1022ds/spl_minimal.c |   53 ++-----------------------
 include/configs/P1022DS.h             |   69 ++++++++++++++++++++++++++------
 3 files changed, 76 insertions(+), 61 deletions(-)
board/freescale/p1022ds/spl.c +15 -0
index b6669f3..79e3ac4 100644
@@ -101,21 +101,36 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 	get_clocks();
 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \
 			CONFIG_SPL_RELOC_MALLOC_SIZE);
+#ifndef CONFIG_SPL_NAND_BOOT
 	env_init();
+#endif
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_initialize(bd);
 #endif
 	/* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+	nand_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+		(uchar *)CONFIG_ENV_ADDR);
+	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
+	gd->env_valid = 1;
+#else
 	env_relocate();
+#endif
 
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 
 	gd->ram_size = initdram(0);
+#ifdef CONFIG_SPL_NAND_BOOT
+	puts("Tertiary program loader running in sram...");
+#else
 	puts("Second program loader running in sram...\n");
+#endif
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
 #elif defined(CONFIG_SPL_SPI_BOOT)
 	spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+	nand_boot();
 #endif
 }
board/freescale/p1022ds/spl_minimal.c +5 -48

77 lines not on this page · raw message

include/configs/P1022DS.h +56 -13

92 lines not on this page · raw message

Signature · 1 line
1.7.0.4