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Samsung PWM support cleanup

PATCH Superseded Tomasz Figa 9 participants 62 messages Jul 20, 2013 – Aug 8, 2013

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#0 lore raw

v4 cover Samsung PWM support cleanup

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource driver,
3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

[On S3C2440-based Mini2440 board]
[On a s3c2416 based machine]
[Also not sure on what boards, but still]

Changes since v3:
- added two extra clocksource driver fixes to the series (patches 1, 2),
- added comment explaining why only a simple synchronization is needed between clocksource and PWM drivers,
- some stylistic fixes,
- rebased to 3.11-rc1.
Changes since v2:
- replaced __raw_{readl,writel} with {readl,writel},
- corrected some commit messages,
- used git format-patch -M to detect rename.
Changes since v1:
- made sure that suspend/resume is handled correctly in both clocksource and PWM drivers,
- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(), which assumes that PWM device has been already registered,
- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup of most code originally copied from previous PWM driver,
- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Tomasz Figa (20):
clocksource: samsung_pwm_timer: Do not request PWM mem region
clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |  11 +-
 arch/arm/mach-s3c24xx/Kconfig                      |   6 -
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   2 -
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   1 -
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   1 -
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474 --------------
 arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/Kconfig                        |   1 -
 drivers/clocksource/samsung_pwm_timer.c            |  98 +--
 drivers/pwm/pwm-samsung.c                          | 701 ++++++++++++++-------
 61 files changed, 768 insertions(+), 1662 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
Signature · 1 line
1.8.3.2
#1 lore raw

PATCH v4 1/20 clocksource: samsung_pwm_timer: Do not request PWM mem region

PWM registers are shared between clocksource and PWM drivers and so can not be claimed for exclusive use.

---
 drivers/clocksource/samsung_pwm_timer.c | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +1 -10
index 584b547..3fa5b07 100644
@@ -404,7 +404,6 @@ void __init samsung_pwm_clocksource_init(void __iomem *base,
 static void __init samsung_pwm_alloc(struct device_node *np,
 				     const struct samsung_pwm_variant *variant)
 {
-	struct resource res;
 	struct property *prop;
 	const __be32 *cur;
 	u32 val;
@@ -423,17 +422,9 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 		pwm.variant.output_mask |= 1 << val;
 	}
 
-	of_address_to_resource(np, 0, &res);
-	if (!request_mem_region(res.start,
-				resource_size(&res), "samsung-pwm")) {
-		pr_err("%s: failed to request IO mem region\n", __func__);
-		return;
-	}
-
-	pwm.base = ioremap(res.start, resource_size(&res));
+	pwm.base = of_iomap(np, 0);
 	if (!pwm.base) {
 		pr_err("%s: failed to map PWM registers\n", __func__);
-		release_mem_region(res.start, resource_size(&res));
 		return;
 	}
 
Signature · 1 line
1.8.3.2
#2 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

In reply to Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---
 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/clocksource/samsung_pwm_timer.c +2 -1
index 3fa5b07..e238fb0 100644
@@ -47,7 +47,8 @@
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))
 
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
Signature · 1 line
1.8.3.2
#3 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

In reply to Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---
 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/clocksource/samsung_pwm_timer.c +2 -1
index 3fa5b07..e238fb0 100644
@@ -47,7 +47,8 @@
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))
 
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
Signature · 1 line
1.8.3.2
#4 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 16 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---
 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/clocksource/samsung_pwm_timer.c +0 -0
index 3fa5b07..e238fb0 100644

drivers/clocksource/samsung_pwm_timer.c line 51

Quoted 6 lines
drivers/clocksource/samsung_pwm_timer.c +2 -1
@@ -47,7 +47,8 @@
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))

This macro is not readable. Please, fix it up with a comment please.

Quoted 4 lines
drivers/clocksource/samsung_pwm_timer.c +0 -0
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
 
Signature · 5 lines
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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#5 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 24 lines · On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
Quoted 23 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---

 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
(quoted diff) +0 -0

b/drivers/clocksource/samsung_pwm_timer.c index 3fa5b07..e238fb0 100644

drivers/clocksource/samsung_pwm_timer.c +0 -0
@@ -47,7 +47,8 @@
 
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
 
Quoted 5 lines

drivers/clocksource/samsung_pwm_timer.c line 51

Quoted 3 lines
drivers/clocksource/samsung_pwm_timer.c +2 -1
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))

This macro is not readable. Please, fix it up with a comment please.

/*
* Channel 4 (logically 5 in TCON register) has different position
* of autoreload bit.
*/
#define _TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3))
#define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan) + 2))
#define TCON_AUTORELOAD(chan) ((chan < 5) ?
_TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))

What do you think?

Best regards,
Tomasz

#6 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 40 lines · Tomasz Figa
Quoted 24 lines · On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
Quoted 23 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---

 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
(quoted diff) +0 -0

b/drivers/clocksource/samsung_pwm_timer.c index 3fa5b07..e238fb0 100644

drivers/clocksource/samsung_pwm_timer.c +0 -0
@@ -47,7 +47,8 @@
 
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
 
Quoted 5 lines

drivers/clocksource/samsung_pwm_timer.c line 51

Quoted 3 lines
drivers/clocksource/samsung_pwm_timer.c +2 -1
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))

This macro is not readable. Please, fix it up with a comment please.

/*
* Channel 4 (logically 5 in TCON register) has different position
* of autoreload bit.
*/
#define _TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3))
#define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan) + 2))
#define TCON_AUTORELOAD(chan) ((chan < 5) ?
_TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))

Quoted 1 line

What do you think?

I don't get the arithmetic here and the code is poor in comment. A nice comment would valuable here.

May be you can replace 1 << bla by BIT(bla) ?

Signature · 5 lines
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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#7 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 32 lines · On Monday 22 of July 2013 22:56:44 Daniel Lezcano wrote:
Quoted 31 lines · Tomasz Figa
Quoted 29 lines · On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
Quoted 18 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---

 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
(quoted diff) +0 -0

b/drivers/clocksource/samsung_pwm_timer.c index 3fa5b07..e238fb0 100644

drivers/clocksource/samsung_pwm_timer.c line 53

Quoted 8 lines
drivers/clocksource/samsung_pwm_timer.c +2 -1
@@ -47,7 +47,8 @@
 
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
 
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))

This macro is not readable. Please, fix it up with a comment please.

Quoted 7 lines
Quoted 7 lines

/*

* Channel 4 (logically 5 in TCON register) has different position
* of autoreload bit.
*/

#define _TCON_AUTORELOAD(chan) (1 << (4 * (chan)

+ 3))

Quoted 1 line
Quoted 1 line

#define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan)

+ 2))

Quoted 8 lines
Quoted 5 lines

#define TCON_AUTORELOAD(chan) ((chan < 5) ?

_TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))

What do you think?

I don't get the arithmetic here and the code is poor in comment. A nice comment would valuable here.

Each channel occupies 4 bits in TCON register, but there is a gap of 4 bits after channel 0. In addition for channel 4 the location of autoreload bit in its set of bits is 2 as opposed to 3 for other channels. Here's the layout of the register, for reference:

Timer 4 Auto Reload on/off [22]
Timer 4 Manual Update [21]
Timer 4 Start/Stop [20]

Timer 3 Auto Reload on/off [19]
Reserved [18]
Timer 3 Manual Update [17]
Timer 3 Start/Stop [16]

Timer 2 Auto Reload on/off [15]
Reserved [14]
Timer 2 Manual Update [13]
Timer 2 Start/Stop [12]

Timer 1 Auto Reload on/off [11]
Timer 1 Output Inverter on/off [10]
Timer 1 Manual Update [9]
Timer 1 Start/Stop [8]

Reserved [7:5]
Dead zone enable/disable [4]

Timer 0 Auto Reload on/off [3]
Timer 0 Output Inverter on/off [2]
Timer 0 Manual Update [1]
Timer 0 Start/Stop [0]

Quoted 1 line

May be you can replace 1 << bla by BIT(bla) ?

Yes, BIT() would be nice here, but IMHO this is material for separate patch as all the macros in this driver already use 1 << bla.

Best regards,
Tomasz

#8 lore raw

PATCH v4 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 76 lines · Tomasz Figa
Quoted 32 lines · On Monday 22 of July 2013 22:56:44 Daniel Lezcano wrote:
Quoted 31 lines · Tomasz Figa
Quoted 29 lines · On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
Quoted 18 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---

 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
(quoted diff) +0 -0

b/drivers/clocksource/samsung_pwm_timer.c index 3fa5b07..e238fb0 100644

drivers/clocksource/samsung_pwm_timer.c line 53

Quoted 8 lines
drivers/clocksource/samsung_pwm_timer.c +2 -1
@@ -47,7 +47,8 @@
 
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
 
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) \
+						+ (((chan) < 5) ? 3 : 2)))

This macro is not readable. Please, fix it up with a comment please.

Quoted 7 lines
Quoted 7 lines

/*

* Channel 4 (logically 5 in TCON register) has different position
* of autoreload bit.
*/

#define _TCON_AUTORELOAD(chan) (1 << (4 * (chan)

+ 3))

Quoted 1 line
Quoted 1 line

#define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan)

+ 2))

Quoted 8 lines
Quoted 5 lines

#define TCON_AUTORELOAD(chan) ((chan < 5) ?

_TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))

What do you think?

I don't get the arithmetic here and the code is poor in comment. A nice comment would valuable here.

Each channel occupies 4 bits in TCON register, but there is a gap of 4 bits after channel 0. In addition for channel 4 the location of autoreload bit in its set of bits is 2 as opposed to 3 for other channels. Here's the layout of the register, for reference:

Timer 4 Auto Reload on/off [22]
Timer 4 Manual Update [21]
Timer 4 Start/Stop [20]

Timer 3 Auto Reload on/off [19]
Reserved [18]
Timer 3 Manual Update [17]
Timer 3 Start/Stop [16]

Timer 2 Auto Reload on/off [15]
Reserved [14]
Timer 2 Manual Update [13]
Timer 2 Start/Stop [12]

Timer 1 Auto Reload on/off [11]
Timer 1 Output Inverter on/off [10]
Timer 1 Manual Update [9]
Timer 1 Start/Stop [8]

Quoted 7 lines

Reserved [7:5]
Dead zone enable/disable [4]

Timer 0 Auto Reload on/off [3]
Timer 0 Output Inverter on/off [2]
Timer 0 Manual Update [1]
Timer 0 Start/Stop [0]

Ok, I understand now. Thanks for the clarification.

IMHO, the description you gave above (without layout) will fit well for a comment :)

Quoted 4 lines
Quoted 1 line

May be you can replace 1 << bla by BIT(bla) ?

Yes, BIT() would be nice here, but IMHO this is material for separate patch as all the macros in this driver already use 1 << bla.

Yes, I agree.

Thanks
-- Daniel

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#9 lore raw

PATCH v6 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---
 drivers/clocksource/samsung_pwm_timer.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

Changes since v5:
- Added more detailed comment about bit layout in TCON register.

drivers/clocksource/samsung_pwm_timer.c +12 -1
index 3fa5b07..5d0049f 100644
@@ -44,10 +44,21 @@
 #define TCFG1_SHIFT(x)	  		((x) * 4)
 #define TCFG1_MUX_MASK	  		0xf
 
+/*
+ * Each channel occupies 4 bits in TCON register, but there is a gap of 4
+ * bits (one channel) after channel 0, so channels have different numbering
+ * when accessing TCON register.
+ *
+ * In addition, the location of autoreload bit for channel 4 (TCON channel 5)
+ * in its set of bits is 2 as opposed to 3 for other channels.
+ */
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD4(chan)		(1 << (4 * (chan) + 2))
+#define TCON_AUTORELOAD(chan)		\
+	((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))
 
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
Signature · 1 line
1.8.3.2
#10 lore raw

PATCH v6 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

Quoted 9 lines · Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---

Quoted 34 lines
 drivers/clocksource/samsung_pwm_timer.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

Changes since v5:
- Added more detailed comment about bit layout in TCON register.

drivers/clocksource/samsung_pwm_timer.c +12 -1
index 3fa5b07..5d0049f 100644
@@ -44,10 +44,21 @@
 #define TCFG1_SHIFT(x)	  		((x) * 4)
 #define TCFG1_MUX_MASK	  		0xf
 
+/*
+ * Each channel occupies 4 bits in TCON register, but there is a gap of 4
+ * bits (one channel) after channel 0, so channels have different numbering
+ * when accessing TCON register.
+ *
+ * In addition, the location of autoreload bit for channel 4 (TCON channel 5)
+ * in its set of bits is 2 as opposed to 3 for other channels.
+ */
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD4(chan)		(1 << (4 * (chan) + 2))
+#define TCON_AUTORELOAD(chan)		\
+	((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))
 
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
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#11 lore raw

PATCH v5 2/20 clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit

In reply to Tomasz Figa

PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that.

This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more.

---
 drivers/clocksource/samsung_pwm_timer.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Changes since v4:
- made the new definition more readable.

drivers/clocksource/samsung_pwm_timer.c +5 -1
index 3fa5b07..89947c3 100644
@@ -47,7 +47,11 @@
 #define TCON_START(chan)		(1 << (4 * (chan) + 0))
 #define TCON_MANUALUPDATE(chan)		(1 << (4 * (chan) + 1))
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
-#define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
+#define _TCON_AUTORELOAD4(chan)		(1 << (4 * (chan) + 2))
+/* Position of autoreload bit of channel 4 (5 in TCON reg.) is different. */
+#define TCON_AUTORELOAD(chan)		\
+	((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))
 
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
Signature · 1 line
1.8.3.2
#12 lore raw

PATCH v4 3/20 clocksource: samsung_pwm_timer: Cache clocksource register address

In reply to Tomasz Figa

Instead of calculating register every time the timer should be read, we can just do it one time at initialization and store the address in driver data.

---
 drivers/clocksource/samsung_pwm_timer.c | 33 ++++++++-------------------------
 1 file changed, 8 insertions(+), 25 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +8 -25
index e238fb0..823279b 100644
@@ -55,6 +55,7 @@ EXPORT_SYMBOL(samsung_pwm_lock);
 
 struct samsung_pwm_clocksource {
 	void __iomem *base;
+	void __iomem *source_reg;
 	unsigned int irq[SAMSUNG_PWM_NUM];
 	struct samsung_pwm_variant variant;
 
@@ -287,23 +288,6 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
-static void __iomem *samsung_timer_reg(void)
-{
-	switch (pwm.source_id) {
-	case 0:
-	case 1:
-	case 2:
-	case 3:
-		return pwm.base + pwm.source_id * 0x0c + 0x14;
-
-	case 4:
-		return pwm.base + 0x40;
-
-	default:
-		BUG();
-	}
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -313,17 +297,11 @@ static void __iomem *samsung_timer_reg(void)
  */
 static u32 notrace samsung_read_sched_clock(void)
 {
-	void __iomem *reg = samsung_timer_reg();
-
-	if (!reg)
-		return 0;
-
-	return ~__raw_readl(reg);
+	return ~__raw_readl(pwm.source_reg);
 }
 
 static void __init samsung_clocksource_init(void)
 {
-	void __iomem *reg = samsung_timer_reg();
 	unsigned long pclk;
 	unsigned long clock_rate;
 	int ret;
@@ -338,10 +316,15 @@ static void __init samsung_clocksource_init(void)
 	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
 	samsung_time_start(pwm.source_id, true);
 
+	if (pwm.source_id == 4)
+		pwm.source_reg = pwm.base + 0x40;
+	else
+		pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
+
 	setup_sched_clock(samsung_read_sched_clock,
 						pwm.variant.bits, clock_rate);
 
-	ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
+	ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
 					clock_rate, 250, pwm.variant.bits,
 					clocksource_mmio_readl_down);
 	if (ret)
Signature · 1 line
1.8.3.2
#13 lore raw

PATCH v4 4/20 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

In reply to Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required.

---
 drivers/clocksource/Kconfig             |  1 -
 drivers/clocksource/samsung_pwm_timer.c | 19 +++++++++++++++----
 2 files changed, 15 insertions(+), 5 deletions(-)
drivers/clocksource/Kconfig +0 -1
index b7b9b04..41c6946 100644
@@ -99,7 +99,6 @@ config CLKSRC_EXYNOS_MCT
 
 config CLKSRC_SAMSUNG_PWM
 	bool
-	select CLKSRC_MMIO
 	help
 	  This is a new clocksource driver for the PWM timer found in
 	  Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
drivers/clocksource/samsung_pwm_timer.c +15 -4
index 823279b..753ffec 100644
@@ -288,6 +288,18 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static cycle_t samsung_clocksource_read(struct clocksource *c)
+{
+	return ~readl_relaxed(pwm.source_reg);
+}
+
+static struct clocksource samsung_clocksource = {
+	.name		= "samsung_clocksource_timer",
+	.rating		= 250,
+	.read		= samsung_clocksource_read,
+	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -297,7 +309,7 @@ static void __init samsung_clockevent_init(void)
  */
 static u32 notrace samsung_read_sched_clock(void)
 {
-	return ~__raw_readl(pwm.source_reg);
+	return samsung_clocksource_read(NULL);
 }
 
 static void __init samsung_clocksource_init(void)
@@ -324,9 +336,8 @@ static void __init samsung_clocksource_init(void)
 	setup_sched_clock(samsung_read_sched_clock,
 						pwm.variant.bits, clock_rate);
 
-	ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
-					clock_rate, 250, pwm.variant.bits,
-					clocksource_mmio_readl_down);
+	samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
+	ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
 	if (ret)
 		panic("samsung_clocksource_timer: can't register clocksource\n");
 }
Signature · 1 line
1.8.3.2
#14 lore raw

PATCH v4 4/20 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

Quoted 5 lines · Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required.

---

Please in the future Cc me and Thomas Gleixner (clocksource/clockevent maintainers).

Thanks
-- Daniel

Quoted 61 lines
 drivers/clocksource/Kconfig             |  1 -
 drivers/clocksource/samsung_pwm_timer.c | 19 +++++++++++++++----
 2 files changed, 15 insertions(+), 5 deletions(-)
drivers/clocksource/Kconfig +0 -1
index b7b9b04..41c6946 100644
@@ -99,7 +99,6 @@ config CLKSRC_EXYNOS_MCT
 
 config CLKSRC_SAMSUNG_PWM
 	bool
-	select CLKSRC_MMIO
 	help
 	  This is a new clocksource driver for the PWM timer found in
 	  Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
drivers/clocksource/samsung_pwm_timer.c +15 -4
index 823279b..753ffec 100644
@@ -288,6 +288,18 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static cycle_t samsung_clocksource_read(struct clocksource *c)
+{
+	return ~readl_relaxed(pwm.source_reg);
+}
+
+static struct clocksource samsung_clocksource = {
+	.name		= "samsung_clocksource_timer",
+	.rating		= 250,
+	.read		= samsung_clocksource_read,
+	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -297,7 +309,7 @@ static void __init samsung_clockevent_init(void)
  */
 static u32 notrace samsung_read_sched_clock(void)
 {
-	return ~__raw_readl(pwm.source_reg);
+	return samsung_clocksource_read(NULL);
 }
 
 static void __init samsung_clocksource_init(void)
@@ -324,9 +336,8 @@ static void __init samsung_clocksource_init(void)
 	setup_sched_clock(samsung_read_sched_clock,
 						pwm.variant.bits, clock_rate);
 
-	ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
-					clock_rate, 250, pwm.variant.bits,
-					clocksource_mmio_readl_down);
+	samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
+	ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
 	if (ret)
 		panic("samsung_clocksource_timer: can't register clocksource\n");
 }
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#15 lore raw

PATCH v4 4/20 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

Hi Daniel,

Quoted 9 lines · On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
Quoted 6 lines · Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because
custom suspend/resume callbacks are required.

---

Thanks for review.

Quoted 2 lines

Please in the future Cc me and Thomas Gleixner (clocksource/clockevent maintainers).

Oh, right, sorry. This series originally was not touching the clocksource driver and I just kept original recipient list.

Btw. Have you updated MAINTAINERS file? In latest linux-next I can still see only John Stultz and Thomas Gleixner as maintainers of drivers/clocksource.

Best regards,
Tomasz

#16 lore raw

PATCH v4 4/20 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

Quoted 18 lines · Tomasz Figa

Hi Daniel,

Quoted 9 lines · On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
Quoted 6 lines · Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because
custom suspend/resume callbacks are required.

---

Thanks for review.

Quoted 2 lines

Please in the future Cc me and Thomas Gleixner (clocksource/clockevent maintainers).

Quoted 6 lines

Oh, right, sorry. This series originally was not touching the clocksource driver and I just kept original recipient list.

Btw. Have you updated MAINTAINERS file? In latest linux-next I can still see only John Stultz and Thomas Gleixner as maintainers of drivers/clocksource.

Yes, right last week :)

https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git/commit/?h=timers/core&id=9222d247bcbaacc40fe15549158f9d67523c1ace

Thanks
-- Daniel

Signature · 5 lines
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#17 lore raw

PATCH v4 4/20 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

Quoted 23 lines · On Monday 22 of July 2013 22:13:17 Daniel Lezcano wrote:
Quoted 22 lines · Tomasz Figa

Hi Daniel,

Quoted 9 lines · On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
Quoted 6 lines · Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because
custom suspend/resume callbacks are required.

---

Thanks for review.

Quoted 3 lines

Please in the future Cc me and Thomas Gleixner
(clocksource/clockevent
maintainers).

Oh, right, sorry. This series originally was not touching the clocksource driver and I just kept original recipient list.

Quoted 8 lines
Quoted 3 lines

Btw. Have you updated MAINTAINERS file? In latest linux-next I can still see only John Stultz and Thomas Gleixner as maintainers of drivers/clocksource.

Yes, right last week :)

https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git/commit/?h=timer
s/core&id=9222d247bcbaacc40fe15549158f9d67523c1ace

OK, great, just wanted to make sure. Apparently linux-next did not pick this up.

Best regards,
Tomasz

#18 lore raw

PATCH v4 5/20 clocksource: samsung_pwm_timer: Handle suspend/resume correctly

In reply to Tomasz Figa

Current suspend/resume handling of the driver was broken, because:
- periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which does not seem to be correct behavior looking at other platforms,
- PWM divisors need to be restored, but they were not,
- clockevent interrupt mask needs to be restored, but it was not,
- clocksource was being restored in clockevent resume callback.

This patch fixes issues mentioned above, making suspend/resume handling in the driver correct.

---
 drivers/clocksource/samsung_pwm_timer.c | 42 ++++++++++++++++++++++-----------
 1 file changed, 28 insertions(+), 14 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +28 -14
index 753ffec..282e0e2 100644
@@ -197,17 +197,6 @@ static int samsung_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void samsung_timer_resume(void)
-{
-	/* event timer restart */
-	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
-	samsung_time_start(pwm.event_id, true);
-
-	/* source timer restart */
-	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
-	samsung_time_start(pwm.source_id, true);
-}
-
 static void samsung_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
@@ -224,20 +213,29 @@ static void samsung_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-		break;
-
 	case CLOCK_EVT_MODE_RESUME:
-		samsung_timer_resume();
 		break;
 	}
 }
 
+static void samsung_clockevent_resume(struct clock_event_device *cev)
+{
+	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
+
+	if (pwm.variant.has_tint_cstat) {
+		u32 mask = (1 << pwm.event_id);
+		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
+	}
+}
+
 static struct clock_event_device time_event_device = {
 	.name		= "samsung_event_timer",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= samsung_set_next_event,
 	.set_mode	= samsung_set_mode,
+	.resume		= samsung_clockevent_resume,
 };
 
 static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
@@ -288,6 +286,20 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static void samsung_clocksource_suspend(struct clocksource *cs)
+{
+	samsung_time_stop(pwm.source_id);
+}
+
+static void samsung_clocksource_resume(struct clocksource *cs)
+{
+	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
+
+	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+	samsung_time_start(pwm.source_id, true);
+}
+
 static cycle_t samsung_clocksource_read(struct clocksource *c)
 {
 	return ~readl_relaxed(pwm.source_reg);
@@ -297,6 +309,8 @@ static struct clocksource samsung_clocksource = {
 	.name		= "samsung_clocksource_timer",
 	.rating		= 250,
 	.read		= samsung_clocksource_read,
+	.suspend	= samsung_clocksource_suspend,
+	.resume		= samsung_clocksource_resume,
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
Signature · 1 line
1.8.3.2
#19 lore raw

PATCH v4 5/20 clocksource: samsung_pwm_timer: Handle suspend/resume correctly

Quoted 7 lines · Tomasz Figa

Current suspend/resume handling of the driver was broken, because:
- periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which does not seem to be correct behavior looking at other platforms,
- PWM divisors need to be restored, but they were not,
- clockevent interrupt mask needs to be restored, but it was not,
- clocksource was being restored in clockevent resume callback.

Quoted 5 lines

This patch fixes issues mentioned above, making suspend/resume handling in the driver correct.

---

Quoted 89 lines
 drivers/clocksource/samsung_pwm_timer.c | 42 ++++++++++++++++++++++-----------
 1 file changed, 28 insertions(+), 14 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +28 -14
index 753ffec..282e0e2 100644
@@ -197,17 +197,6 @@ static int samsung_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void samsung_timer_resume(void)
-{
-	/* event timer restart */
-	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
-	samsung_time_start(pwm.event_id, true);
-
-	/* source timer restart */
-	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
-	samsung_time_start(pwm.source_id, true);
-}
-
 static void samsung_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
@@ -224,20 +213,29 @@ static void samsung_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-		break;
-
 	case CLOCK_EVT_MODE_RESUME:
-		samsung_timer_resume();
 		break;
 	}
 }
 
+static void samsung_clockevent_resume(struct clock_event_device *cev)
+{
+	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
+
+	if (pwm.variant.has_tint_cstat) {
+		u32 mask = (1 << pwm.event_id);
+		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
+	}
+}
+
 static struct clock_event_device time_event_device = {
 	.name		= "samsung_event_timer",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= samsung_set_next_event,
 	.set_mode	= samsung_set_mode,
+	.resume		= samsung_clockevent_resume,
 };
 
 static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
@@ -288,6 +286,20 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static void samsung_clocksource_suspend(struct clocksource *cs)
+{
+	samsung_time_stop(pwm.source_id);
+}
+
+static void samsung_clocksource_resume(struct clocksource *cs)
+{
+	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
+
+	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+	samsung_time_start(pwm.source_id, true);
+}
+
 static cycle_t samsung_clocksource_read(struct clocksource *c)
 {
 	return ~readl_relaxed(pwm.source_reg);
@@ -297,6 +309,8 @@ static struct clocksource samsung_clocksource = {
 	.name		= "samsung_clocksource_timer",
 	.rating		= 250,
 	.read		= samsung_clocksource_read,
+	.suspend	= samsung_clocksource_suspend,
+	.resume		= samsung_clocksource_resume,
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
Signature · 5 lines
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
#20 lore raw

PATCH v4 6/20 ARM: SAMSUNG: Unify base address definitions of timer block

In reply to Tomasz Figa

From: Tomasz Figa <[email protected]>

This patch makes all defintions of timer block base address use the same prefix to allow using the common name to define platform device resource.

---
 arch/arm/mach-s3c24xx/include/mach/map.h | 2 ++
 arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
 arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
 arch/arm/mach-s5pc100/include/mach/map.h | 1 +
 arch/arm/mach-s5pv210/include/mach/map.h | 1 +
 5 files changed, 6 insertions(+)
arch/arm/mach-s3c24xx/include/mach/map.h +2 -0
index 8ba381f..444793f 100644
@@ -167,4 +167,6 @@
 #define S3C_PA_SPI0		S3C2443_PA_SPI0
 #define S3C_PA_SPI1		S3C2443_PA_SPI1
 
+#define SAMSUNG_PA_TIMER	S3C2410_PA_TIMER
+
 #endif /* __ASM_ARCH_MAP_H */
arch/arm/mach-s3c64xx/include/mach/map.h +1 -0
index 8e2097b..f55ccb1 100644
@@ -121,5 +121,6 @@
 #define SAMSUNG_PA_ADC		S3C64XX_PA_ADC
 #define SAMSUNG_PA_CFCON	S3C64XX_PA_CFCON
 #define SAMSUNG_PA_KEYPAD	S3C64XX_PA_KEYPAD
+#define SAMSUNG_PA_TIMER	S3C64XX_PA_TIMER
 
 #endif /* __ASM_ARCH_6400_MAP_H */
arch/arm/mach-s5p64x0/include/mach/map.h +1 -0
index 0c0175d..50a6e96 100644
@@ -76,6 +76,7 @@
 #define S5P_PA_TIMER		S5P64X0_PA_TIMER
 
 #define SAMSUNG_PA_ADC		S5P64X0_PA_ADC
+#define SAMSUNG_PA_TIMER	S5P64X0_PA_TIMER
 
 /* UART */
 
arch/arm/mach-s5pc100/include/mach/map.h +1 -0
index 54bc4f8..2550b61 100644
@@ -116,6 +116,7 @@
 #define SAMSUNG_PA_ADC			S5PC100_PA_TSADC
 #define SAMSUNG_PA_CFCON		S5PC100_PA_CFCON
 #define SAMSUNG_PA_KEYPAD		S5PC100_PA_KEYPAD
+#define SAMSUNG_PA_TIMER		S5PC100_PA_TIMER
 
 #define S5PC100_VA_OTHERS		(S3C_VA_SYS + 0x10000)
 
arch/arm/mach-s5pv210/include/mach/map.h +1 -0
index b7c8a19..763929a 100644
@@ -139,6 +139,7 @@
 #define SAMSUNG_PA_ADC			S5PV210_PA_ADC
 #define SAMSUNG_PA_CFCON		S5PV210_PA_CFCON
 #define SAMSUNG_PA_KEYPAD		S5PV210_PA_KEYPAD
+#define SAMSUNG_PA_TIMER		S5PV210_PA_TIMER
 
 /* UART */
 
Signature · 1 line
1.8.3.2
#21 lore raw

PATCH v4 7/20 ARM: SAMSUNG: Add new PWM platform device

In reply to Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources.

---
 arch/arm/plat-samsung/devs.c                  | 17 +++++++++++++++++
 arch/arm/plat-samsung/include/plat/devs.h     |  1 +
 arch/arm/plat-samsung/include/plat/pwm-core.h | 24 ++++++++++++++++++++++++
 3 files changed, 42 insertions(+)
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
arch/arm/plat-samsung/devs.c +17 -0
index 0f9c3f4..bba6d78 100644
@@ -58,6 +58,7 @@
 #include <plat/keypad.h>
 #include <linux/platform_data/mmc-s3cmci.h>
 #include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <plat/pwm-core.h>
 #include <plat/sdhci.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
 #include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
 	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
 	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
 };
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
 #endif /* CONFIG_SAMSUNG_DEV_PWM */
 
 /* RTC */
arch/arm/plat-samsung/include/plat/devs.h +1 -0
index 87d501f..0dc4ac4 100644
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
 
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
 
 /* s3c2440 specific devices */
 
arch/arm/plat-samsung/include/plat/pwm-core.h new file +24 -0
new file mode 100644
index 0000000..df50f5c
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h
+ *
+ *  Copyright (c) 2013 Tomasz Figa <[email protected]>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include <clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */
Signature · 1 line
1.8.3.2
#22 lore raw

PATCH v4 7/20 ARM: SAMSUNG: Add new PWM platform device

Hi Tomasz,

Quoted 64 lines · Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources.

---
  arch/arm/plat-samsung/devs.c                  | 17 +++++++++++++++++
  arch/arm/plat-samsung/include/plat/devs.h     |  1 +
  arch/arm/plat-samsung/include/plat/pwm-core.h | 24 ++++++++++++++++++++++++
  3 files changed, 42 insertions(+)

create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h

arch/arm/plat-samsung/devs.c +17 -0
index 0f9c3f4..bba6d78 100644
@@ -58,6 +58,7 @@
  #include<plat/keypad.h>
  #include<linux/platform_data/mmc-s3cmci.h>
  #include<linux/platform_data/mtd-nand-s3c2410.h>
+#include<plat/pwm-core.h>
  #include<plat/sdhci.h>
  #include<linux/platform_data/touchscreen-s3c2410.h>
  #include<linux/platform_data/usb-s3c2410_udc.h>
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
  	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  };
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
  #endif /* CONFIG_SAMSUNG_DEV_PWM */
 
  /* RTC */
arch/arm/plat-samsung/include/plat/devs.h +1 -0
index 87d501f..0dc4ac4 100644
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
 
  extern struct platform_device samsung_asoc_idma;
  extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
 
  /* s3c2440 specific devices */
 
arch/arm/plat-samsung/include/plat/pwm-core.h new file +0 -0
new file mode 100644
index 0000000..df50f5c

arch/arm/plat-samsung/include/plat/pwm-core.h line 2

Quoted 2 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +2 -0
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h

Are such full file path names really useful, especially we are never sure they are up to date ? I guess this line could be removed.

Quoted 6 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +6 -0
+ *  Copyright (c) 2013 Tomasz Figa<[email protected]>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

arch/arm/plat-samsung/include/plat/pwm-core.h line 19

Quoted 10 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +10 -0
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include<clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);

nit: 'extern' is implicit for function declarations, it could be omitted here.

arch/arm/plat-samsung/include/plat/pwm-core.h line 24

Quoted 5 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +5 -0
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */

Thanks,
Sylwester

#23 lore raw

PATCH v4 7/20 ARM: SAMSUNG: Add new PWM platform device

Hi Sylwester,

Quoted 74 lines · On Sunday 21 of July 2013 21:46:09 Sylwester Nawrocki wrote:

Hi Tomasz,

Quoted 71 lines · Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources.

---

  arch/arm/plat-samsung/devs.c                  | 17 +++++++++++++++++
  arch/arm/plat-samsung/include/plat/devs.h     |  1 +
  arch/arm/plat-samsung/include/plat/pwm-core.h | 24

++++++++++++++++++++++++ 3 files changed, 42 insertions(+) create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h

(quoted diff) +0 -0

b/arch/arm/plat-samsung/devs.c index 0f9c3f4..bba6d78 100644

arch/arm/plat-samsung/devs.c +1 -0
@@ -58,6 +58,7 @@
 
  #include<plat/keypad.h>
  #include<linux/platform_data/mmc-s3cmci.h>
  #include<linux/platform_data/mtd-nand-s3c2410.h>
 
+#include<plat/pwm-core.h>
 
  #include<plat/sdhci.h>
  #include<linux/platform_data/touchscreen-s3c2410.h>
  #include<linux/platform_data/usb-s3c2410_udc.h>
arch/arm/plat-samsung/devs.c +16 -0
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
 
  	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
 
  };
 
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
  #endif /* CONFIG_SAMSUNG_DEV_PWM */

/* RTC */

(quoted diff) +0 -0

b/arch/arm/plat-samsung/include/plat/devs.h index 87d501f..0dc4ac4 100644

arch/arm/plat-samsung/include/plat/devs.h +1 -0
@@ -134,6 +134,7 @@ extern struct platform_device
 exynos4_device_spdif;
 
  extern struct platform_device samsung_asoc_idma;
  extern struct platform_device samsung_device_keypad;
 
+extern struct platform_device samsung_device_pwm;
 

/* s3c2440 specific devices */

Quoted 11 lines

arch/arm/plat-samsung/include/plat/pwm-core.h line 2

Quoted 8 lines
(quoted diff) +0 -0

b/arch/arm/plat-samsung/include/plat/pwm-core.h new file mode 100644 index 0000000..df50f5c

arch/arm/plat-samsung/include/plat/pwm-core.h new file +2 -0
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h

Are such full file path names really useful, especially we are never sure they are up to date ? I guess this line could be removed.

No, they are not. This is a copy-pasto I missed (notice onenand-core...).

Quoted 11 lines
Quoted 11 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +5 -0
+ *  Copyright (c) 2013 Tomasz Figa<[email protected]>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or

modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation.

arch/arm/plat-samsung/include/plat/pwm-core.h new file +4 -0
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
Quoted 8 lines

arch/arm/plat-samsung/include/plat/pwm-core.h line 19

Quoted 5 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +5 -0
+
+#include<clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);

nit: 'extern' is implicit for function declarations, it could be omitted here.

The extern kernel is used widely over the kernel (including headers in plat-samsung) and I prefer adding it for clarity.

Best regards,
Tomasz

#24 lore raw

PATCH v4 7/20 ARM: SAMSUNG: Add new PWM platform device

Quoted 115 lines · On Sunday 21 of July 2013 23:51:24 Tomasz Figa wrote:

Hi Sylwester,

Quoted 77 lines · On Sunday 21 of July 2013 21:46:09 Sylwester Nawrocki wrote:

Hi Tomasz,

Quoted 74 lines · Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents
the whole PWM/timer block and includes memory and IRQ resources.

---

  arch/arm/plat-samsung/devs.c                  | 17
  +++++++++++++++++
  arch/arm/plat-samsung/include/plat/devs.h     |  1 +
  arch/arm/plat-samsung/include/plat/pwm-core.h | 24

++++++++++++++++++++++++ 3 files changed, 42 insertions(+) create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h

(quoted diff) +0 -0

b/arch/arm/plat-samsung/devs.c index 0f9c3f4..bba6d78 100644

arch/arm/plat-samsung/devs.c +1 -0
@@ -58,6 +58,7 @@
 
  #include<plat/keypad.h>
  #include<linux/platform_data/mmc-s3cmci.h>
  #include<linux/platform_data/mtd-nand-s3c2410.h>
 
+#include<plat/pwm-core.h>
 
  #include<plat/sdhci.h>
  #include<linux/platform_data/touchscreen-s3c2410.h>
  #include<linux/platform_data/usb-s3c2410_udc.h>
arch/arm/plat-samsung/devs.c +13 -0
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
 
  	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
 
  };
 
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant

*pd)

arch/arm/plat-samsung/devs.c +3 -0
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
 
  #endif /* CONFIG_SAMSUNG_DEV_PWM */
 
  /* RTC */
(quoted diff) +0 -0

b/arch/arm/plat-samsung/include/plat/devs.h index 87d501f..0dc4ac4 100644

arch/arm/plat-samsung/include/plat/devs.h +1 -0
@@ -134,6 +134,7 @@ extern struct platform_device
 exynos4_device_spdif;
 
  extern struct platform_device samsung_asoc_idma;
  extern struct platform_device samsung_device_keypad;
 
+extern struct platform_device samsung_device_pwm;
 

/* s3c2440 specific devices */

Quoted 11 lines

arch/arm/plat-samsung/include/plat/pwm-core.h line 2

Quoted 8 lines
(quoted diff) +0 -0

b/arch/arm/plat-samsung/include/plat/pwm-core.h new file mode 100644 index 0000000..df50f5c

arch/arm/plat-samsung/include/plat/pwm-core.h new file +2 -0
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h

Are such full file path names really useful, especially we are never sure they are up to date ? I guess this line could be removed.

No, they are not. This is a copy-pasto I missed (notice onenand-core...).

Quoted 12 lines
Quoted 12 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +5 -0
+ *  Copyright (c) 2013 Tomasz Figa<[email protected]>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or

modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation.

arch/arm/plat-samsung/include/plat/pwm-core.h new file +5 -0
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
Quoted 8 lines
Quoted 5 lines
arch/arm/plat-samsung/include/plat/pwm-core.h new file +4 -0
+#include<clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant

*pd);

nit: 'extern' is implicit for function declarations, it could be omitted here.

Quoted 2 lines

The extern kernel is used widely over the kernel (including headers in plat-samsung) and I prefer adding it for clarity.

s/extern kernel/extern keyword/

I guess it's time to sleep.

Best regards,
Tomasz

#25 lore raw

PATCH v5 7/20 ARM: SAMSUNG: Add new PWM platform device

In reply to Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources.

---
 arch/arm/plat-samsung/devs.c                  | 17 +++++++++++++++++
 arch/arm/plat-samsung/include/plat/devs.h     |  1 +
 arch/arm/plat-samsung/include/plat/pwm-core.h | 22 ++++++++++++++++++++++
 3 files changed, 40 insertions(+)
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h

Changes since v4:
- cleaned up header of pwm-core.h file.

arch/arm/plat-samsung/devs.c +17 -0
index 0f9c3f4..bba6d78 100644
@@ -58,6 +58,7 @@
 #include <plat/keypad.h>
 #include <linux/platform_data/mmc-s3cmci.h>
 #include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <plat/pwm-core.h>
 #include <plat/sdhci.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
 #include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
 	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
 	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
 };
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
 #endif /* CONFIG_SAMSUNG_DEV_PWM */
 
 /* RTC */
arch/arm/plat-samsung/include/plat/devs.h +1 -0
index 87d501f..0dc4ac4 100644
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
 
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
 
 /* s3c2440 specific devices */
 
arch/arm/plat-samsung/include/plat/pwm-core.h new file +22 -0
new file mode 100644
index 0000000..77269a7
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Tomasz Figa <[email protected]>
+ *
+ * Samsung PWM controller platform data helpers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include <clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */
Signature · 1 line
1.8.3.2
#26 lore raw

PATCH v4 8/20 ARM: SAMSUNG: Set PWM platform data

In reply to Tomasz Figa

From: Tomasz Figa <[email protected]>

This patch adds PWM platform data needed for legacy (non-DT) platforms to handle SoC-specific bits of the PWM/timer block.

---
 arch/arm/mach-s3c24xx/common.c | 11 +++++++++++
 arch/arm/mach-s3c64xx/common.c | 11 +++++++++++
 arch/arm/mach-s5p64x0/common.c | 10 ++++++++++
 arch/arm/mach-s5pc100/common.c | 11 +++++++++++
 arch/arm/mach-s5pv210/common.c | 11 +++++++++++
 5 files changed, 54 insertions(+)
arch/arm/mach-s3c24xx/common.c +11 -0
index c157103..e5e7d7d 100644
@@ -27,6 +27,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/io.h>
@@ -49,6 +50,7 @@
 #include <plat/clock.h>
 #include <plat/cpu-freq.h>
 #include <plat/pll.h>
+#include <plat/pwm-core.h>
 
 #include "common.h"
 
@@ -216,6 +218,13 @@ static void s3c24xx_default_idle(void)
 		     S3C2410_CLKCON);
 }
 
+static struct samsung_pwm_variant s3c24xx_pwm_variant = {
+	.bits		= 16,
+	.div_base	= 1,
+	.has_tint_cstat	= false,
+	.tclk_mask	= (1 << 4),
+};
+
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
 	arm_pm_idle = s3c24xx_default_idle;
@@ -232,6 +241,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	s3c24xx_init_cpu();
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
 /* Serial port registrations */
arch/arm/mach-s3c64xx/common.c +11 -0
index 3f62e46..ca05e61 100644
@@ -27,6 +27,7 @@
 #include <linux/irq.h>
 #include <linux/gpio.h>
 #include <linux/irqchip/arm-vic.h>
+#include <clocksource/samsung_pwm.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -43,6 +44,7 @@
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
 #include <plat/irq-vic-timer.h>
+#include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -149,6 +151,13 @@ static struct device s3c64xx_dev = {
 	.bus	= &s3c64xx_subsys,
 };
 
+static struct samsung_pwm_variant s3c64xx_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 7) | (1 << 6) | (1 << 5),
+};
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -161,6 +170,8 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
 	s3c64xx_init_cpu();
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s3c64xx_pwm_variant);
 }
 
 static __init int s3c64xx_dev_init(void)
arch/arm/mach-s5p64x0/common.c +10 -0
index dfdfdc3..49687f2 100644
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
@@ -47,6 +48,7 @@
 #include <plat/fb-core.h>
 #include <plat/spi-core.h>
 #include <plat/gpio-cfg.h>
+#include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -157,6 +159,13 @@ static void s5p64x0_idle(void)
 	cpu_do_idle();
 }
 
+static struct samsung_pwm_variant s5p64x0_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= 0,
+};
+
 /*
  * s5p64x0_map_io
  *
@@ -176,6 +185,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 	samsung_wdt_reset_init(S3C_VA_WATCHDOG);
 
+	samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
 }
 
 void __init s5p6440_map_io(void)
arch/arm/mach-s5pc100/common.c +11 -0
index 4bdfecf..e0600af 100644
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/reboot.h>
@@ -46,6 +47,7 @@
 #include <plat/fb-core.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
+#include <plat/pwm-core.h>
 #include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -132,6 +134,13 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
 	}
 };
 
+static struct samsung_pwm_variant s5pc100_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 5),
+};
+
 /*
  * s5pc100_map_io
  *
@@ -149,6 +158,8 @@ void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
 	s5p_init_cpu(S5P_VA_CHIPID);
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s5pc100_pwm_variant);
 }
 
 void __init s5pc100_map_io(void)
arch/arm/mach-s5pv210/common.c +11 -0
index 023f1a7..306b29a 100644
@@ -19,6 +19,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/device.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
@@ -42,6 +43,7 @@
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 #include <plat/keypad-core.h>
+#include <plat/pwm-core.h>
 #include <plat/tv-core.h>
 #include <plat/spi-core.h>
 #include <plat/regs-serial.h>
@@ -148,6 +150,13 @@ void s5pv210_restart(enum reboot_mode mode, const char *cmd)
 	__raw_writel(0x1, S5P_SWRESET);
 }
 
+static struct samsung_pwm_variant s5pv210_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 5),
+};
+
 /*
  * s5pv210_map_io
  *
@@ -165,6 +174,8 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 	s5p_init_cpu(S5P_VA_CHIPID);
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s5pv210_pwm_variant);
 }
 
 void __init s5pv210_map_io(void)
Signature · 1 line
1.8.3.2
#27 lore raw

PATCH v4 9/20 ARM: SAMSUNG: Move all platforms to new clocksource driver

In reply to Tomasz Figa

This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver.

---
 arch/arm/Kconfig                | 10 +++++-----
 arch/arm/mach-s3c24xx/Kconfig   |  6 ------
 arch/arm/mach-s3c24xx/common.c  | 16 ++++++++++++++++
 arch/arm/mach-s3c64xx/Kconfig   |  2 --
 arch/arm/mach-s3c64xx/common.c  | 21 +++++++++++++++++----
 arch/arm/mach-s5p64x0/Kconfig   |  2 --
 arch/arm/mach-s5p64x0/common.c  | 17 +++++++++++++++++
 arch/arm/mach-s5pc100/Kconfig   |  1 -
 arch/arm/mach-s5pc100/common.c  | 17 +++++++++++++++++
 arch/arm/mach-s5pv210/Kconfig   |  1 -
 arch/arm/mach-s5pv210/common.c  | 17 +++++++++++++++++
 arch/arm/plat-samsung/s5p-irq.c |  3 ---
 12 files changed, 89 insertions(+), 24 deletions(-)
arch/arm/Kconfig +5 -5
index ba412e0..486ab0a 100644
@@ -700,7 +700,7 @@ config ARCH_S3C24XX
 	select ARCH_HAS_CPUFREQ
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
 	select HAVE_CLK
@@ -723,7 +723,7 @@ config ARCH_S3C64XX
 	select ARCH_REQUIRE_GPIOLIB
 	select ARM_VIC
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -748,7 +748,7 @@ config ARCH_S3C64XX
 config ARCH_S5P64X0
 	bool "Samsung S5P6440 S5P6450"
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -767,7 +767,7 @@ config ARCH_S5PC100
 	bool "Samsung S5PC100"
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -787,7 +787,7 @@ config ARCH_S5PV210
 	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_SPARSEMEM_ENABLE
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
arch/arm/mach-s3c24xx/Kconfig +0 -6
index 6d9252e..b8ec0ec 100644
@@ -30,7 +30,6 @@ config CPU_S3C2410
 	select S3C2410_CLOCK
 	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
 	select SAMSUNG_WDT_RESET
 	help
 	  Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +41,6 @@ config CPU_S3C2412
 	select CPU_LLSERIAL_S3C2440
 	select S3C2412_DMA if S3C24XX_DMA
 	select S3C2412_PM if PM
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -54,7 +52,6 @@ config CPU_S3C2416
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -65,7 +62,6 @@ config CPU_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
 	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
 	help
 	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -75,7 +71,6 @@ config CPU_S3C2442
 	select CPU_LLSERIAL_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
 	help
 	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -91,7 +86,6 @@ config CPU_S3C2443
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2443 SoC from the S3C24XX line
 
arch/arm/mach-s3c24xx/common.c +16 -0
index e5e7d7d..457261c 100644
@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c24xx_pwm_variant);
+}
+
 /* Serial port registrations */
 
 #define S3C2410_PA_UART0      (S3C24XX_PA_UART)
arch/arm/mach-s3c64xx/Kconfig +0 -2
index 2057853..041da51 100644
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
 # Configuration options for the S3C6410 CPU
 
 config CPU_S3C6400
-	select SAMSUNG_HRT
 	bool
 	help
 	  Enable S3C6400 CPU support
 
 config CPU_S3C6410
-	select SAMSUNG_HRT
 	bool
 	help
 	  Enable S3C6410 CPU support
arch/arm/mach-s3c64xx/common.c +17 -4
index ca05e61..73d79cf 100644
@@ -43,7 +43,6 @@
 #include <plat/pm.h>
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
-#include <plat/irq-vic-timer.h>
 #include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
@@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
 	.tclk_mask	= (1 << 7) | (1 << 6) | (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c64xx_pwm_variant);
+}
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
 	/* initialise the pair of VICs */
 	vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
 	vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-	/* add the timer sub-irqs */
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
 
 #define eint_offset(irq)	((irq) - IRQ_EINT(0))
arch/arm/mach-s5p64x0/Kconfig +0 -2
index 5a707bd..bb2111b 100644
@@ -11,14 +11,12 @@ config CPU_S5P6440
 	bool
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	select SAMSUNG_WAKEMASK if PM
 	help
 	  Enable S5P6440 CPU support
 
 config CPU_S5P6450
 	bool
-	select SAMSUNG_HRT
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
 	select SAMSUNG_WAKEMASK if PM
arch/arm/mach-s5p64x0/common.c +17 -0
index 49687f2..42e14f2 100644
@@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
 	.tclk_mask	= 0,
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5p64x0_pwm_variant);
+}
+
 /*
  * s5p64x0_map_io
  *
arch/arm/mach-s5pc100/Kconfig +0 -1
index 2f456a4..15170be 100644
@@ -11,7 +11,6 @@ config CPU_S5PC100
 	bool
 	select S5P_EXT_INT
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	help
 	  Enable S5PC100 CPU support
 
arch/arm/mach-s5pc100/common.c +17 -0
index e0600af..c5a8eea 100644
@@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pc100_pwm_variant);
+}
+
 /*
  * s5pc100_map_io
  *
arch/arm/mach-s5pv210/Kconfig +0 -1
index 0963283..caaedaf 100644
@@ -15,7 +15,6 @@ config CPU_S5PV210
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	help
 	  Enable S5PV210 CPU support
 
arch/arm/mach-s5pv210/common.c +17 -0
index 306b29a..26027a2 100644
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pv210_pwm_variant);
+}
+
 /*
  * s5pv210_map_io
  *
arch/arm/plat-samsung/s5p-irq.c +0 -3
index ff1a760..6729cb2 100644
@@ -19,7 +19,6 @@
 #include <mach/map.h>
 #include <plat/regs-timer.h>
 #include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
 	for (irq = 0; irq < num_vic; irq++)
 		vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
 #endif
-
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
Signature · 1 line
1.8.3.2
#28 lore raw

PATCH v4 9/20 ARM: SAMSUNG: Move all platforms to new clocksource driver

Quoted 5 lines · Tomasz Figa

This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver.

---

Quoted 353 lines
 arch/arm/Kconfig                | 10 +++++-----
 arch/arm/mach-s3c24xx/Kconfig   |  6 ------
 arch/arm/mach-s3c24xx/common.c  | 16 ++++++++++++++++
 arch/arm/mach-s3c64xx/Kconfig   |  2 --
 arch/arm/mach-s3c64xx/common.c  | 21 +++++++++++++++++----
 arch/arm/mach-s5p64x0/Kconfig   |  2 --
 arch/arm/mach-s5p64x0/common.c  | 17 +++++++++++++++++
 arch/arm/mach-s5pc100/Kconfig   |  1 -
 arch/arm/mach-s5pc100/common.c  | 17 +++++++++++++++++
 arch/arm/mach-s5pv210/Kconfig   |  1 -
 arch/arm/mach-s5pv210/common.c  | 17 +++++++++++++++++
 arch/arm/plat-samsung/s5p-irq.c |  3 ---
 12 files changed, 89 insertions(+), 24 deletions(-)
arch/arm/Kconfig +5 -5
index ba412e0..486ab0a 100644
@@ -700,7 +700,7 @@ config ARCH_S3C24XX
 	select ARCH_HAS_CPUFREQ
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
 	select HAVE_CLK
@@ -723,7 +723,7 @@ config ARCH_S3C64XX
 	select ARCH_REQUIRE_GPIOLIB
 	select ARM_VIC
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -748,7 +748,7 @@ config ARCH_S3C64XX
 config ARCH_S5P64X0
 	bool "Samsung S5P6440 S5P6450"
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -767,7 +767,7 @@ config ARCH_S5PC100
 	bool "Samsung S5PC100"
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
@@ -787,7 +787,7 @@ config ARCH_S5PV210
 	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_SPARSEMEM_ENABLE
 	select CLKDEV_LOOKUP
-	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select GPIO_SAMSUNG
arch/arm/mach-s3c24xx/Kconfig +0 -6
index 6d9252e..b8ec0ec 100644
@@ -30,7 +30,6 @@ config CPU_S3C2410
 	select S3C2410_CLOCK
 	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
 	select SAMSUNG_WDT_RESET
 	help
 	  Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +41,6 @@ config CPU_S3C2412
 	select CPU_LLSERIAL_S3C2440
 	select S3C2412_DMA if S3C24XX_DMA
 	select S3C2412_PM if PM
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -54,7 +52,6 @@ config CPU_S3C2416
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -65,7 +62,6 @@ config CPU_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
 	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
 	help
 	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -75,7 +71,6 @@ config CPU_S3C2442
 	select CPU_LLSERIAL_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
 	help
 	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -91,7 +86,6 @@ config CPU_S3C2443
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
 	help
 	  Support for the S3C2443 SoC from the S3C24XX line
 
arch/arm/mach-s3c24xx/common.c +16 -0
index e5e7d7d..457261c 100644
@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c24xx_pwm_variant);
+}
+
 /* Serial port registrations */
 
 #define S3C2410_PA_UART0      (S3C24XX_PA_UART)
arch/arm/mach-s3c64xx/Kconfig +0 -2
index 2057853..041da51 100644
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
 # Configuration options for the S3C6410 CPU
 
 config CPU_S3C6400
-	select SAMSUNG_HRT
 	bool
 	help
 	  Enable S3C6400 CPU support
 
 config CPU_S3C6410
-	select SAMSUNG_HRT
 	bool
 	help
 	  Enable S3C6410 CPU support
arch/arm/mach-s3c64xx/common.c +17 -4
index ca05e61..73d79cf 100644
@@ -43,7 +43,6 @@
 #include <plat/pm.h>
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
-#include <plat/irq-vic-timer.h>
 #include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
@@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
 	.tclk_mask	= (1 << 7) | (1 << 6) | (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c64xx_pwm_variant);
+}
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
 	/* initialise the pair of VICs */
 	vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
 	vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-	/* add the timer sub-irqs */
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
 
 #define eint_offset(irq)	((irq) - IRQ_EINT(0))
arch/arm/mach-s5p64x0/Kconfig +0 -2
index 5a707bd..bb2111b 100644
@@ -11,14 +11,12 @@ config CPU_S5P6440
 	bool
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	select SAMSUNG_WAKEMASK if PM
 	help
 	  Enable S5P6440 CPU support
 
 config CPU_S5P6450
 	bool
-	select SAMSUNG_HRT
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
 	select SAMSUNG_WAKEMASK if PM
arch/arm/mach-s5p64x0/common.c +17 -0
index 49687f2..42e14f2 100644
@@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
 	.tclk_mask	= 0,
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5p64x0_pwm_variant);
+}
+
 /*
  * s5p64x0_map_io
  *
arch/arm/mach-s5pc100/Kconfig +0 -1
index 2f456a4..15170be 100644
@@ -11,7 +11,6 @@ config CPU_S5PC100
 	bool
 	select S5P_EXT_INT
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	help
 	  Enable S5PC100 CPU support
 
arch/arm/mach-s5pc100/common.c +17 -0
index e0600af..c5a8eea 100644
@@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pc100_pwm_variant);
+}
+
 /*
  * s5pc100_map_io
  *
arch/arm/mach-s5pv210/Kconfig +0 -1
index 0963283..caaedaf 100644
@@ -15,7 +15,6 @@ config CPU_S5PV210
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
 	help
 	  Enable S5PV210 CPU support
 
arch/arm/mach-s5pv210/common.c +17 -0
index 306b29a..26027a2 100644
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pv210_pwm_variant);
+}
+
 /*
  * s5pv210_map_io
  *
arch/arm/plat-samsung/s5p-irq.c +0 -3
index ff1a760..6729cb2 100644
@@ -19,7 +19,6 @@
 #include <mach/map.h>
 #include <plat/regs-timer.h>
 #include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
 	for (irq = 0; irq < num_vic; irq++)
 		vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
 #endif
-
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
Signature · 5 lines
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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<http://www.linaro.org/linaro-blog/> Blog
#29 lore raw

PATCH v4 10/20 ARM: SAMSUNG: Remove old samsung-time driver

In reply to Tomasz Figa

This patch removes the old samsung-time driver, since all its users have been migrated to the new samsung_pwm_timer clocksource driver.

---
 arch/arm/plat-samsung/Kconfig                     |   8 -
 arch/arm/plat-samsung/Makefile                    |   1 -
 arch/arm/plat-samsung/include/plat/samsung-time.h |  23 --
 arch/arm/plat-samsung/samsung-time.c              | 394 ----------------------
 4 files changed, 426 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
arch/arm/plat-samsung/Kconfig +0 -8
index 3dc5cbe..3e880b7 100644
@@ -72,14 +72,6 @@ config SAMSUNG_ATAGS
 
 if SAMSUNG_ATAGS
 
-# timer options
-
-config SAMSUNG_HRT
-	bool
-	select SAMSUNG_DEV_PWM
-	help
-	  Use the High Resolution timer support
-
 # clock options
 
 config SAMSUNG_CLOCK
arch/arm/plat-samsung/Makefile +0 -1
index 98d07d8..cf41bf9 100644
@@ -12,7 +12,6 @@ obj-				:=
 # Objects we always build independent of SoC choice
 
 obj-y				+= init.o cpu.o
-obj-$(CONFIG_SAMSUNG_HRT) 	+= samsung-time.o
 
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= clock.o
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
arch/arm/plat-samsung/include/plat/samsung-time.h +0 -23
index 4cc99bb..209464a 100644
@@ -22,29 +22,6 @@ enum samsung_timer_mode {
 	SAMSUNG_PWM4,
 };
 
-struct samsung_timer_source {
-	unsigned int event_id;
-	unsigned int source_id;
-};
-
-/* Be able to sleep for atleast 4 seconds (usually more) */
-#define SAMSUNG_TIMER_MIN_RANGE	4
-
-#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
-#define TCNT_MAX		0xffff
-#define TSCALER_DIV		25
-#define TDIV			50
-#define TSIZE			16
-#else
-#define TCNT_MAX		0xffffffff
-#define TSCALER_DIV		2
-#define TDIV			2
-#define TSIZE			32
-#endif
-
-#define NON_PERIODIC		0
-#define PERIODIC		1
-
 extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
 					enum samsung_timer_mode source);
 
arch/arm/plat-samsung/samsung-time.c deleted +0 -394

394 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#30 lore raw

PATCH v4 11/20 ARM: SAMSUNG: Remove unused PWM timer IRQ chip code

In reply to Tomasz Figa

From: Tomasz Figa <[email protected]>

As the need for an IRQ chip handling PWM timer interrupt chaining is gone now, this patch removes all the code made unnecessary.

---
 arch/arm/Kconfig                                   |  1 -
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |  8 --
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |  2 -
 arch/arm/mach-s5pc100/include/mach/irqs.h          |  2 -
 arch/arm/mach-s5pv210/include/mach/irqs.h          |  2 -
 arch/arm/plat-samsung/Kconfig                      |  6 --
 arch/arm/plat-samsung/Makefile                     |  1 -
 arch/arm/plat-samsung/devs.c                       | 25 ++----
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 ---
 arch/arm/plat-samsung/include/plat/irqs.h          |  9 --
 arch/arm/plat-samsung/irq-vic-timer.c              | 98 ----------------------
 11 files changed, 6 insertions(+), 161 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
arch/arm/Kconfig +0 -1
index 486ab0a..fa7ffca 100644
@@ -739,7 +739,6 @@ config ARCH_S3C64XX
 	select SAMSUNG_ATAGS
 	select SAMSUNG_CLKSRC
 	select SAMSUNG_GPIOLIB_4BIT
-	select SAMSUNG_IRQ_VIC_TIMER
 	select SAMSUNG_WDT_RESET
 	select USB_ARCH_HAS_OHCI
 	help
arch/arm/mach-s3c64xx/include/mach/irqs.h +0 -8
index 96d60e0..67bbd1d 100644
@@ -107,14 +107,6 @@
 #define IRQ_TC			IRQ_PENDN
 #define IRQ_ADC			S3C64XX_IRQ_VIC1(31)
 
-#define S3C64XX_TIMER_IRQ(x)	S3C_IRQ(64 + (x))
-
-#define IRQ_TIMER0		S3C64XX_TIMER_IRQ(0)
-#define IRQ_TIMER1		S3C64XX_TIMER_IRQ(1)
-#define IRQ_TIMER2		S3C64XX_TIMER_IRQ(2)
-#define IRQ_TIMER3		S3C64XX_TIMER_IRQ(3)
-#define IRQ_TIMER4		S3C64XX_TIMER_IRQ(4)
-
 /* compatibility for device defines */
 
 #define IRQ_IIC1		IRQ_S3C6410_IIC1
arch/arm/mach-s5p64x0/include/mach/irqs.h +0 -2
index 5b845e8..53982db 100644
@@ -141,8 +141,6 @@
 
 #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
 
-#define IRQ_TIMER_BASE		(11)
-
 /* Set the default NR_IRQS */
 
 #define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
arch/arm/mach-s5pc100/include/mach/irqs.h +0 -2
index 2870f12..d2eb475 100644
@@ -97,8 +97,6 @@
 #define IRQ_SDMFIQ		S5P_IRQ_VIC2(31)
 #define IRQ_VIC_END		S5P_IRQ_VIC2(31)
 
-#define IRQ_TIMER_BASE		(11)
-
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
arch/arm/mach-s5pv210/include/mach/irqs.h +0 -2
index e777e01..5e0de3a 100644
@@ -118,8 +118,6 @@
 #define IRQ_MDNIE3		S5P_IRQ_VIC3(8)
 #define IRQ_VIC_END		S5P_IRQ_VIC3(31)
 
-#define IRQ_TIMER_BASE		(11)
-
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
arch/arm/plat-samsung/Kconfig +0 -6
index 3e880b7..b21d9d5 100644
@@ -25,7 +25,6 @@ config PLAT_S5P
 	select S5P_GPIO_DRVSTR
 	select SAMSUNG_CLKSRC if !COMMON_CLK
 	select SAMSUNG_GPIOLIB_4BIT
-	select SAMSUNG_IRQ_VIC_TIMER
 	help
 	  Base platform code for Samsung's S5P series SoC.
 
@@ -91,11 +90,6 @@ config S5P_CLOCK
 
 # options for IRQ support
 
-config SAMSUNG_IRQ_VIC_TIMER
-       bool
-       help
-         Internal configuration to build the VIC timer interrupt code.
-
 config S5P_IRQ
 	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
 	help
arch/arm/plat-samsung/Makefile +0 -1
index cf41bf9..aafbe56 100644
@@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
 obj-$(CONFIG_SAMSUNG_CLKSRC)	+= clock-clksrc.o
 obj-$(CONFIG_S5P_CLOCK)		+= s5p-clock.o
 
-obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
 obj-$(CONFIG_S5P_IRQ)		+= s5p-irq.o
 obj-$(CONFIG_S5P_EXT_INT)	+= s5p-irq-eint.o
 obj-$(CONFIG_S5P_GPIO_INT)	+= s5p-irq-gpioint.o
arch/arm/plat-samsung/devs.c +6 -19
index bba6d78..290f63a 100644
@@ -1099,22 +1099,9 @@ arch_initcall(s5p_pmu_init);
 
 #ifdef CONFIG_SAMSUNG_DEV_PWM
 
-#define TIMER_RESOURCE_SIZE (1)
-
-#define TIMER_RESOURCE(_tmr, _irq)			\
-	(struct resource [TIMER_RESOURCE_SIZE]) {	\
-		[0] = {					\
-			.start	= _irq,			\
-			.end	= _irq,			\
-			.flags	= IORESOURCE_IRQ	\
-		}					\
-	}
-
-#define DEFINE_S3C_TIMER(_tmr_no, _irq)			\
+#define DEFINE_S3C_TIMER(_tmr_no)			\
 	.name		= "s3c24xx-pwm",		\
 	.id		= _tmr_no,			\
-	.num_resources	= TIMER_RESOURCE_SIZE,		\
-	.resource	= TIMER_RESOURCE(_tmr_no, _irq),	\
 
 /*
  * since we already have an static mapping for the timer,
@@ -1122,11 +1109,11 @@ arch_initcall(s5p_pmu_init);
  */
 
 struct platform_device s3c_device_timer[] = {
-	[0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
-	[1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
-	[2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
-	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
-	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
+	[0] = { DEFINE_S3C_TIMER(0) },
+	[1] = { DEFINE_S3C_TIMER(1) },
+	[2] = { DEFINE_S3C_TIMER(2) },
+	[3] = { DEFINE_S3C_TIMER(3) },
+	[4] = { DEFINE_S3C_TIMER(4) },
 };
 
 static struct resource samsung_pwm_resource[] = {
arch/arm/plat-samsung/include/plat/irq-vic-timer.h deleted +0 -13
deleted file mode 100644
index 5b9c42f..0000000
@@ -1,13 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
- *
- * Copyright (c) 2010 Simtec Electronics
- *	Ben Dooks <[email protected]>
- *
- * Header file for Samsung SoC IRQ VIC timer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
arch/arm/plat-samsung/include/plat/irqs.h +0 -9
index df46b77..039001c 100644
@@ -44,15 +44,6 @@
 #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
-
-#define IRQ_TIMER0		S5P_TIMER_IRQ(0)
-#define IRQ_TIMER1		S5P_TIMER_IRQ(1)
-#define IRQ_TIMER2		S5P_TIMER_IRQ(2)
-#define IRQ_TIMER3		S5P_TIMER_IRQ(3)
-#define IRQ_TIMER4		S5P_TIMER_IRQ(4)
-#define IRQ_TIMER_COUNT		(5)
-
 #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
 					: ((x) - 16 + S5P_EINT_BASE2))
 
arch/arm/plat-samsung/irq-vic-timer.c deleted +0 -98

98 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#31 lore raw

PATCH v4 12/20 pwm: samsung: Rename to pwm-samsung-legacy

In reply to Tomasz Figa

This patch renames the old pwm-samsung driver to pwm-samsung-legacy to create place for the new, rewritten, DT-aware pwm-samsung driver using Samsung PWM/timer master driver.

---
 drivers/pwm/Makefile                                | 2 +-
 drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} (100%)
drivers/pwm/Makefile +1 -1
index 77a8c18..aa94807 100644
@@ -11,7 +11,7 @@ obj-$(CONFIG_PWM_PCA9685)	+= pwm-pca9685.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
-obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung-legacy.c renamed from drivers/pwm/pwm-samsung.c +0 -0
similarity index 100%
rename from drivers/pwm/pwm-samsung.c
rename to drivers/pwm/pwm-samsung-legacy.c
Signature · 1 line
1.8.3.2
#32 lore raw

PATCH v4 12/20 pwm: samsung: Rename to pwm-samsung-legacy

Quoted 10 lines · Tomasz Figa

This patch renames the old pwm-samsung driver to pwm-samsung-legacy to create place for the new, rewritten, DT-aware pwm-samsung driver using Samsung PWM/timer master driver.

---
 drivers/pwm/Makefile                                | 2 +-
 drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} (100%)

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#33 lore raw

PATCH v4 13/20 pwm: Add new pwm-samsung driver

In reply to Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 606 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 607 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c
drivers/pwm/Makefile +1 -0
index aa94807..86a5771 100644
@@ -12,6 +12,7 @@ obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung.c new file +606 -0

606 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#34 lore raw

PATCH v4 13/20 pwm: Add new pwm-samsung driver

Quoted 9 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---
  drivers/pwm/Makefile      |   1 +
  drivers/pwm/pwm-samsung.c | 606 ++++++++++++++++++++++++++++++++++++++++++++++
  2 files changed, 607 insertions(+)

create mode 100644 drivers/pwm/pwm-samsung.c

[...]

drivers/pwm/pwm-samsung.c line 394

Quoted 3 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+static const struct samsung_pwm_variant s3c64xx_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Initialization to 0 could be omitted, since it is implicit.

drivers/pwm/pwm-samsung.c line 401

Quoted 7 lines
drivers/pwm/pwm-samsung.c new file +7 -0
+	.has_tint_cstat	= true,
+	.tclk_mask	= BIT(7) | BIT(6) | BIT(5),
+};
+
+static const struct samsung_pwm_variant s5p64x0_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Ditto.

drivers/pwm/pwm-samsung.c line 407

Quoted 6 lines
drivers/pwm/pwm-samsung.c new file +6 -0
+	.has_tint_cstat	= true,
+};
+
+static const struct samsung_pwm_variant s5p_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Ditto.

Quoted 4 lines
drivers/pwm/pwm-samsung.c new file +4 -0
+	.has_tint_cstat	= true,
+	.tclk_mask	= BIT(5),
+};
+

[...]

drivers/pwm/pwm-samsung.c line 537

Quoted 8 lines
drivers/pwm/pwm-samsung.c new file +8 -0
+static int pwm_samsung_remove(struct platform_device *pdev)
+{
+	struct samsung_pwm_chip *chip = platform_get_drvdata(pdev);
+	int ret;
+
+	ret = pwmchip_remove(&chip->chip);
+	if (ret<  0)
+		return ret;

Since return value of the remove() callback is happily ignored by the driver core I think there is no point in returning an error here like this. Wouldn't it be more sensible to just call all the cleanup functions unconditionally ? At least potentially wrong state of the clock could be avoided.

drivers/pwm/pwm-samsung.c line 528

Quoted 5 lines
drivers/pwm/pwm-samsung.c new file +5 -0
+
+	clk_disable_unprepare(chip->base_clk);
+
+	return 0;
+}

--
Regards,
Sylwester

#35 lore raw

PATCH v4 13/20 pwm: Add new pwm-samsung driver

Quoted 13 lines · On Sunday 21 of July 2013 21:50:47 Sylwester Nawrocki wrote:
Quoted 11 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---

  drivers/pwm/Makefile      |   1 +
  drivers/pwm/pwm-samsung.c | 606

++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 607 insertions(+)
create mode 100644 drivers/pwm/pwm-samsung.c

Quoted 7 lines

[...]

drivers/pwm/pwm-samsung.c line 394

Quoted 3 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+static const struct samsung_pwm_variant s3c64xx_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Initialization to 0 could be omitted, since it is implicit.

Well, I'd prefer keeping this as is, for clarity. It improves code readability, because you don't have to look at struct definition to see all the fields.

Quoted 26 lines

drivers/pwm/pwm-samsung.c line 401

Quoted 7 lines
drivers/pwm/pwm-samsung.c new file +7 -0
+	.has_tint_cstat	= true,
+	.tclk_mask	= BIT(7) | BIT(6) | BIT(5),
+};
+
+static const struct samsung_pwm_variant s5p64x0_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Ditto.

drivers/pwm/pwm-samsung.c line 407

Quoted 6 lines
drivers/pwm/pwm-samsung.c new file +6 -0
+	.has_tint_cstat	= true,
+};
+
+static const struct samsung_pwm_variant s5p_variant = {
+	.bits		= 32,
+	.div_base	= 0,

Ditto.

Quoted 4 lines
drivers/pwm/pwm-samsung.c new file +4 -0
+	.has_tint_cstat	= true,
+	.tclk_mask	= BIT(5),
+};
+

[...]

Quoted 14 lines

drivers/pwm/pwm-samsung.c line 537

Quoted 8 lines
drivers/pwm/pwm-samsung.c new file +8 -0
+static int pwm_samsung_remove(struct platform_device *pdev)
+{
+	struct samsung_pwm_chip *chip = platform_get_drvdata(pdev);
+	int ret;
+
+	ret = pwmchip_remove(&chip->chip);
+	if (ret < 0)
+		return ret;

Since return value of the remove() callback is happily ignored by the driver core I think there is no point in returning an error here like this. Wouldn't it be more sensible to just call all the cleanup functions unconditionally ? At least potentially wrong state of the clock could be avoided.

IMHO handling the errors correctly here is more future-proof. Driver core might be modified to handle errors in future and this driver will not need to be modified.

Best regards,
Tomasz

#36 lore raw

PATCH v5 13/20 pwm: Add new pwm-samsung driver

In reply to Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 611 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 612 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c

Changes since v4:
- made definition of TCON_AUTORELOAD macro more readable,
- renamed s5p_variant to s5pc100_variant,
- replaced overlooked pr_err() with dev_err().

drivers/pwm/Makefile +1 -0
index aa94807..86a5771 100644
@@ -12,6 +12,7 @@ obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung.c new file +611 -0

611 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#37 lore raw

PATCH v6 13/20 pwm: Add new pwm-samsung driver

This patch introduces new Samsung PWM driver, which is completely rewritten to be multiplatform- and DeviceTree-aware.

In addition, remaining problems of old driver are fixed, such as:
- proper handling of hardware variants,
- synchronization on SMP systems,
- handling of boundary parameter values,
- hardware sharing with PWM clocksource driver,
- undefined state of PWM output after stopping PWM channel.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 618 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 619 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c

Changes since v5:
- No functional changes, just following cosmetic improvements.
- Used BIT() macro to define bits instead of shifting 1s directly.
- Added comment about bit layout in TCON register.
- Made macros used to define bits have more meaningful parameter names.
- Updated commit message.

drivers/pwm/Makefile +1 -0
index aa94807..86a5771 100644
@@ -12,6 +12,7 @@ obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung.c new file +618 -0

618 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#38 lore raw

PATCH v6 13/20 pwm: Add new pwm-samsung driver

Hi Tomasz,

drivers/pwm/pwm-samsung.c line 104

Quoted 13 lines
drivers/pwm/pwm-samsung.c new file +13 -0
+#ifndef CONFIG_CLKSRC_SAMSUNG_PWM
+/*
+ * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
+ * and some registers need access synchronization. If both drivers are
+ * compiled in, the spinlock is defined in the clocksource driver,
+ * otherwise following definition is used.
+ *
+ * Currently we do not need any more complex synchronization method
+ * because all the supported SoCs contain only one instance of the PWM
+ * IP. Should this change, both drivers will need to be modified to
+ * properly synchronize accesses to particular instances.
+ */
+static DEFINE_SPINLOCK(samsung_pwm_lock);

Shouldn't this not be static? It's declared in clocksource/samsung_pwm.h whether or not the samsung_pwm_timer is compiled in or not.

Thanks,
Andrew

#39 lore raw

PATCH v6 13/20 pwm: Add new pwm-samsung driver

Quoted 18 lines · On Wednesday 07 of August 2013 12:35:42 Andrew Bresticker wrote:

Hi Tomasz,

Quoted 6 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+#ifndef CONFIG_CLKSRC_SAMSUNG_PWM
+/*
+ * PWM block is shared between pwm-samsung and samsung_pwm_timer

drivers + * and some registers need access synchronization. If both drivers are + * compiled in, the spinlock is defined in the clocksource driver, + * otherwise following definition is used.

Quoted 8 lines

+ *
+ * Currently we do not need any more complex synchronization method
+ * because all the supported SoCs contain only one instance of the PWM
+ * IP. Should this change, both drivers will need to be modified to
+ * properly synchronize accesses to particular instances.
+ */
+static DEFINE_SPINLOCK(samsung_pwm_lock);

Shouldn't this not be static?

It should be static, when the clocksource driver is not used, but...

Quoted 3 lines

It's declared in
clocksource/samsung_pwm.h whether or not the samsung_pwm_timer is compiled in or not.

..it should not be defined as non-static in this case (= an ifdef is needed in this header). I believe I had this already fixed, not sure what happened with the fix...

Best regards,
Tomasz

#40 lore raw

PATCH v6 13/20 pwm: Add new pwm-samsung driver

Quoted 3 lines

..it should not be defined as non-static in this case (= an ifdef is needed in this header). I believe I had this already fixed, not sure what happened with the fix...

Perhaps this is it: https://patchwork.kernel.org/patch/2787271/. That should probably land with this patchset too.

Thanks,
Andrew

#41 lore raw

PATCH v6 13/20 pwm: Add new pwm-samsung driver

Quoted 6 lines · On Thursday 08 of August 2013 10:13:27 Andrew Bresticker wrote:
Quoted 3 lines

..it should not be defined as non-static in this case (= an ifdef is needed in this header). I believe I had this already fixed, not sure what happened with the fix...

Perhaps this is it: https://patchwork.kernel.org/patch/2787271/. That should probably land with this patchset too.

Oh yes, this is it.

I know what happened now. This series was already queued for 3.11 in Samsung tree. After a bit of testing in linux-next Bart found the build error and sent a fix, which was going to be merged for 3.11 as well. However since there have been some problems just before merge window started, this series had to be dropped, including the fixup patch.

Thanks for reporting. Let me try to sort this out.

Best regards,
Tomasz

#42 lore raw

PATCH v4 13/20 pwm: Add new pwm-samsung driver

In reply to Tomasz Figa
Quoted 9 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 606 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 607 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c

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#43 lore raw

PATCH v4 14/20 ARM: SAMSUNG: Rework private data handling in dev-backlight

In reply to Tomasz Figa

This patch modifies dev-backlight helpers to get private data using container_of instead of abusing platform_data field of PWM device.

---
 arch/arm/plat-samsung/dev-backlight.c | 51 ++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 22 deletions(-)
arch/arm/plat-samsung/dev-backlight.c +29 -22
index 5f197dc..e467a01 100644
@@ -20,13 +20,18 @@
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
 
+struct samsung_bl_drvdata {
+	struct platform_pwm_backlight_data plat_data;
+	struct samsung_bl_gpio_info *gpio_info;
+};
+
 static int samsung_bl_init(struct device *dev)
 {
 	int ret = 0;
-	struct platform_device *timer_dev =
-			container_of(dev->parent, struct platform_device, dev);
-	struct samsung_bl_gpio_info *bl_gpio_info =
-			timer_dev->dev.platform_data;
+	struct platform_pwm_backlight_data *pdata = dev->platform_data;
+	struct samsung_bl_drvdata *drvdata = container_of(pdata,
+					struct samsung_bl_drvdata, plat_data);
+	struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
 
 	ret = gpio_request(bl_gpio_info->no, "Backlight");
 	if (ret) {
@@ -42,10 +47,10 @@ static int samsung_bl_init(struct device *dev)
 
 static void samsung_bl_exit(struct device *dev)
 {
-	struct platform_device *timer_dev =
-			container_of(dev->parent, struct platform_device, dev);
-	struct samsung_bl_gpio_info *bl_gpio_info =
-			timer_dev->dev.platform_data;
+	struct platform_pwm_backlight_data *pdata = dev->platform_data;
+	struct samsung_bl_drvdata *drvdata = container_of(pdata,
+					struct samsung_bl_drvdata, plat_data);
+	struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
 
 	s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
 	gpio_free(bl_gpio_info->no);
@@ -60,12 +65,14 @@ static void samsung_bl_exit(struct device *dev)
  * for their specific boards
  */
 
-static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = {
-	.max_brightness = 255,
-	.dft_brightness = 255,
-	.pwm_period_ns  = 78770,
-	.init           = samsung_bl_init,
-	.exit           = samsung_bl_exit,
+static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = {
+	.plat_data = {
+		.max_brightness = 255,
+		.dft_brightness = 255,
+		.pwm_period_ns  = 78770,
+		.init           = samsung_bl_init,
+		.exit           = samsung_bl_exit,
+	},
 };
 
 static struct platform_device samsung_dfl_bl_device __initdata = {
@@ -82,6 +89,7 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 {
 	int ret = 0;
 	struct platform_device *samsung_bl_device;
+	struct samsung_bl_drvdata *samsung_bl_drvdata;
 	struct platform_pwm_backlight_data *samsung_bl_data;
 
 	samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
@@ -91,17 +99,19 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 		return;
 	}
 
-	samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data,
-		sizeof(struct platform_pwm_backlight_data), samsung_bl_device);
-	if (!samsung_bl_data) {
+	samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data,
+				sizeof(samsung_dfl_bl_data), GFP_KERNEL);
+	if (!samsung_bl_drvdata) {
 		printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
 		goto err_data;
 	}
+	samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data;
+	samsung_bl_drvdata->gpio_info = gpio_info;
+	samsung_bl_data = &samsung_bl_drvdata->plat_data;
 
 	/* Copy board specific data provided by user */
 	samsung_bl_data->pwm_id = bl_data->pwm_id;
-	samsung_bl_device->dev.parent =
-			&s3c_device_timer[samsung_bl_data->pwm_id].dev;
+	samsung_bl_device->dev.parent = &samsung_device_pwm.dev;
 
 	if (bl_data->max_brightness)
 		samsung_bl_data->max_brightness = bl_data->max_brightness;
@@ -122,9 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	if (bl_data->check_fb)
 		samsung_bl_data->check_fb = bl_data->check_fb;
 
-	/* Keep the GPIO info for future use */
-	s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
-
 	/* Register the specific PWM timer dev for Backlight control */
 	ret = platform_device_register(
 			&s3c_device_timer[samsung_bl_data->pwm_id]);
Signature · 1 line
1.8.3.2
#44 lore raw

PATCH v4 15/20 ARM: SAMSUNG: Modify board files to use new PWM platform device

In reply to Tomasz Figa

This patch modifies any board files using the legacy PWM device to use the new device instead.

---
 arch/arm/mach-s3c24xx/mach-h1940.c    |  4 ++--
 arch/arm/mach-s3c24xx/mach-rx1950.c   |  5 ++---
 arch/arm/mach-s3c64xx/mach-crag6410.c |  4 ++--
 arch/arm/mach-s3c64xx/mach-hmt.c      |  4 ++--
 arch/arm/mach-s3c64xx/mach-smartq.c   |  4 ++--
 arch/arm/mach-s3c64xx/mach-smdk6410.c |  5 +++--
 arch/arm/mach-s5p64x0/mach-smdk6440.c |  5 +++--
 arch/arm/mach-s5p64x0/mach-smdk6450.c |  5 +++--
 arch/arm/mach-s5pc100/mach-smdkc100.c |  5 +++--
 arch/arm/mach-s5pv210/mach-smdkv210.c |  5 +++--
 arch/arm/plat-samsung/dev-backlight.c | 10 ----------
 11 files changed, 25 insertions(+), 31 deletions(-)
arch/arm/mach-s3c24xx/mach-h1940.c +2 -2
index af4334d..74dd479 100644
@@ -512,7 +512,7 @@ static struct platform_pwm_backlight_data backlight_data = {
 static struct platform_device h1940_backlight = {
 	.name = "pwm-backlight",
 	.dev  = {
-		.parent = &s3c_device_timer[0].dev,
+		.parent = &samsung_device_pwm.dev,
 		.platform_data = &backlight_data,
 	},
 	.id   = -1,
@@ -632,7 +632,7 @@ static struct platform_device *h1940_devices[] __initdata = {
 	&h1940_device_bluetooth,
 	&s3c_device_sdi,
 	&s3c_device_rtc,
-	&s3c_device_timer[0],
+	&samsung_device_pwm,
 	&h1940_backlight,
 	&h1940_lcd_powerdev,
 	&s3c_device_adc,
arch/arm/mach-s3c24xx/mach-rx1950.c +2 -3
index 44ca018..206b1f7 100644
@@ -530,7 +530,7 @@ static struct platform_pwm_backlight_data rx1950_backlight_data = {
 static struct platform_device rx1950_backlight = {
 	.name = "pwm-backlight",
 	.dev = {
-		.parent = &s3c_device_timer[0].dev,
+		.parent = &samsung_device_pwm.dev,
 		.platform_data = &rx1950_backlight_data,
 	},
 };
@@ -717,8 +717,7 @@ static struct platform_device *rx1950_devices[] __initdata = {
 	&s3c_device_sdi,
 	&s3c_device_adc,
 	&s3c_device_ts,
-	&s3c_device_timer[0],
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&rx1950_backlight,
 	&rx1950_device_gpiokeys,
 	&power_supply,
arch/arm/mach-s3c64xx/mach-crag6410.c +2 -2
index 8ad88ac..28889cc 100644
@@ -120,7 +120,7 @@ static struct platform_device crag6410_backlight_device = {
 	.name		= "pwm-backlight",
 	.id		= -1,
 	.dev		= {
-		.parent	= &s3c_device_timer[0].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &crag6410_backlight_data,
 	},
 };
@@ -375,7 +375,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
 	&s3c_device_fb,
 	&s3c_device_ohci,
 	&s3c_device_usb_hsotg,
-	&s3c_device_timer[0],
+	&samsung_device_pwm,
 	&s3c64xx_device_iis0,
 	&s3c64xx_device_iis1,
 	&samsung_device_keypad,
arch/arm/mach-s3c64xx/mach-hmt.c +2 -2
index 5b7f357..f39569e 100644
@@ -123,7 +123,7 @@ static struct platform_pwm_backlight_data hmt_backlight_data = {
 static struct platform_device hmt_backlight_device = {
 	.name		= "pwm-backlight",
 	.dev		= {
-		.parent	= &s3c_device_timer[1].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &hmt_backlight_data,
 	},
 };
@@ -239,7 +239,7 @@ static struct platform_device *hmt_devices[] __initdata = {
 	&s3c_device_nand,
 	&s3c_device_fb,
 	&s3c_device_ohci,
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&hmt_backlight_device,
 	&hmt_leds_device,
 };
arch/arm/mach-s3c64xx/mach-smartq.c +2 -2
index 58ac990..86d980b 100644
@@ -157,7 +157,7 @@ static struct platform_pwm_backlight_data smartq_backlight_data = {
 static struct platform_device smartq_backlight_device = {
 	.name		= "pwm-backlight",
 	.dev		= {
-		.parent	= &s3c_device_timer[1].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &smartq_backlight_data,
 	},
 };
@@ -246,7 +246,7 @@ static struct platform_device *smartq_devices[] __initdata = {
 	&s3c_device_i2c0,
 	&s3c_device_ohci,
 	&s3c_device_rtc,
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_usb_hsotg,
 	&s3c64xx_device_iis0,
arch/arm/mach-s3c64xx/mach-smdk6410.c +3 -2
index bd3295a..d90b450 100644
@@ -274,6 +274,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
 	&s3c_device_i2c1,
 	&s3c_device_fb,
 	&s3c_device_ohci,
+	&samsung_device_pwm,
 	&s3c_device_usb_hsotg,
 	&s3c64xx_device_iisv4,
 	&samsung_device_keypad,
@@ -691,9 +692,9 @@ static void __init smdk6410_machine_init(void)
 
 	s3c_ide_set_platdata(&smdk6410_ide_pdata);
 
-	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
-
 	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
+
+	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
 }
 
 MACHINE_START(SMDK6410, "SMDK6410")
arch/arm/mach-s5p64x0/mach-smdk6440.c +3 -2
index 73f71a6..0b00304 100644
@@ -162,6 +162,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
 	&s3c_device_rtc,
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&s5p6440_device_iis,
@@ -254,8 +255,6 @@ static void __init smdk6440_machine_init(void)
 	i2c_register_board_info(1, smdk6440_i2c_devs1,
 			ARRAY_SIZE(smdk6440_i2c_devs1));
 
-	samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
-
 	s5p6440_set_lcd_interface();
 	s3c_fb_set_platdata(&smdk6440_lcd_pdata);
 
@@ -264,6 +263,8 @@ static void __init smdk6440_machine_init(void)
 	s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
 
 	platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
+
+	samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
 }
 
 MACHINE_START(SMDK6440, "SMDK6440")
arch/arm/mach-s5p64x0/mach-smdk6450.c +3 -2
index 18303e1..5949296 100644
@@ -180,6 +180,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
 	&s3c_device_rtc,
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&s5p6450_device_iis0,
@@ -273,8 +274,6 @@ static void __init smdk6450_machine_init(void)
 	i2c_register_board_info(1, smdk6450_i2c_devs1,
 			ARRAY_SIZE(smdk6450_i2c_devs1));
 
-	samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
-
 	s5p6450_set_lcd_interface();
 	s3c_fb_set_platdata(&smdk6450_lcd_pdata);
 
@@ -283,6 +282,8 @@ static void __init smdk6450_machine_init(void)
 	s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
 
 	platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
+
+	samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
 }
 
 MACHINE_START(SMDK6450, "SMDK6450")
arch/arm/mach-s5pc100/mach-smdkc100.c +3 -2
index 8c880f7..7c57a22 100644
@@ -194,6 +194,7 @@ static struct platform_device *smdkc100_devices[] __initdata = {
 	&s3c_device_hsmmc0,
 	&s3c_device_hsmmc1,
 	&s3c_device_hsmmc2,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&smdkc100_lcd_powerdev,
@@ -246,9 +247,9 @@ static void __init smdkc100_machine_init(void)
 	gpio_request(S5PC100_GPH0(6), "GPH0");
 	smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0);
 
-	samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
-
 	platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices));
+
+	samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
 }
 
 MACHINE_START(SMDKC100, "SMDKC100")
arch/arm/mach-s5pv210/mach-smdkv210.c +3 -2
index d50b6f1..6d72bb99 100644
@@ -218,6 +218,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
 	&s3c_device_i2c2,
+	&samsung_device_pwm,
 	&s3c_device_rtc,
 	&s3c_device_ts,
 	&s3c_device_usb_hsotg,
@@ -316,11 +317,11 @@ static void __init smdkv210_machine_init(void)
 
 	s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
 
-	samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
-
 	s3c_hsotg_set_platdata(&smdkv210_hsotg_pdata);
 
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
+
+	samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
 }
 
 MACHINE_START(SMDKV210, "SMDKV210")
arch/arm/plat-samsung/dev-backlight.c +0 -10
index e467a01..d51f956 100644
@@ -132,14 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	if (bl_data->check_fb)
 		samsung_bl_data->check_fb = bl_data->check_fb;
 
-	/* Register the specific PWM timer dev for Backlight control */
-	ret = platform_device_register(
-			&s3c_device_timer[samsung_bl_data->pwm_id]);
-	if (ret) {
-		printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
-		goto err_plat_reg1;
-	}
-
 	/* Register the Backlight dev */
 	ret = platform_device_register(samsung_bl_device);
 	if (ret) {
@@ -150,8 +142,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	return;
 
 err_plat_reg2:
-	platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
-err_plat_reg1:
 	kfree(samsung_bl_data);
 err_data:
 	kfree(samsung_bl_device);
Signature · 1 line
1.8.3.2
#45 lore raw

PATCH v4 16/20 pwm: Remove superseded pwm-samsung-legacy driver

In reply to Tomasz Figa

This patch removes the now unused pwm-samsung-legacy driver, which was replaced by new pwm-samsung driver.

---
 drivers/pwm/Makefile             |   1 -
 drivers/pwm/pwm-samsung-legacy.c | 353 ---------------------------------------
 2 files changed, 354 deletions(-)
 delete mode 100644 drivers/pwm/pwm-samsung-legacy.c
drivers/pwm/Makefile +0 -1
index 86a5771..77a8c18 100644
@@ -11,7 +11,6 @@ obj-$(CONFIG_PWM_PCA9685)	+= pwm-pca9685.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
-obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
drivers/pwm/pwm-samsung-legacy.c deleted +0 -353

353 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#46 lore raw

PATCH v4 16/20 pwm: Remove superseded pwm-samsung-legacy driver

Quoted 9 lines · Tomasz Figa

This patch removes the now unused pwm-samsung-legacy driver, which was replaced by new pwm-samsung driver.

---
 drivers/pwm/Makefile             |   1 -
 drivers/pwm/pwm-samsung-legacy.c | 353 ---------------------------------------
 2 files changed, 354 deletions(-)
 delete mode 100644 drivers/pwm/pwm-samsung-legacy.c

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#47 lore raw

PATCH v4 17/20 ARM: SAMSUNG: Remove old PWM timer platform devices

In reply to Tomasz Figa

This patch removes old Samsung PWM timer platform devices that are not used any more.

---
 arch/arm/plat-samsung/devs.c | 18 ------------------
 1 file changed, 18 deletions(-)
arch/arm/plat-samsung/devs.c +0 -18
index 290f63a..8ce0ac0 100644
@@ -1098,24 +1098,6 @@ arch_initcall(s5p_pmu_init);
 /* PWM Timer */
 
 #ifdef CONFIG_SAMSUNG_DEV_PWM
-
-#define DEFINE_S3C_TIMER(_tmr_no)			\
-	.name		= "s3c24xx-pwm",		\
-	.id		= _tmr_no,			\
-
-/*
- * since we already have an static mapping for the timer,
- * we do not bother setting any IO resource for the base.
- */
-
-struct platform_device s3c_device_timer[] = {
-	[0] = { DEFINE_S3C_TIMER(0) },
-	[1] = { DEFINE_S3C_TIMER(1) },
-	[2] = { DEFINE_S3C_TIMER(2) },
-	[3] = { DEFINE_S3C_TIMER(3) },
-	[4] = { DEFINE_S3C_TIMER(4) },
-};
-
 static struct resource samsung_pwm_resource[] = {
 	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
 };
Signature · 1 line
1.8.3.2
#48 lore raw

PATCH v4 18/20 ARM: SAMSUNG: Remove pwm-clock infrastructure

In reply to Tomasz Figa

Since all the used PWM prescalers and dividers configuration has been moved to appropriate drivers, the pwm-clock infrastructure is now unused and so this patch removes it.

---
 arch/arm/mach-s3c24xx/clock-s3c2410.c          |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c          |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c          |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c          |   2 -
 arch/arm/mach-s3c64xx/clock.c                  |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c          |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c          |   2 -
 arch/arm/mach-s5pc100/clock.c                  |   2 -
 arch/arm/mach-s5pv210/clock.c                  |   1 -
 arch/arm/plat-samsung/Makefile                 |   1 -
 arch/arm/plat-samsung/include/plat/clock.h     |   4 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h |  81 -----
 arch/arm/plat-samsung/pwm-clock.c              | 474 -------------------------
 13 files changed, 575 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
arch/arm/mach-s3c24xx/clock-s3c2410.c +0 -1
index 34fffdf..afa0267 100644
@@ -246,6 +246,5 @@ int __init s3c2410_baseclk_add(void)
 	       (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
 	       (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
 
-	s3c_pwmclk_init();
 	return 0;
 }
arch/arm/mach-s3c24xx/clock-s3c2412.c +0 -1
index 2cc017d..d8f253f 100644
@@ -757,6 +757,5 @@ int __init s3c2412_baseclk_add(void)
 	}
 
 	clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
-	s3c_pwmclk_init();
 	return 0;
 }
arch/arm/mach-s3c24xx/clock-s3c2416.c +0 -2
index 036056ce..d421a72 100644
@@ -168,6 +168,4 @@ void __init s3c2416_init_clocks(int xtal)
 	s3c24xx_register_clock(&hsmmc0_clk);
 	clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
 
-	s3c_pwmclk_init();
-
 }
arch/arm/mach-s3c24xx/clock-s3c2443.c +0 -2
index 0a53051..76cd31f 100644
@@ -209,6 +209,4 @@ void __init s3c2443_init_clocks(int xtal)
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s3c64xx/clock.c +0 -2
index 8499415..c1bcc4a 100644
@@ -1004,6 +1004,4 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
 	for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
 		s3c_register_clksrc(clksrc_cdev[cnt], 1);
 	clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5p64x0/clock-s5p6440.c +0 -2
index 35378152..ae34a1d 100644
@@ -629,6 +629,4 @@ void __init s5p6440_register_clocks(void)
 	clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5p64x0/clock-s5p6450.c +0 -2
index af384dd..0b3ca2e 100644
@@ -698,6 +698,4 @@ void __init s5p6450_register_clocks(void)
 	clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5pc100/clock.c +0 -2
index a206dc3..d0dc10e 100644
@@ -1358,6 +1358,4 @@ void __init s5pc100_register_clocks(void)
 		s3c_disable_clocks(clk_cdev[ptr], 1);
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5pv210/clock.c +0 -1
index f051f53..ca46372 100644
@@ -1362,5 +1362,4 @@ void __init s5pv210_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
 		s3c_disable_clocks(clk_cdev[ptr], 1);
 
-	s3c_pwmclk_init();
 }
arch/arm/plat-samsung/Makefile +0 -1
index aafbe56..5d7f839 100644
@@ -14,7 +14,6 @@ obj-				:=
 obj-y				+= init.o cpu.o
 
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= clock.o
-obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
 
 obj-$(CONFIG_SAMSUNG_CLKSRC)	+= clock-clksrc.o
 obj-$(CONFIG_S5P_CLOCK)		+= s5p-clock.o
arch/arm/plat-samsung/include/plat/clock.h +0 -4
index a62753d..254c3dd 100644
@@ -140,10 +140,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
 
 extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
 
-/* Init for pwm clock code */
-
-extern void s3c_pwmclk_init(void);
-
 /* Global watchdog clock used by arch_wtd_reset() callback */
 
 extern struct clk *s3c2410_wdtclk;
arch/arm/plat-samsung/include/plat/pwm-clock.h deleted +0 -81

81 lines not on this page · raw message

arch/arm/plat-samsung/pwm-clock.c deleted +0 -474

474 lines not on this page · raw message

Signature · 1 line
1.8.3.2
#49 lore raw

PATCH v4 19/20 ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header

In reply to Tomasz Figa

This patch removes remaining inclusions of plat/regs-timer.h as a preparation to remove the header.

As a part of this, things like save and restore of PWM registers are removed from SoC-specific code, because it is handled in appropriate drivers now.

---
 arch/arm/mach-s3c64xx/irq-pm.c  |  2 --
 arch/arm/mach-s5p64x0/pm.c      |  3 ---
 arch/arm/mach-s5pv210/pm.c      | 10 ----------
 arch/arm/plat-samsung/s5p-irq.c |  1 -
 4 files changed, 16 deletions(-)
arch/arm/mach-s3c64xx/irq-pm.c +0 -2
index 0c7e1d9..c3da1b6 100644
@@ -22,7 +22,6 @@
 #include <mach/map.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
 #include <mach/regs-gpio.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
@@ -43,7 +42,6 @@ static struct sleep_save irq_save[] = {
 	SAVE_ITEM(S3C64XX_EINT0FLTCON2),
 	SAVE_ITEM(S3C64XX_EINT0FLTCON3),
 	SAVE_ITEM(S3C64XX_EINT0MASK),
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
 };
 
 static struct irq_grp_save {
arch/arm/mach-s5p64x0/pm.c +0 -3
index 97c2a08a..861e15c 100644
@@ -18,7 +18,6 @@
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <plat/regs-timer.h>
 #include <plat/wakeup-mask.h>
 
 #include <mach/regs-clock.h>
@@ -48,8 +47,6 @@ static struct sleep_save s5p64x0_misc_save[] = {
 	SAVE_ITEM(S5P64X0_MEM0CONSLP1),
 	SAVE_ITEM(S5P64X0_MEM0DRVCON),
 	SAVE_ITEM(S5P64X0_MEM1DRVCON),
-
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
 };
 
 /* DPLL is present only in S5P6450 */
arch/arm/mach-s5pv210/pm.c +0 -10
index 2b68a67..3cf3f9c 100644
@@ -21,7 +21,6 @@
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <plat/regs-timer.h>
 
 #include <mach/regs-irq.h>
 #include <mach/regs-clock.h>
@@ -77,15 +76,6 @@ static struct sleep_save s5pv210_core_save[] = {
 	/* Clock ETC */
 	SAVE_ITEM(S5P_CLK_OUT),
 	SAVE_ITEM(S5P_MDNIE_SEL),
-
-	/* PWM Register */
-	SAVE_ITEM(S3C2410_TCFG0),
-	SAVE_ITEM(S3C2410_TCFG1),
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
-	SAVE_ITEM(S3C2410_TCON),
-	SAVE_ITEM(S3C2410_TCNTB(0)),
-	SAVE_ITEM(S3C2410_TCMPB(0)),
-	SAVE_ITEM(S3C2410_TCNTO(0)),
 };
 
 static int s5pv210_cpu_suspend(unsigned long arg)
arch/arm/plat-samsung/s5p-irq.c +0 -1
index 6729cb2..ddfaca9 100644
@@ -17,7 +17,6 @@
 
 #include <mach/irqs.h>
 #include <mach/map.h>
-#include <plat/regs-timer.h>
 #include <plat/cpu.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
Signature · 1 line
1.8.3.2
#50 lore raw

PATCH v4 20/20 ARM: SAMSUNG: Remove plat/regs-timer.h header

In reply to Tomasz Figa

Since all uses of the header has been removed by previous patches it can be removed safely.

---
 arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ------------------------
 1 file changed, 124 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
arch/arm/plat-samsung/include/plat/regs-timer.h deleted +0 -124
deleted file mode 100644
index d097d92..0000000
@@ -1,124 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
- *
- * Copyright (c) 2003 Simtec Electronics <[email protected]>
- *		      http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Timer configuration
-*/
-
-#ifndef __ASM_ARCH_REGS_TIMER_H
-#define __ASM_ARCH_REGS_TIMER_H
-
-#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
-#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
-
-#define S3C2410_TCFG0	      S3C_TIMERREG(0x00)
-#define S3C2410_TCFG1	      S3C_TIMERREG(0x04)
-#define S3C2410_TCON	      S3C_TIMERREG(0x08)
-
-#define S3C64XX_TINT_CSTAT    S3C_TIMERREG(0x44)
-
-#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
-#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
-#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
-#define S3C2410_TCFG_DEADZONE_MASK   (255<<16)
-#define S3C2410_TCFG_DEADZONE_SHIFT  (16)
-
-#define S3C2410_TCFG1_MUX4_DIV2	  (0<<16)
-#define S3C2410_TCFG1_MUX4_DIV4	  (1<<16)
-#define S3C2410_TCFG1_MUX4_DIV8	  (2<<16)
-#define S3C2410_TCFG1_MUX4_DIV16  (3<<16)
-#define S3C2410_TCFG1_MUX4_TCLK1  (4<<16)
-#define S3C2410_TCFG1_MUX4_MASK	  (15<<16)
-#define S3C2410_TCFG1_MUX4_SHIFT  (16)
-
-#define S3C2410_TCFG1_MUX3_DIV2	  (0<<12)
-#define S3C2410_TCFG1_MUX3_DIV4	  (1<<12)
-#define S3C2410_TCFG1_MUX3_DIV8	  (2<<12)
-#define S3C2410_TCFG1_MUX3_DIV16  (3<<12)
-#define S3C2410_TCFG1_MUX3_TCLK1  (4<<12)
-#define S3C2410_TCFG1_MUX3_MASK	  (15<<12)
-
-
-#define S3C2410_TCFG1_MUX2_DIV2	  (0<<8)
-#define S3C2410_TCFG1_MUX2_DIV4	  (1<<8)
-#define S3C2410_TCFG1_MUX2_DIV8	  (2<<8)
-#define S3C2410_TCFG1_MUX2_DIV16  (3<<8)
-#define S3C2410_TCFG1_MUX2_TCLK1  (4<<8)
-#define S3C2410_TCFG1_MUX2_MASK	  (15<<8)
-
-
-#define S3C2410_TCFG1_MUX1_DIV2	  (0<<4)
-#define S3C2410_TCFG1_MUX1_DIV4	  (1<<4)
-#define S3C2410_TCFG1_MUX1_DIV8	  (2<<4)
-#define S3C2410_TCFG1_MUX1_DIV16  (3<<4)
-#define S3C2410_TCFG1_MUX1_TCLK0  (4<<4)
-#define S3C2410_TCFG1_MUX1_MASK	  (15<<4)
-
-#define S3C2410_TCFG1_MUX0_DIV2	  (0<<0)
-#define S3C2410_TCFG1_MUX0_DIV4	  (1<<0)
-#define S3C2410_TCFG1_MUX0_DIV8	  (2<<0)
-#define S3C2410_TCFG1_MUX0_DIV16  (3<<0)
-#define S3C2410_TCFG1_MUX0_TCLK0  (4<<0)
-#define S3C2410_TCFG1_MUX0_MASK	  (15<<0)
-
-#define S3C2410_TCFG1_MUX_DIV2	  (0<<0)
-#define S3C2410_TCFG1_MUX_DIV4	  (1<<0)
-#define S3C2410_TCFG1_MUX_DIV8	  (2<<0)
-#define S3C2410_TCFG1_MUX_DIV16   (3<<0)
-#define S3C2410_TCFG1_MUX_TCLK    (4<<0)
-#define S3C2410_TCFG1_MUX_MASK	  (15<<0)
-
-#define S3C64XX_TCFG1_MUX_DIV1	  (0<<0)
-#define S3C64XX_TCFG1_MUX_DIV2	  (1<<0)
-#define S3C64XX_TCFG1_MUX_DIV4	  (2<<0)
-#define S3C64XX_TCFG1_MUX_DIV8    (3<<0)
-#define S3C64XX_TCFG1_MUX_DIV16   (4<<0)
-#define S3C64XX_TCFG1_MUX_TCLK    (5<<0)  /* 3 sets of TCLK */
-#define S3C64XX_TCFG1_MUX_MASK	  (15<<0)
-
-#define S3C2410_TCFG1_SHIFT(x)	  ((x) * 4)
-
-/* for each timer, we have an count buffer, an compare buffer and
- * an observation buffer
-*/
-
-/* WARNING - timer 4 has no buffer reg, and it's observation is@+4 */
-
-#define S3C2410_TCNTB(tmr)    S3C_TIMERREG2(tmr, 0x00)
-#define S3C2410_TCMPB(tmr)    S3C_TIMERREG2(tmr, 0x04)
-#define S3C2410_TCNTO(tmr)    S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
-
-#define S3C2410_TCON_T4RELOAD	  (1<<22)
-#define S3C2410_TCON_T4MANUALUPD  (1<<21)
-#define S3C2410_TCON_T4START	  (1<<20)
-
-#define S3C2410_TCON_T3RELOAD	  (1<<19)
-#define S3C2410_TCON_T3INVERT	  (1<<18)
-#define S3C2410_TCON_T3MANUALUPD  (1<<17)
-#define S3C2410_TCON_T3START	  (1<<16)
-
-#define S3C2410_TCON_T2RELOAD	  (1<<15)
-#define S3C2410_TCON_T2INVERT	  (1<<14)
-#define S3C2410_TCON_T2MANUALUPD  (1<<13)
-#define S3C2410_TCON_T2START	  (1<<12)
-
-#define S3C2410_TCON_T1RELOAD	  (1<<11)
-#define S3C2410_TCON_T1INVERT	  (1<<10)
-#define S3C2410_TCON_T1MANUALUPD  (1<<9)
-#define S3C2410_TCON_T1START	  (1<<8)
-
-#define S3C2410_TCON_T0DEADZONE	  (1<<4)
-#define S3C2410_TCON_T0RELOAD	  (1<<3)
-#define S3C2410_TCON_T0INVERT	  (1<<2)
-#define S3C2410_TCON_T0MANUALUPD  (1<<1)
-#define S3C2410_TCON_T0START	  (1<<0)
-
-#endif /*  __ASM_ARCH_REGS_TIMER_H */
-
-
-
Signature · 1 line
1.8.3.2
#51 lore raw

v4 cover Samsung PWM support cleanup

In reply to Tomasz Figa
Quoted 21 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource driver,
3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

Quoted 7 lines

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

[On S3C2440-based Mini2440 board]

I have retested this series on top of v3.11-rc1 with pwm-backlight (and buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope tomorrow, as it's a bit late
now. FWIW you can add to this series my:

Quoted 9 lines
[On a s3c2416 based machine]
[Also not sure on what boards, but still]

Thanks,
Sylwester

#52 lore raw

v4 cover Samsung PWM support cleanup

Quoted 31 lines · On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
Quoted 22 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource driver,
3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

Quoted 7 lines

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

[On S3C2440-based Mini2440 board]
Quoted 8 lines

I have retested this series on top of v3.11-rc1 with pwm-backlight (and buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope tomorrow, as it's a bit late
now. FWIW you can add to this series my:

Thanks. I hope we can finally get this series merged soon.

Best regards,
Tomasz

#53 lore raw

v4 cover Samsung PWM support cleanup

Quoted 40 lines · Tomasz Figa
Quoted 38 lines · On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
Quoted 22 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource driver,
3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

Quoted 7 lines

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

[On S3C2440-based Mini2440 board]

I have retested this series on top of v3.11-rc1 with pwm-backlight (and buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope tomorrow, as it's a bit late
now. FWIW you can add to this series my:

Quoted 4 lines
Quoted 1 line

Thanks. I hope we can finally get this series merged soon.

Yes, this whole patches look good to me, and I'd like to take this whole patches into the samsung tree...but need to get any response from PWM guy, Thierry Reding. Let's wait for his response...

Thanks,
Kukjin

#54 lore raw

v4 cover Samsung PWM support cleanup

In reply to Tomasz Figa
Quoted 33 lines · Kukjin Kim
Quoted 9 lines · Tomasz Figa
Quoted 7 lines · On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
Quoted 6 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource

driver,

Quoted 21 lines
Quoted 21 lines
Quoted 21 lines

3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

Quoted 8 lines
Quoted 4 lines
Quoted 4 lines
Quoted 2 lines
[On S3C2440-based Mini2440 board]

I have retested this series on top of v3.11-rc1 with pwm-backlight

(and

Quoted 3 lines
Quoted 3 lines

buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope

tomorrow,

Quoted 11 lines
Quoted 7 lines
Quoted 4 lines

as it's a bit late
now. FWIW you can add to this series my:

Thanks. I hope we can finally get this series merged soon.

Yes, this whole patches look good to me, and I'd like to take this whole patches into the samsung tree...but need to get any response from PWM guy, Thierry Reding. Let's wait for his response...

To be clarify, because his ack was on v3 and I remember he had a comment. So would be better if we could get his ack on pwm change again.

Thanks,
Kukjin

#55 lore raw

v4 cover Samsung PWM support cleanup

Quoted 63 lines · On Monday 22 of July 2013 11:01:32 Kukjin Kim wrote:
Quoted 42 lines · Kukjin Kim
Quoted 8 lines · Tomasz Figa
Quoted 7 lines · On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
Quoted 6 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place,
we can proceed with further cleanup of PWM timers support on Samsung
SoCs.>

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource

driver,

Quoted 26 lines
Quoted 26 lines
Quoted 26 lines

3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of
current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable,
breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one
using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper,
SMDK6410 with PWM backlight and Exynos4210-based Origen board (with
PWM0 attached to a scope)]

Quoted 10 lines
Quoted 4 lines
Quoted 4 lines
Quoted 2 lines
[On S3C2440-based Mini2440 board]

I have retested this series on top of v3.11-rc1 with pwm-backlight

(and

Quoted 3 lines
Quoted 3 lines

buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope

tomorrow,

Quoted 7 lines
Quoted 6 lines
Quoted 4 lines

as it's a bit late
now. FWIW you can add to this series my:

Thanks. I hope we can finally get this series merged soon.

Quoted 7 lines
Quoted 3 lines

Yes, this whole patches look good to me, and I'd like to take this whole patches into the samsung tree...but need to get any response from PWM guy, Thierry Reding. Let's wait for his response...

To be clarify, because his ack was on v3 and I remember he had a comment. So would be better if we could get his ack on pwm change again.

Sure.

Best regards,
Tomasz

#56 lore raw

v4 cover Samsung PWM support cleanup

Quoted 68 lines · Tomasz Figa
Quoted 67 lines · On Monday 22 of July 2013 11:01:32 Kukjin Kim wrote:
Quoted 42 lines · Kukjin Kim
Quoted 8 lines · Tomasz Figa
Quoted 7 lines · On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
Quoted 6 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place,
we can proceed with further cleanup of PWM timers support on Samsung
SoCs.>

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource

driver,

Quoted 26 lines
Quoted 26 lines
Quoted 26 lines

3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of
current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable,
breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one
using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper,
SMDK6410 with PWM backlight and Exynos4210-based Origen board (with
PWM0 attached to a scope)]

Quoted 10 lines
Quoted 4 lines
Quoted 4 lines
Quoted 2 lines
[On S3C2440-based Mini2440 board]

I have retested this series on top of v3.11-rc1 with pwm-backlight

(and

Quoted 3 lines
Quoted 3 lines

buzzer
as the output :)) on Mini2440. It seems to work well - generated frequencies are correct. I'll check pulse widths with a scope

tomorrow,

Quoted 10 lines
Quoted 6 lines
Quoted 4 lines

as it's a bit late
now. FWIW you can add to this series my:

Thanks. I hope we can finally get this series merged soon.

Yes, this whole patches look good to me, and I'd like to take this whole patches into the samsung tree...but need to get any response from PWM guy, Thierry Reding. Let's wait for his response...

Quoted 5 lines
Quoted 3 lines

To be clarify, because his ack was on v3 and I remember he had a comment. So would be better if we could get his ack on pwm change again.

Sure.

Patches 12, 13 and 16:

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#57 lore raw

v4 cover Samsung PWM support cleanup

In reply to Kukjin Kim
Quoted 10 lines · Kukjin Kim
Quoted 4 lines

Yes, this whole patches look good to me, and I'd like to take this whole patches into the samsung tree...but need to get any response from PWM guy, Thierry Reding. Let's wait for his response...

To be clarify, because his ack was on v3 and I remember he had a comment. So would be better if we could get his ack on pwm change again.

Thanks,
Kukjin

This is a nice cleanup series indeed.

Given the volume of changes coming from Tomasz, it seems appropriate that he just sends you pull requests with this as a branch when they are ready to go (i.e. have the appropriate acks), instead of you having to apply them by hand, Kukjin.

-Olof

#58 lore raw

v4 cover Samsung PWM support cleanup

In reply to Tomasz Figa
Quoted 2 lines · Tomasz Figa
[Also not sure on what boards, but still]

Just retested this (on Cragganmore), still works fine.
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#59 lore raw

v4 cover Samsung PWM support cleanup

In reply to Tomasz Figa

Hi Kukjin,

Since I think we already got all the necessary Acks, do you want me to send you a pull request or you already have this series applied (I can't see it in your tree on kernel.org)?

Best regards,
Tomasz

Quoted 155 lines · On Saturday 20 of July 2013 02:04:12 Tomasz Figa wrote:

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) fixing up few things in samsung_pwm_timer clocksource driver,
2) moving remaining Samsung platforms to the new clocksource driver,
3) removing old clocksource driver,
4) adding new multiplatform- and DT-aware PWM driver,
5) moving all Samsung platforms to use the new PWM driver,
6) removing old PWM driver,
7) removing all PWM-related code that is not used anymore.

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage this series first renames the old driver, then adds new one using original name, migrates all platforms to use it and then finally removes the old driver.

See particular patches for more detailed descriptions.

[On S3C6410-based Tiny6410 (Mini6410-compatible) with pwm-beeper, SMDK6410 with PWM backlight and Exynos4210-based Origen board (with PWM0 attached to a scope)]

[On S3C2440-based Mini2440 board]
[On a s3c2416 based machine]
[Also not sure on what boards, but still]

Changes since v3:
- added two extra clocksource driver fixes to the series (patches 1,
2), - added comment explaining why only a simple synchronization is needed between clocksource and PWM drivers,
- some stylistic fixes,
- rebased to 3.11-rc1.
Changes since v2:
- replaced __raw_{readl,writel} with {readl,writel},
- corrected some commit messages,
- used git format-patch -M to detect rename.
Changes since v1:
- made sure that suspend/resume is handled correctly in both clocksource and PWM drivers,
- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(), which assumes that PWM device has been already registered,
- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup of most code originally copied from previous PWM driver,
- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Tomasz Figa (20):
clocksource: samsung_pwm_timer: Do not request PWM mem region
clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |  11 +-
 arch/arm/mach-s3c24xx/Kconfig                      |   6 -
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   2 -
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   1 -
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   1 -
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474 --------------
arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/Kconfig                        |   1 -
 drivers/clocksource/samsung_pwm_timer.c            |  98 +--
 drivers/pwm/pwm-samsung.c                          | 701
++++++++++++++------- 61 files changed, 768 insertions(+), 1662
deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
#60 lore raw

v4 cover Samsung PWM support cleanup

Quoted 5 lines · Tomasz Figa

Hi Kukjin,

Since I think we already got all the necessary Acks, do you want me to send you a pull request or you already have this series applied (I can't see it in your tree on kernel.org)?

I'll take it directly. Please send me a pull request.

Thanks,

-Olof

#61 lore raw

v4 cover Samsung PWM support cleanup

Quoted 9 lines · Olof Johansson
Quoted 5 lines · Tomasz Figa

Hi Kukjin,

Since I think we already got all the necessary Acks, do you want me to send you a pull request or you already have this series applied (I can't see it in your tree on kernel.org)?

I'll take it directly. Please send me a pull request.

Sorry for late response :(

Yes, I'm OK either way, my pulling or Olof's taking in this case. So Tomasz, please send a pull request for this series, it should be fine to me.

Thanks,
Kukjin