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powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

PATCH Superseded ying.zhang at freescale.com 3 participants 12 messages Jul 25, 2013 – Aug 15, 2013 1 message not in the archive

Subsystems (5)
PowerPC Kbuild Memory technology devices (MTD) MMC, SD and SDIO +1 more subsystems

v10 of 11 Superseded Latest is v11 →

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ying.zhang at freescale.com

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#0 lore raw

PATCH v10 1/7 powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

From: Ying Zhang <[email protected]>

1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- No change.
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No change.
Change from v5:
- No change.
Change from v4:
- Use !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL).
- to replace to new symbols.
Change from v3:
- Give up new symbol and delete the line.
- ifndef CONFIG_SPL_BUILD in common/env_common.c.
Change from v2:
- Split from "Add the symbol for the minimal SPL to eliminate unused code". Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 arch/powerpc/cpu/mpc85xx/tlb.c |    3 ++-
 arch/powerpc/cpu/mpc8xxx/law.c |    6 ++++--
 include/configs/MPC8313ERDB.h  |    1 -
 include/configs/P1022DS.h      |    1 -
 include/configs/p1_p2_rdb_pc.h |    1 -
 5 files changed, 6 insertions(+), 6 deletions(-)
arch/powerpc/cpu/mpc85xx/tlb.c +2 -1
index 0dff37f..b903d02 100644
@@ -55,7 +55,8 @@ void init_tlbs(void)
 	return ;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 		       phys_addr_t *rpn)
 {
arch/powerpc/cpu/mpc8xxx/law.c +4 -2
index 6f9d568..6c0a307 100644
@@ -92,7 +92,8 @@ void disable_law(u8 idx)
 	return;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 static int get_law_entry(u8 i, struct law_entry *e)
 {
 	u32 lawar;

@@ -122,7 +123,8 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 	return idx;
 }
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) && \
+	(!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
 	u32 idx;
include/configs/MPC8313ERDB.h +0 -1
index 1d753e7..0c15195 100644
@@ -40,7 +40,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
 #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
include/configs/P1022DS.h +0 -1
index 9c27182..bcbda30 100644
@@ -41,7 +41,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
include/configs/p1_p2_rdb_pc.h +0 -1
index 2fa5372..b35b966 100644
@@ -159,7 +159,6 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
Signature · 1 line
1.7.0.4
author
#1 lore raw

PATCH v10 2/7 powerpc: mpc85xx: Support booting from SD Card with SPL

From: Ying Zhang <[email protected]>

the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- Mofidy drivers/mmc/fsl_esdhc_spl.c, fix checkpatch warnings. Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split to the patch "Support booting from SD Card with SPL" and the patch.
- "Enable P1022DS to boot from SD Card with SPL". this patch only support.
- booting from SD Card with SPL.
Change from v5:
- Add new symbol CONFIG_SPL_ENV_IMPORT for contain the functionality.
- env_import.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 README                                             |    4 +
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds            |    5 +
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c        |    4 +
 doc/README.mpc85xx-sd-spi-boot                     |   81 ++++++++++++
 drivers/mmc/Makefile                               |    3 +
 drivers/mmc/fsl_esdhc_spl.c                        |  130 ++++++++++++++++++++
 drivers/mmc/mmc.c                                  |    2 +
 include/fsl_esdhc.h                                |    1 +
 spl/Makefile                                       |    3 +
 9 files changed, 233 insertions(+), 0 deletions(-)
 create mode 100644 doc/README.mpc85xx-sd-spi-boot
 create mode 100644 drivers/mmc/fsl_esdhc_spl.c
README +4 -0
index bcfffc3..f070e1b 100644
@@ -3032,6 +3032,10 @@ FIT uImage format:
 		Support for NAND boot using simple NAND drivers that
 		expose the cmd_ctrl() interface.
 
+		CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+		Set for the SPL on PPC mpc8xxx targets, support for
+		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +5 -0
index 20284ed..8aeb1a0 100644
@@ -60,6 +60,11 @@ SECTIONS
 	}
 	_edata  =  .;
 
+	. = .;
+	__start___ex_table = .;
+	__ex_table : { *(__ex_table) }
+	__stop___ex_table = .;
+
 	. = ALIGN(8);
 	__init_begin = .;
 	__init_end = .;
arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +4 -0
index e958e13..56128a7 100644
@@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 		if (dimm_params[i].n_ranks) {
 			if (dimm_params[i].registered_dimm) {
 				temp1 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected RDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			} else {
 				temp2 = 1;
+#ifndef CONFIG_SPL_BUILD
 				printf("Detected UDIMM %s\n",
 					dimm_params[i].mpart);
+#endif
 			}
 		}
 	}
doc/README.mpc85xx-sd-spi-boot new file +81 -0

81 lines not on this page · raw message

drivers/mmc/Makefile +3 -0
index 24648a2..7e1628b 100644
@@ -48,6 +48,9 @@ COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
 COBJS-$(CONFIG_DWMMC) += dw_mmc.o
 COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
 COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+ifdef CONFIG_SPL_BUILD
+COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+endif
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
drivers/mmc/fsl_esdhc_spl.c new file +130 -0

130 lines not on this page · raw message

drivers/mmc/mmc.c +2 -0
index 73f7195..a9ada1f 100644
@@ -1499,7 +1499,9 @@ int mmc_initialize(bd_t *bis)
 	if (board_mmc_init(bis) < 0)
 		cpu_mmc_init(bis);
 
+#ifndef CONFIG_SPL_BUILD
 	print_mmc_devices(',');
+#endif
 
 	do_preinit();
 	return 0;
include/fsl_esdhc.h +1 -0
index 67d6057..b17c424 100644
@@ -198,5 +198,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd);
 static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
 static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
 #endif /* CONFIG_FSL_ESDHC */
+void mmc_boot(void);
 
 #endif  /* __FSL_ESDHC_H__ */
spl/Makefile +3 -0
index 01873de..eef8c87 100644
@@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
+ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
+endif
 endif
 ifeq ($(CPU),mpc86xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
Signature · 1 line
1.7.0.4
author
#2 lore raw

PATCH v10 3/7 powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Enable p1022ds to start from eSDHC with SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- Mofidy board/freescale/p1022ds/spl.c, fix checkpatch warnings. Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split from the patch "powerpc/p1022ds: boot from SD Card with SPL".
- this patch only enables p1022ds to boot from SD Card with SPL. Change from v5:
- No change.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- No change.

 README                           |    4 ++
 board/freescale/common/Makefile  |    2 -
 board/freescale/p1022ds/Makefile |    3 +
 board/freescale/p1022ds/spl.c    |  110 ++++++++++++++++++++++++++++++++++++++
 board/freescale/p1022ds/tlb.c    |   23 +++++---
 include/configs/P1022DS.h        |   54 ++++++++++++++++---
 6 files changed, 179 insertions(+), 17 deletions(-)
 create mode 100644 board/freescale/p1022ds/spl.c
README +4 -0
index f070e1b..f53613f 100644
@@ -3036,6 +3036,10 @@ FIT uImage format:
 		Set for the SPL on PPC mpc8xxx targets, support for
 		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
 
+		CONFIG_SPL_COMMON_INIT_DDR
+		Set for common ddr init with serial presence detect in
+		SPL binary.
+
 		CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
 		CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
 		CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
board/freescale/common/Makefile +0 -2
index 37236d0..e991def 100644
@@ -61,9 +61,7 @@ COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
 COBJS-$(CONFIG_MPC8536DS)	+= ics307_clk.o
 COBJS-$(CONFIG_MPC8572DS)	+= ics307_clk.o
-ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_P1022DS)		+= ics307_clk.o
-endif
 COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P3041DS)		+= ics307_clk.o
 COBJS-$(CONFIG_P4080DS)		+= ics307_clk.o
board/freescale/p1022ds/Makefile +3 -0
index 0eeef05..9746063 100644
@@ -24,6 +24,9 @@ ifdef MINIMAL
 COBJS-y        += spl_minimal.o tlb.o law.o
 
 else
+ifdef CONFIG_SPL_BUILD
+COBJS-y += spl.o
+endif
 COBJS-y	+= $(BOARD).o
 COBJS-y	+= ddr.o
 COBJS-y	+= law.o
board/freescale/p1022ds/spl.c new file +110 -0

110 lines not on this page · raw message

board/freescale/p1022ds/tlb.c +15 -8
index 3acc449..087eb4a 100644
@@ -74,25 +74,32 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 7, BOOKE_PAGESZ_4K, 1),
 
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+#if defined(CONFIG_SYS_RAMBOOT) || \
+	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
 	/* **** - eSDHC/eSPI/NAND boot */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
-			MAS3_SX|MAS3_SW|MAS3_SR, 0,
-			0, 8, BOOKE_PAGESZ_1G, 1),
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 8, BOOKE_PAGESZ_1G, 1),
 	/* **** - eSDHC/eSPI/NAND boot - second 1GB of memory */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
-			CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
-			MAS3_SX|MAS3_SW|MAS3_SR, 0,
-			0, 9, BOOKE_PAGESZ_1G, 1),
+		      CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 9, BOOKE_PAGESZ_1G, 1),
 #endif
 
 #ifdef CONFIG_SYS_NAND_BASE
 	/* *I*G - NAND */
 	SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
-			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-			0, 10, BOOKE_PAGESZ_16K, 1),
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 10, BOOKE_PAGESZ_16K, 1),
 #endif
 
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+	/* *I*G - L2SRAM */
+	SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+		      0, 11, BOOKE_PAGESZ_256K, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);
include/configs/P1022DS.h +47 -7

79 lines not on this page · raw message

Signature · 1 line
1.7.0.4
#3 lore raw

PATCH v10 3/7 powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL

Quoted 6 lines · ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Enable p1022ds to start from eSDHC with SPL.

Signed-off-by Ying Zhang <[email protected]>

Ying,

Does this patch need anything out of this set? I can't get the following targets built

P1022DS_SPIFLASH
P1022DS_36BIT_SPIFLASH
P1022DS_SDCARD
P1022DS_36BIT_SDCARD

Looks like function "env_import" is not available for these configuration.

York

A message that is not in the archive (sent off-list or not yet received): B3A295C5BD5B13458B2F5C6AFAD910460A2FD960@039-SN2MPN1-022.039d.mgd.msft.net

#5 lore raw

PATCH v10 3/7 powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL

Quoted 4 lines · On 08/13/2013 07:49 PM, Zhang Ying-B40530 wrote:

Hi, York,

	Because a patch that this patch needed hasn't been applied, I Don't know who should fix it:
	http://patchwork.ozlabs.org/patch/252805/

Ying,

Please compile it on top of 85xx/master branch. I got this warning

spl.c: In function 'board_init_r':
spl.c:110:1: warning: 'noreturn' function does return [enabled by default]

I think you should add __noreturn to the prototype of mmc_boot.

York

author
#6 lore raw

PATCH v10 4/7 powerpc : spi flash : Support to start from eSPI with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- Modify drivers/mtd/spi/fsl_espi_spl.c, fix checkpatch warnings. Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No change.
Change from v5:
- Split from "powerpc/p1022ds: boot from spi flash with SPL".
- this patch add the capability starting from eSPI with SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 drivers/mtd/spi/Makefile       |    1 +
 drivers/mtd/spi/fsl_espi_spl.c |   77 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c    |    2 +
 3 files changed, 80 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/spi/fsl_espi_spl.c
drivers/mtd/spi/Makefile +1 -0
index ecbb210..39e4e1d 100644
@@ -27,6 +27,7 @@ LIB	:= $(obj)libspi_flash.o
 
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)	+= spi_spl_load.o
+COBJS-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
 endif
 
 COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash.o
drivers/mtd/spi/fsl_espi_spl.c new file +77 -0

77 lines not on this page · raw message

drivers/mtd/spi/spi_flash.c +2 -0
index 6a6fe37..e474f5c 100644
@@ -554,12 +554,14 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 	}
 #endif
+#ifndef CONFIG_SPL_BUILD
 	printf("SF: Detected %s with page size ", flash->name);
 	print_size(flash->sector_size, ", total ");
 	print_size(flash->size, "");
 	if (flash->memory_map)
 		printf(", mapped at %p", flash->memory_map);
 	puts("\n");
+#endif
 #ifndef CONFIG_SPI_FLASH_BAR
 	if (flash->size > SPI_FLASH_16MB_BOUN) {
 		puts("SF: Warning - Only lower 16MiB accessible,");
Signature · 1 line
1.7.0.4
author
#7 lore raw

PATCH v10 5/7 powerpc : p1022ds : enable p1022ds to start from eSPI with SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Enable p1022ds to start from eSPI with SPL.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- No change.
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No longer changes the header file included by the file.
- "board/freescale/p1022ds/spl.c".
Change from v5:
- Split from "powerpc/p1022ds: boot from spi flash with SPL".
- this patch enable P1022DS to start from eSPI with SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "boot from SD card/SPI flash with SPL".

 board/freescale/p1022ds/spl.c |   10 ++++++++++
 include/configs/P1022DS.h     |   36 +++++++++++++++++++++++++++++-------
 2 files changed, 39 insertions(+), 7 deletions(-)
board/freescale/p1022ds/spl.c +10 -0
index cc3000a..1d52981 100644
@@ -27,6 +27,7 @@
 #include <i2c.h>
 #include "../common/ngpixis.h"
 #include <fsl_esdhc.h>
+#include <spi_flash.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -53,6 +54,11 @@ void board_init_f(ulong bootflag)
 	setbits_be32(&gur->pmuxcr,
 		     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
 
+#ifdef CONFIG_SPL_SPI_BOOT
+	/* Enable the SPI */
+	clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
+#endif
+
 	/* Read back the register to synchronize the write. */
 	in_be32(&gur->pmuxcr);
 

@@ -66,6 +72,8 @@ void board_init_f(ulong bootflag)
 		     bus_clk / 16 / CONFIG_BAUDRATE);
 #ifdef CONFIG_SPL_MMC_BOOT
 	puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	puts("\nSPI Flash boot...\n");
 #endif
 
 	/* copy code to RAM and jump to it - this should not return */

@@ -106,5 +114,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	spi_boot();
 #endif
 }
include/configs/P1022DS.h +29 -7
index 5a532f4..11c464e 100644
@@ -48,11 +48,33 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_RAMBOOT_SPIFLASH
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW		/* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #define CONFIG_NAND_FSL_ELBC

@@ -318,7 +340,7 @@
  * Config the L2 Cache as L2 SRAM
 */
 #if defined(CONFIG_SPL_BUILD)
-#if defined(CONFIG_SDCARD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_INIT_L2_ADDR	0xf8f80000
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
 #define CONFIG_SYS_L2_SIZE		(256 << 10)

@@ -562,7 +584,7 @@
 /*
  * Environment
  */
-#ifdef CONFIG_RAMBOOT_SPIFLASH
+#ifdef CONFIG_SPIFLASH
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
Signature · 1 line
1.7.0.4
author
#8 lore raw

PATCH v10 6/7 NAND: TPL : introduce the TPL based on the SPL

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can not be more than 4K. So, the SPL cannot initialize the DDR with the SPD code. This patch introduces TPL to enable a loader stub that is loaded by the code from the SPL. It initializes the DDR with the SPD or other operations.

The TPL's size is sizeable, the maximum size is decided by the memory's size that TPL runs. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image

This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- Move the part revision to the other patch. for example:fsl_elbc_spl.c.
- Modify the Makefile.
- Modify doc/README.TPL, fix checkpatch warnings.
Change from v8:
- Modify the doc/README.TPL.
- Modify the Makefile.
- Modify the drivers/mtd/nand/fsl_elbc_spl.c.
- Modify the spl/Makefile.
Change from v7:
- Modify the doc/README.TPL
- Modify the spl/Makefile.
Change from v6:
- Modify the description of the patch.
- Add the separate the autoconf.mk for TPL.
- Delete the file tpl/Makefile and the directory tpl.
- Reuse the spl/Makefie in TPL.
Change from v5:
- Use ifdef to define "nand_load_image" to non-static for non-SPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".

 Makefile       |   50 ++++++++++++++++++++++++++++++++++++++++++--------
 README         |   16 ++++++++++++++++
 config.mk      |   30 ++++++++++++++++++++++++++++--
 doc/README.TPL |   45 +++++++++++++++++++++++++++++++++++++++++++++
 spl/Makefile   |   20 ++++++++++++++++----
 5 files changed, 147 insertions(+), 14 deletions(-)
 create mode 100644 doc/README.TPL
Makefile +42 -8
index 3ac97db..f4409eb 100644
@@ -118,10 +118,11 @@ endif # ifneq ($(BUILD_DIR),)
 
 OBJTREE		:= $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
 SPLTREE		:= $(OBJTREE)/spl
+TPLTREE		:= $(OBJTREE)/tpl
 SRCTREE		:= $(CURDIR)
 TOPDIR		:= $(SRCTREE)
 LNDIR		:= $(OBJTREE)
-export	TOPDIR SRCTREE OBJTREE SPLTREE
+export	TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
 
 MKCONFIG	:= $(SRCTREE)/mkconfig
 export MKCONFIG

@@ -413,6 +414,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
+ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))

@@ -491,13 +493,25 @@ $(obj)u-boot.sha1:	$(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
+# $@ is output, $(1) and $(2) are inputs, $(3) is padded intermediate,
+# $(4) is pad-to
+SPL_PAD_APPEND = \
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(4) -I binary -O binary \
+		$(1) $(obj)$(3); \
+		cat $(obj)$(3) $(obj)$(2) > $@; \
+		rm $(obj)$(3)
 
+ifdef CONFIG_TPL
+SPL_PAYLOAD := $(obj)tpl/u-boot-with-tpl.bin
+else
+SPL_PAYLOAD := $(obj)u-boot.bin
+endif
 
-$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
-			-I binary -O binary $< $(obj)spl/u-boot-spl-pad.bin
-		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
-		rm $(obj)spl/u-boot-spl-pad.bin
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(SPL_PAYLOAD)
+		$(call SPL_PAD_APPEND,$<,$(SPL_PAYLOAD),spl/u-boot-spl-pad.bin,$(CONFIG_SPL_PAD_TO))
+
+$(obj)tpl/u-boot-with-tpl.bin: $(obj)tpl/u-boot-tpl.bin $(obj)u-boot.bin
+		$(call SPL_PAD_APPEND,$<,u-boot.bin,tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
 
 $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \

@@ -623,6 +637,9 @@ $(obj)u-boot-nand.bin:	nand_spl $(obj)u-boot.bin
 $(obj)spl/u-boot-spl.bin:	$(SUBDIR_TOOLS) depend
 		$(MAKE) -C spl all
 
+$(obj)tpl/u-boot-tpl.bin:	$(SUBDIR_TOOLS) depend
+		$(MAKE) -C spl all CONFIG_TPL_BUILD=y
+
 updater:
 		$(MAKE) -C tools/updater all
 

@@ -630,6 +647,7 @@ updater:
 # parallel sub-makes creating .depend files simultaneously.
 depend dep:	$(TIMESTAMP_FILE) $(VERSION_FILE) \
 		$(obj)include/spl-autoconf.mk \
+		$(obj)include/tpl-autoconf.mk \
 		$(obj)include/autoconf.mk \
 		$(obj)include/generated/generic-asm-offsets.h \
 		$(obj)include/generated/asm-offsets.h

@@ -706,6 +724,15 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
 	mv [email protected] $@
 
 # Auto-generate the spl-autoconf.mk file (which is included by all makefiles for SPL)
+$(obj)include/tpl-autoconf.mk: $(obj)include/config.h
+	@$(XECHO) Generating $@ ; \
+	set -e ; \
+	: Extract the config macros ; \
+	$(CPP) $(CFLAGS) -DCONFIG_TPL_BUILD  -DCONFIG_SPL_BUILD\
+			-DDO_DEPS_ONLY -dM include/common.h | \
+	sed -n -f tools/scripts/define2mk.sed > [email protected] && \
+	mv [email protected] $@
+
 $(obj)include/spl-autoconf.mk: $(obj)include/config.h
 	@$(XECHO) Generating $@ ; \
 	set -e ; \

@@ -716,12 +743,14 @@ $(obj)include/spl-autoconf.mk: $(obj)include/config.h
 
 $(obj)include/generated/generic-asm-offsets.h:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(obj)lib/asm-offsets.s
 	@$(XECHO) Generating $@
 	tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@
 
 $(obj)lib/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(src)lib/asm-offsets.c
 	@mkdir -p $(obj)lib
 	$(CC) -DDO_DEPS_ONLY \

@@ -730,12 +759,14 @@ $(obj)lib/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
 
 $(obj)include/generated/asm-offsets.h:	$(obj)include/autoconf.mk.dep \
 	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk \
 	$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
 	@$(XECHO) Generating $@
 	tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@
 
 $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s:	$(obj)include/autoconf.mk.dep \
-	$(obj)include/spl-autoconf.mk
+	$(obj)include/spl-autoconf.mk \
+	$(obj)include/tpl-autoconf.mk
 	@mkdir -p $(obj)$(CPUDIR)/$(SOC)
 	if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
 		$(CC) -DDO_DEPS_ONLY \

@@ -808,7 +839,8 @@ unconfig:
 	@rm -f $(obj)include/config.h $(obj)include/config.mk \
 		$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
 		$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep \
-		$(obj)include/spl-autoconf.mk
+		$(obj)include/spl-autoconf.mk \
+		$(obj)include/tpl-autoconf.mk
 
 %_config::	unconfig
 	@$(MKCONFIG) -A $(@:_config=)

@@ -894,6 +926,8 @@ clobber:	tidy
 	@rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map}
 	@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map}
 	@rm -f $(obj)spl/u-boot-spl.lds
+	@rm -f $(obj)tpl/{u-boot-tpl,u-boot-tpl.bin,u-boot-tpl.map}
+	@rm -f $(obj)tpl/u-boot-spl.lds
 	@rm -f $(obj)MLO MLO.byteswap
 	@rm -f $(obj)SPL
 	@rm -f $(obj)tools/xway-swap-bytes
README +16 -0
index f53613f..970dc02 100644
@@ -3109,6 +3109,17 @@ FIT uImage format:
 		option to re-enable it. This will affect the output of the
 		bootm command when booting a FIT image.
 
+- TPL framework
+		CONFIG_TPL
+		Enable building of TPL globally.
+
+		CONFIG_TPL_PAD_TO
+		Image offset to which the TPL should be padded before appending
+		the TPL payload. By default, this is defined as
+                CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
+                CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
+                payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
+
 Modem Support:
 --------------
 

@@ -4146,6 +4157,11 @@ Low Level (hardware related) configuration options:
 		that is executed before the actual U-Boot. E.g. when
 		compiling a NAND SPL.
 
+- CONFIG_TPL_BUILD
+		Modifies the behaviour of start.S  when compiling a loader
+		that is executed after the SPL and before the actual U-Boot.
+		It is loaded by the SPL.
+
 - CONFIG_SYS_MPC85XX_NO_RESETVEC
 		Only for 85xx systems. If this variable is specified, the section
 		.resetvec is not kept and the section .bootpg is placed in the
config.mk +28 -2
index 11f975d..73204de 100644
@@ -30,6 +30,12 @@ SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
 
 export	SHELL
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+SPL_BIN := u-boot-tpl
+else
+SPL_BIN := u-boot-spl
+endif
+
 ifeq ($(CURDIR),$(SRCTREE))
 dir :=
 else

@@ -39,7 +45,11 @@ endif
 ifneq ($(OBJTREE),$(SRCTREE))
 # Create object files for SPL in a separate directory
 ifeq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_TPL_BUILD),y)
+obj := $(if $(dir),$(TPLTREE)/$(dir)/,$(TPLTREE)/)
+else
 obj := $(if $(dir),$(SPLTREE)/$(dir)/,$(SPLTREE)/)
+endif
 else
 obj := $(if $(dir),$(OBJTREE)/$(dir)/,$(OBJTREE)/)
 endif

@@ -49,8 +59,12 @@ $(shell mkdir -p $(obj))
 else
 # Create object files for SPL in a separate directory
 ifeq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_TPL_BUILD),y)
+obj := $(if $(dir),$(TPLTREE)/$(dir)/,$(TPLTREE)/)
+else
 obj := $(if $(dir),$(SPLTREE)/$(dir)/,$(SPLTREE)/)
 
+endif
 $(shell mkdir -p $(obj))
 else
 obj :=

@@ -161,6 +175,10 @@ CHECK	= sparse
 #########################################################################
 
 # Load generated board configuration
+ifeq ($(CONFIG_TPL_BUILD),y)
+# Include TPL autoconf
+sinclude $(OBJTREE)/include/tpl-autoconf.mk
+else
 ifeq ($(CONFIG_SPL_BUILD),y)
 # Include SPL autoconf
 sinclude $(OBJTREE)/include/spl-autoconf.mk

@@ -168,6 +186,7 @@ else
 # Include normal autoconf
 sinclude $(OBJTREE)/include/autoconf.mk
 endif
+endif
 sinclude $(OBJTREE)/include/config.mk
 
 # Some architecture config.mk files need to know what CPUDIR is set to,

@@ -237,12 +256,19 @@ ifneq ($(CONFIG_SPL_PAD_TO),)
 CPPFLAGS += -DCONFIG_SPL_PAD_TO=$(CONFIG_SPL_PAD_TO)
 endif
 
+ifneq ($(CONFIG_TPL_PAD_TO),)
+CPPFLAGS += -DCONFIG_TPL_PAD_TO=$(CONFIG_TPL_PAD_TO)
+endif
+
 ifneq ($(CONFIG_UBOOT_PAD_TO),)
 CPPFLAGS += -DCONFIG_UBOOT_PAD_TO=$(CONFIG_UBOOT_PAD_TO)
 endif
 
 ifeq ($(CONFIG_SPL_BUILD),y)
 CPPFLAGS += -DCONFIG_SPL_BUILD
+ifeq ($(CONFIG_TPL_BUILD),y)
+CPPFLAGS += -DCONFIG_TPL_BUILD
+endif
 endif
 
 # Does this architecture support generic board init?

@@ -314,9 +340,9 @@ ifneq ($(CONFIG_SYS_TEXT_BASE),)
 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
 endif
 
-LDFLAGS_u-boot-spl += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
+LDFLAGS_$(SPL_BIN) += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
 ifneq ($(CONFIG_SPL_TEXT_BASE),)
-LDFLAGS_u-boot-spl += -Ttext $(CONFIG_SPL_TEXT_BASE)
+LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 
 # Linus' kernel sanity checking tool
doc/README.TPL new file +45 -0

45 lines not on this page · raw message

spl/Makefile +16 -4
index eef8c87..22121a0 100644
@@ -18,10 +18,22 @@
 CONFIG_SPL_BUILD := y
 export CONFIG_SPL_BUILD
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+export CONFIG_TPL_BUILD
+SPL_BIN := u-boot-tpl
+else
+SPL_BIN := u-boot-spl
+endif
+
 include $(TOPDIR)/config.mk
 
 # We want the final binaries in this directory
+ifeq ($(CONFIG_TPL_BUILD),y)
+obj := $(OBJTREE)/tpl/
+SPLTREE := $(TPLTREE)
+else
 obj := $(OBJTREE)/spl/
+endif
 
 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(SRCTREE)/board/$(VENDOR)/common/Makefile),y,n)
 

@@ -161,7 +173,7 @@ $(OBJTREE)/MLO.byteswap: $(obj)u-boot-spl.bin
 $(OBJTREE)/SPL : $(obj)u-boot-spl.bin depend
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common $@
 
-ALL-y	+= $(obj)u-boot-spl.bin
+ALL-y	+= $(obj)$(SPL_BIN).bin
 
 ifdef CONFIG_SAMSUNG
 ALL-y	+= $(obj)$(BOARD)-spl.bin

@@ -175,15 +187,15 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
 		$(obj)u-boot-spl.bin $(obj)$(BOARD)-spl.bin
 endif
 
-$(obj)u-boot-spl.bin:	$(obj)u-boot-spl
+$(obj)$(SPL_BIN).bin:	$(obj)$(SPL_BIN)
 	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
 
 GEN_UBOOT = \
 	cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \
 		--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-		-Map u-boot-spl.map -o u-boot-spl
+		-Map $(SPL_BIN).map -o $(SPL_BIN)
 
-$(obj)u-boot-spl:	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
+$(obj)$(SPL_BIN):	depend $(START) $(LIBS) $(obj)u-boot-spl.lds
 	$(GEN_UBOOT)
 
 $(START):	depend
Signature · 1 line
1.7.0.4
#9 lore raw

PATCH v10 6/7 NAND: TPL : introduce the TPL based on the SPL

Quoted 2 lines · ying.zhang at freescale.com

This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL

Could you fix the reported build problem with that patch and submit it?

-Scott

#10 lore raw

PATCH v10 6/7 NAND: TPL : introduce the TPL based on the SPL

In reply to ying.zhang at freescale.com
Quoted 13 lines · ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can not be more than 4K. So, the SPL cannot initialize the DDR with the SPD code. This patch introduces TPL to enable a loader stub that is loaded by the code from the SPL. It initializes the DDR with the SPD or other operations.

The TPL's size is sizeable, the maximum size is decided by the memory's size that TPL runs. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image

Quoted 6 lines

This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL

Signed-off-by Ying Zhang <[email protected]>

Ying,

You patch's dependency has not been applied. I am going to hold this patch until I can apply it.

York

author
#11 lore raw

PATCH v10 7/7 powerpc: p1022ds: add TPL for p1022ds nand boot

In reply to ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

TPL is introduced in the patch "NAND: TPL : introduce the TPL based on the SPL", here enable TPL for p1022ds nand boot.

Signed-off-by Ying Zhang <[email protected]>

---
Change from v9:
- Modify drivers/mtd/nand/Makefile.
- Modify drivers/mtd/nand/fsl_elbc_spl.c.
- Modify include/configs/P1022DS.h, fix checkpatch warnings. Change from v8:
- Add new symbol CONFIG_SPL_ENV_IN_NAND.
Change from v7:
- No change.
Change from v6:
- Delete the file "board/freescale/p1022ds/tpl.c".
- Reuse the file "board/freescale/p1022ds/spl.c" in the TPL. Change from v5:
- Change functionality nand_load_image to nand_load, it is called in TPL. Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from "powerpc/p1022ds: nand: introduce the TPL based on the SPL".

 board/freescale/p1022ds/spl.c         |   16 +++++++
 board/freescale/p1022ds/spl_minimal.c |   53 ++--------------------
 drivers/mtd/nand/Makefile             |    1 +
 drivers/mtd/nand/fsl_elbc_spl.c       |   27 +++++++++---
 include/configs/P1022DS.h             |   77 ++++++++++++++++++++++++++-------
 5 files changed, 103 insertions(+), 71 deletions(-)
board/freescale/p1022ds/spl.c +16 -0
index 1d52981..639f09d 100644
@@ -100,21 +100,37 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 	get_clocks();
 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
 			CONFIG_SPL_RELOC_MALLOC_SIZE);
+#ifndef CONFIG_SPL_NAND_BOOT
 	env_init();
+#endif
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_initialize(bd);
 #endif
 	/* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+			    (uchar *)CONFIG_ENV_ADDR);
+
+	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
+	gd->env_valid = 1;
+#else
 	env_relocate();
+#endif
 
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 
 	gd->ram_size = initdram(0);
+#ifdef CONFIG_SPL_NAND_BOOT
+	puts("Tertiary program loader running in sram...");
+#else
 	puts("Second program loader running in sram...\n");
+#endif
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
 #elif defined(CONFIG_SPL_SPI_BOOT)
 	spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+	nand_boot();
 #endif
 }
board/freescale/p1022ds/spl_minimal.c +5 -48

77 lines not on this page · raw message

drivers/mtd/nand/Makefile +1 -0
index bb81e84..e1f817a 100644
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
 COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 COBJS-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o
+COBJS-$(CONFIG_SPL_NAND_INIT) += nand.o
 
 else # not spl
drivers/mtd/nand/fsl_elbc_spl.c +20 -7
index 50ff4fe..f68a593 100644
@@ -47,7 +47,11 @@ static void nand_wait(void)
 	}
 }
 
+#ifdef CONFIG_TPL_BUILD
+int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+#else
 static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
+#endif
 {
 	fsl_lbc_t *regs = LBC_BASE_ADDR;
 	uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;

@@ -127,6 +131,15 @@ static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
 }
 
 /*
+ * Defines a static function nand_load_image() here, because non-static makes
+ * the code too large for certain SPLs(minimal SPL, maximum size <= 4Kbytes)
+ */
+#ifndef CONFIG_TPL_BUILD
+#define nand_spl_load_image(offs, uboot_size, vdst) \
+	nand_load_image(offs, uboot_size, vdst)
+#endif
+
+/*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
  * from NAND into SDRAM and starts it from there.

@@ -137,17 +150,17 @@ void nand_boot(void)
 	/*
 	 * Load U-Boot image from NAND into RAM
 	 */
-	nand_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
-			CONFIG_SYS_NAND_U_BOOT_SIZE,
-			(void *)CONFIG_SYS_NAND_U_BOOT_DST);
+	nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+			    CONFIG_SYS_NAND_U_BOOT_SIZE,
+			    (void *)CONFIG_SYS_NAND_U_BOOT_DST);
 
 #ifdef CONFIG_NAND_ENV_DST
-	nand_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
-			(void *)CONFIG_NAND_ENV_DST);
+	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+			    (void *)CONFIG_NAND_ENV_DST);
 
 #ifdef CONFIG_ENV_OFFSET_REDUND
-	nand_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
-			(void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+	nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+			    (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
 #endif
 #endif
include/configs/P1022DS.h +61 -16

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Signature · 1 line
1.7.0.4
#12 lore raw

PATCH v10 1/7 powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL

In reply to ying.zhang at freescale.com
Quoted 8 lines · ying.zhang at freescale.com

From: Ying Zhang <[email protected]>

1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by Ying Zhang <[email protected]>

---

This is the second time you've posted v10 of this series...

-Scott