socfpga: Adding System Manager driver

PATCH Superseded Chin Liang See 1 participant 1 message Jul 29, 2013 Arm (32-bit)

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Chin Liang See

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2013-07-29 20:41 UTC #0 lore raw

PATCH v6 1/2 socfpga: Adding System Manager driver

Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform)

Signed-off-by Chin Liang See <[email protected]>

Reviewed-by Pavel Machek <[email protected]>

Cc Wolfgang Denk <[email protected]>

CC Pavel Machek <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Tom Rini <[email protected]>

Cc Albert Aribaud <[email protected]>

---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
- Fixed the comment within the code
Changes for v4:
- Added change log for each revision change
Changes for v5:
- Updated the license header for system_manager.c
- Cc: Tom Rini
Changes for v6:
- Updated the license header for system_manager.c and .h to SPDX

---
 arch/arm/cpu/armv7/socfpga/Makefile                |    2 +-
 arch/arm/cpu/armv7/socfpga/spl.c                   |    6 ++++
 arch/arm/cpu/armv7/socfpga/system_manager.c        |   29 ++++++++++++++++++++
 .../include/asm/arch-socfpga/socfpga_base_addrs.h  |    1 +
 arch/arm/include/asm/arch-socfpga/system_manager.h |   22 +++++++++++++++
 board/altera/socfpga/Makefile                      |    4 ++-
 include/configs/socfpga_cyclone5.h                 |    1 +
 7 files changed, 63 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
 create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h

arch/arm/cpu/armv7/socfpga/Makefile +1 -1

index 5024fc5..0859e44 100644
@@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk
 LIB	=  $(obj)lib$(SOC).o
 
 SOBJS	:= lowlevel_init.o
-COBJS-y	:= misc.o timer.o reset_manager.o
+COBJS-y	:= misc.o timer.o reset_manager.o system_manager.o
 COBJS-$(CONFIG_SPL_BUILD) += spl.o
 
 COBJS	:= $(COBJS-y)

arch/arm/cpu/armv7/socfpga/spl.c +6 -0

index 2b9be28..74bceab 100644
@@ -12,6 +12,7 @@
 #include <image.h>
 #include <asm/arch/reset_manager.h>
 #include <spl.h>
+#include <asm/arch/system_manager.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -25,6 +26,11 @@ u32 spl_boot_device(void)
  */
 void spl_board_init(void)
 {
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+	/* configure the pin muxing through system manager */
+	sysmgr_pinmux_init();
+#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
+
 	/* de-assert reset for peripherals and bridges based on handoff */
 	reset_deassert_peripherals_handoff();

arch/arm/cpu/armv7/socfpga/system_manager.c new file +29 -0

new file mode 100644
index 0000000..0b1bb33
@@ -0,0 +1,29 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/system_manager.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure all the pin muxes
+ */
+void sysmgr_pinmux_init(void)
+{
+	unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
+
+	const unsigned long *pval = sys_mgr_init_table;
+	unsigned long i;
+
+	for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table);
+		i++, offset += sizeof(unsigned long)) {
+		writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
+	}
+}
+
+

arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +1 -0

index 1182a13..50c4ebd 100644
@@ -12,5 +12,6 @@
 #define SOCFPGA_UART1_ADDRESS 0xffc03000
 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
 
 #endif /* _SOCFPGA_BASE_ADDRS_H_ */

arch/arm/include/asm/arch-socfpga/system_manager.h new file +22 -0

new file mode 100644
index 0000000..36a83b4
@@ -0,0 +1,22 @@
+/*
+ * Copyright Altera Corporation (C) 2013
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef	_SYSTEM_MANAGER_H_
+#define	_SYSTEM_MANAGER_H_
+
+#ifndef __ASSEMBLY__
+
+void sysmgr_pinmux_init(void);
+
+/* declaration for handoff table type */
+extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
+
+#endif
+
+
+#define CONFIG_SYSMGR_PINMUXGRP_OFFSET	(0x400)
+
+#endif /* _SYSTEM_MANAGER_H_ */

board/altera/socfpga/Makefile +3 -1

index 101fc7c..9dc45a9 100644
@@ -10,8 +10,10 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	:= socfpga_cyclone5.o
+COBJS-y	:= socfpga_cyclone5.o
+COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o
 
+COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

include/configs/socfpga_cyclone5.h +1 -0

index 06aeba6..346ca72 100644
@@ -7,6 +7,7 @@
 #define __CONFIG_H
 
 #include <asm/arch/socfpga_base_addrs.h>
+#include "../../board/altera/socfpga/pinmux_config.h"
 
 /*
  * High level configuration

Signature · 1 line

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