hwspinlock/msm: Add support for Qualcomm MSM HW Mutex block
PATCH v2 1/1 hwspinlock/msm: Add support for Qualcomm MSM HW Mutex block
Add driver for Qualcomm MSM Hardware Mutex block that exists on newer MSM SoC (MSM8974, etc).
---
v2:
* Fixed init of stride
* Dealt with a number of comments from Stephen Boyd:
- use of <linux/io.h> instead of <asm/io.h>
- declaring msm_hwspinlock_of_match once & as const
- drop unneccessary () in an if statement
- style cleanup to have devm_kzalloc on one line
TODO:
* feedback from Ohad on device tree binding location & hw-mutex name
* comments from Eric/Jeff on use of mb()
.../devicetree/bindings/arm/msm/tcsr-mutex.txt | 20 +++ drivers/hwspinlock/Kconfig | 11 ++ drivers/hwspinlock/Makefile | 1 + drivers/hwspinlock/msm_hwspinlock.c | 150 +++++++++++++++++++++ 4 files changed, 182 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/tcsr-mutex.txt create mode 100644 drivers/hwspinlock/msm_hwspinlock.c
Documentation/devicetree/bindings/arm/msm/tcsr-mutex.txt new file +20 -0
@@ -0,0 +1,20 @@ +Qualcomm MSM Hardware Mutex Block: + +The hardware block provides mutexes utilized between different processors +on the SoC as part of the communication protocol used by these processors. + +Required properties: +- compatible: should be "qcom,tcsr-mutex" +- reg: Should contain registers location and length of mutex registers +- reg-names: + "mutex-base" - string to identify mutex registers +- qcom,num-locks: the number of locks/mutexes supported + +Example: + + qcom,tcsr-mutex@fd484000 { + compatible = "qcom,tcsr-mutex"; + reg = <0xfd484000 0x1000>; + reg-names = "mutex-base"; + qcom,num-locks = <32>; + };
drivers/hwspinlock/Kconfig +11 -0
@@ -8,6 +8,17 @@ config HWSPINLOCK menu "Hardware Spinlock drivers" +config HWSPINLOCK_MSM + tristate "MSM Hardware Spinlock device" + depends on ARCH_MSM + select HWSPINLOCK + help + Say y here to support the MSM Hardware Mutex functionality, which + provides a synchronisation mechanism for the various processors on + the SoC. + + If unsure, say N. + config HWSPINLOCK_OMAP tristate "OMAP Hardware Spinlock device" depends on ARCH_OMAP4 || SOC_OMAP5
drivers/hwspinlock/Makefile +1 -0
@@ -3,5 +3,6 @@ # obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o +obj-$(CONFIG_HWSPINLOCK_MSM) += msm_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o
drivers/hwspinlock/msm_hwspinlock.c new file +150 -0
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Signature · 1 line
1.8.2.1
Quoted 24 lines · Kumar Gala
drivers/hwspinlock/msm_hwspinlock.c new file +18
-0@@ -0,0 +1,150 @@ +/* +* Copyright (c) 2013, The Linux Foundation. All rights reserved. +* +* This software is licensed under the terms of the GNU General Public +* License version 2, as published by the Free Software Foundation, and +* may be copied, distributed, and modified under those terms. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/err.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/device.h> +#include <linux/module.h>
drivers/hwspinlock/msm_hwspinlock.c line 28
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drivers/hwspinlock/msm_hwspinlock.c new file +10
-0+#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_device.h> +#include <linux/hwspinlock.h> +#include <linux/io.h> + +#include "hwspinlock_internal.h" + +#define SPINLOCK_ID_APPS_PROC 1
Is this id only for the apps processor? What about hexagon? Does it need a different number?
Quoted 4 lines
drivers/hwspinlock/msm_hwspinlock.c new file +4
-0+#define BASE_ID 0 + +static int msm_hwspinlock_trylock (struct hwspinlock *lock) +{
drivers/hwspinlock/msm_hwspinlock.c line 42
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drivers/hwspinlock/msm_hwspinlock.c new file +10
-0+void __iomem *lock_addr = lock->priv; + +writel_relaxed (SPINLOCK_ID_APPS_PROC , lock_addr); +smp_mb (); +return readl_relaxed (lock_addr) ==SPINLOCK_ID_APPS_PROC ; +} + +static void msm_hwspinlock_unlock (struct hwspinlock *lock) +{ +int lock_owner;
This should probably be u32 to be explicit about the size of the register.
drivers/hwspinlock/msm_hwspinlock.c line 47
Quoted 5 lines
drivers/hwspinlock/msm_hwspinlock.c new file +5
-0+void __iomem *lock_addr = lock->priv; + + lock_owner =readl_relaxed (lock_addr); +if (lock_owner !=SPINLOCK_ID_APPS_PROC ) { + pr_err("%s: spinlock not owned by Apps (actual owner is %d)\n",
Maybe you should just say "spinlock not owned by us (actual owner is %d)" so that this driver is agnostic to the processor it runs on?
Quoted 7 lines
drivers/hwspinlock/msm_hwspinlock.c new file +6
-0+ __func__, lock_owner); + } + +writel_relaxed (0 , lock_addr); +smp_mb (); +}
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Quoted 30 lines · Stephen Boyd
Quoted 29 lines · Kumar Gala
drivers/hwspinlock/msm_hwspinlock.c new file +23
-0@@ -0,0 +1,150 @@ +/* +* Copyright (c) 2013, The Linux Foundation. All rights reserved. +* +* This software is licensed under the terms of the GNU General Public +* License version 2, as published by the Free Software Foundation, and +* may be copied, distributed, and modified under those terms. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/err.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/device.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_device.h> +#include <linux/hwspinlock.h>
Quoted 8 lines
drivers/hwspinlock/msm_hwspinlock.c line 28
Quoted 5 lines
drivers/hwspinlock/msm_hwspinlock.c new file +5
-0+#include <linux/io.h> + +#include "hwspinlock_internal.h" + +#define SPINLOCK_ID_APPS_PROC 1Is this id only for the apps processor? What about hexagon? Does it need a different number?
Yes, hexagon would need a different id based on what job that particular hexagon processor is doing. I'm not currently aware of a hexagon usecase, but I believe modifying the DT binding in the future would cover the usecase if it comes up.
Quoted 27 lines
Quoted 5 lines
drivers/hwspinlock/msm_hwspinlock.c new file +4
-0+#define BASE_ID 0 + +static int msm_hwspinlock_trylock (struct hwspinlock *lock) +{drivers/hwspinlock/msm_hwspinlock.c line 42
Quoted 10 lines
drivers/hwspinlock/msm_hwspinlock.c new file +10
-0+void __iomem *lock_addr = lock->priv; + +writel_relaxed (SPINLOCK_ID_APPS_PROC , lock_addr); +smp_mb (); +return readl_relaxed (lock_addr) ==SPINLOCK_ID_APPS_PROC ; +} + +static void msm_hwspinlock_unlock (struct hwspinlock *lock) +{ +int lock_owner;This should probably be u32 to be explicit about the size of the register.
drivers/hwspinlock/msm_hwspinlock.c line 47
Quoted 5 lines
drivers/hwspinlock/msm_hwspinlock.c new file +5
-0+void __iomem *lock_addr = lock->priv; + + lock_owner =readl_relaxed (lock_addr); +if (lock_owner !=SPINLOCK_ID_APPS_PROC ) { + pr_err("%s: spinlock not owned by Apps (actual owner is %d)\n",Maybe you should just say "spinlock not owned by us (actual owner is %d)" so that this driver is agnostic to the processor it runs on?
Quoted 8 lines
drivers/hwspinlock/msm_hwspinlock.c line 53
Quoted 7 lines
drivers/hwspinlock/msm_hwspinlock.c new file +6
-0+ __func__, lock_owner); + } + +writel_relaxed (0 , lock_addr); +smp_mb (); +}
Jeffrey Hugo
Signature · 1 line
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation.