DRA7xx core support

From: R Sricharan <[email protected]>

The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology.

Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html

Suggested-by Felipe Balbi <[email protected]>

Signed-off-by R Sricharan <[email protected]>

Signed-off-by Rajendra Nayak <[email protected]>

Acked-by Santosh Shilimkar <[email protected]>

---
  arch/arm/mach-omap1/include/mach/soc.h |    1 +
  arch/arm/mach-omap2/id.c               |    4 ++--
  arch/arm/mach-omap2/soc.h              |   17 +++++++++++++++++
  3 files changed, 20 insertions(+), 2 deletions(-)

arch/arm/mach-omap1/include/mach/soc.h +1 -0

index 6cf9c1c..612bd1c 100644
@@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710)
  #define cpu_is_omap34xx()		0
  #define cpu_is_omap44xx()		0
  #define soc_is_omap54xx()		0
+#define soc_is_dra7xx()			0
  #define soc_is_am33xx()			0
  #define cpu_class_is_omap1()		1
  #define cpu_class_is_omap2()		0

arch/arm/mach-omap2/id.c +2 -2

index 2dc62a2..0289adc 100644
@@ -61,7 +61,7 @@ int omap_type(void)
  		val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  	} else if (cpu_is_omap44xx()) {
  		val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
-	} else if (soc_is_omap54xx()) {
+	} else if (soc_is_omap54xx() || soc_is_dra7xx()) {
  		val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS);
  		val &= OMAP5_DEVICETYPE_MASK;
  		val >>= 6;

@@ -116,7 +116,7 @@ static u16 tap_prod_id;
 
  void omap_get_die_id(struct omap_die_id *odi)
  {
-	if (cpu_is_omap44xx() || soc_is_omap54xx()) {
+	if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
  		odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
  		odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
  		odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);

arch/arm/mach-omap2/soc.h +12 -0

index 8c616e4..4588df1 100644
@@ -8,6 +8,7 @@
   * Written by Tony Lindgren <[email protected]>
   *
   * Added OMAP4/5 specific defines - Santosh Shilimkar<[email protected]>
+ * Added DRA7xxx specific defines - Sricharan R<[email protected]>
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License as published by

@@ -35,6 +36,7 @@
  #ifndef __ASSEMBLY__
 
  #include <linux/bitops.h>
+#include <linux/of.h>
 
  /*
   * Test if multicore OMAP support is needed

@@ -105,6 +107,15 @@
  # endif
  #endif
 
+#ifdef CONFIG_SOC_DRA7XX
+# ifdef OMAP_NAME
+#  undef MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME DRA7XX
+# endif
+#endif
+
  /*
   * Omap device type i.e. EMU/HS/TST/GP/BAD
   */

@@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437)
  #define cpu_is_omap447x()		0
  #define soc_is_omap54xx()		0
  #define soc_is_omap543x()		0
+#define soc_is_dra7xx()			0
 
  #if defined(MULTI_OMAP2)
  # if defined(CONFIG_ARCH_OMAP2)

Quoted 101 lines · Rajendra Nayak

From: R Sricharan <[email protected]>

The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology.

Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html

Suggested-by Felipe Balbi <[email protected]>

Signed-off-by R Sricharan <[email protected]>

Signed-off-by Rajendra Nayak <[email protected]>

Acked-by Santosh Shilimkar <[email protected]>

---
  arch/arm/mach-omap1/include/mach/soc.h |    1 +
  arch/arm/mach-omap2/id.c               |    4 ++--
  arch/arm/mach-omap2/soc.h              |   17 +++++++++++++++++
  3 files changed, 20 insertions(+), 2 deletions(-)

arch/arm/mach-omap1/include/mach/soc.h +1 -0

index 6cf9c1c..612bd1c 100644
@@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710)
  #define cpu_is_omap34xx()        0
  #define cpu_is_omap44xx()        0
  #define soc_is_omap54xx()        0
+#define soc_is_dra7xx()            0
  #define soc_is_am33xx()            0
  #define cpu_class_is_omap1()        1
  #define cpu_class_is_omap2()        0

arch/arm/mach-omap2/id.c +2 -2

index 2dc62a2..0289adc 100644
@@ -61,7 +61,7 @@ int omap_type(void)
          val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
      } else if (cpu_is_omap44xx()) {
          val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
-    } else if (soc_is_omap54xx()) {
+    } else if (soc_is_omap54xx() || soc_is_dra7xx()) {
          val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS);
          val &= OMAP5_DEVICETYPE_MASK;
          val >>= 6;

@@ -116,7 +116,7 @@ static u16 tap_prod_id;
 
  void omap_get_die_id(struct omap_die_id *odi)
  {
-    if (cpu_is_omap44xx() || soc_is_omap54xx()) {
+    if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
          odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
          odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
          odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);

arch/arm/mach-omap2/soc.h +12 -0

index 8c616e4..4588df1 100644
@@ -8,6 +8,7 @@
   * Written by Tony Lindgren <[email protected]>
   *
   * Added OMAP4/5 specific defines - Santosh Shilimkar<[email protected]>
+ * Added DRA7xxx specific defines - Sricharan R<[email protected]>
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License as published by

@@ -35,6 +36,7 @@
  #ifndef __ASSEMBLY__
 
  #include <linux/bitops.h>
+#include <linux/of.h>
 
  /*
   * Test if multicore OMAP support is needed

@@ -105,6 +107,15 @@
  # endif
  #endif
 
+#ifdef CONFIG_SOC_DRA7XX
+# ifdef OMAP_NAME
+#  undef MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME DRA7XX
+# endif
+#endif
+
  /*
   * Omap device type i.e. EMU/HS/TST/GP/BAD
   */

@@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437)
  #define cpu_is_omap447x()        0
  #define soc_is_omap54xx()        0
  #define soc_is_omap543x()        0
+#define soc_is_dra7xx()            0
 
  #if defined(MULTI_OMAP2)
  # if defined(CONFIG_ARCH_OMAP2)

@@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430)
  # define soc_is_omap543x()        is_omap543x()
  #endif
 

arch/arm/mach-omap2/soc.h IS_OMAP_TYPE(3430, 0x3430) · line 396

Quoted 3 lines

arch/arm/mach-omap2/soc.h +3 -0

+#if defined(CONFIG_SOC_DRA7XX)
+#undef soc_is_dra7xx
+#define soc_is_dra7xx()    (of_machine_is_compatible("ti,dra7"))

Wouldn't that be too expensive to call of_machine_is_compatible every time for DRA7 detection?

May be static variable can be used to store DRA7 presence status, smth. like this:

static inline int is_dra7xx(void)
{
static int is_dra7 = -1;

if (is_dra7 < 0)
is_dra7 = of_machine_is_compatible("ti,dra7");

return !!is_dra7;
}

(it's just an idea, not verified)

arch/arm/mach-omap2/soc.h IS_OMAP_TYPE(3430, 0x3430) · line 401

Quoted 6 lines

arch/arm/mach-omap2/soc.h +2 -0

+#endif
+
  /* Various silicon revisions for omap2 */
  #define OMAP242X_CLASS        0x24200024
  #define OMAP2420_REV_ES1_0    OMAP242X_CLASS

Regards,
-grygorii

Hi Grygorii,

Quoted 102 lines · Grygorii Strashko

Quoted 101 lines · Rajendra Nayak

From: R Sricharan <[email protected]>

The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology.

Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html

Suggested-by Felipe Balbi <[email protected]>

Signed-off-by R Sricharan <[email protected]>

Signed-off-by Rajendra Nayak <[email protected]>

Acked-by Santosh Shilimkar <[email protected]>

---
   arch/arm/mach-omap1/include/mach/soc.h |    1 +
   arch/arm/mach-omap2/id.c               |    4 ++--
   arch/arm/mach-omap2/soc.h              |   17 +++++++++++++++++
   3 files changed, 20 insertions(+), 2 deletions(-)

arch/arm/mach-omap1/include/mach/soc.h +1 -0

index 6cf9c1c..612bd1c 100644
@@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710)
   #define cpu_is_omap34xx()        0
   #define cpu_is_omap44xx()        0
   #define soc_is_omap54xx()        0
+#define soc_is_dra7xx()            0
   #define soc_is_am33xx()            0
   #define cpu_class_is_omap1()        1
   #define cpu_class_is_omap2()        0

arch/arm/mach-omap2/id.c +2 -2

index 2dc62a2..0289adc 100644
@@ -61,7 +61,7 @@ int omap_type(void)
           val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
       } else if (cpu_is_omap44xx()) {
           val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
-    } else if (soc_is_omap54xx()) {
+    } else if (soc_is_omap54xx() || soc_is_dra7xx()) {
           val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS);
           val &= OMAP5_DEVICETYPE_MASK;
           val >>= 6;

@@ -116,7 +116,7 @@ static u16 tap_prod_id;
 
   void omap_get_die_id(struct omap_die_id *odi)
   {
-    if (cpu_is_omap44xx() || soc_is_omap54xx()) {
+    if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
           odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
           odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
           odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);

arch/arm/mach-omap2/soc.h +12 -0

index 8c616e4..4588df1 100644
@@ -8,6 +8,7 @@
    * Written by Tony Lindgren <[email protected]>
    *
    * Added OMAP4/5 specific defines - Santosh Shilimkar<[email protected]>
+ * Added DRA7xxx specific defines - Sricharan R<[email protected]>
    *
    * This program is free software; you can redistribute it and/or modify
    * it under the terms of the GNU General Public License as published by

@@ -35,6 +36,7 @@
   #ifndef __ASSEMBLY__
 
   #include <linux/bitops.h>
+#include <linux/of.h>
 
   /*
    * Test if multicore OMAP support is needed

@@ -105,6 +107,15 @@
   # endif
   #endif
 
+#ifdef CONFIG_SOC_DRA7XX
+# ifdef OMAP_NAME
+#  undef MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME DRA7XX
+# endif
+#endif
+
   /*
    * Omap device type i.e. EMU/HS/TST/GP/BAD
    */

@@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437)
   #define cpu_is_omap447x()        0
   #define soc_is_omap54xx()        0
   #define soc_is_omap543x()        0
+#define soc_is_dra7xx()            0
 
   #if defined(MULTI_OMAP2)
   # if defined(CONFIG_ARCH_OMAP2)

@@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430)
   # define soc_is_omap543x()        is_omap543x()
   #endif
 

Quoted 6 lines

arch/arm/mach-omap2/soc.h IS_OMAP_TYPE(3430, 0x3430) · line 396

Quoted 3 lines

arch/arm/mach-omap2/soc.h +3 -0

+#if defined(CONFIG_SOC_DRA7XX)
+#undef soc_is_dra7xx
+#define soc_is_dra7xx()    (of_machine_is_compatible("ti,dra7"))

Wouldn't that be too expensive to call of_machine_is_compatible every time for DRA7 detection?

Ideally these soc checks should happen only once at init (see PATCH 8/9 in the series for instance) so there should not be a 'every time' penalty.

regards,
Rajendra

Quoted 26 lines

May be static variable can be used to store DRA7 presence status, smth. like this:

static inline int is_dra7xx(void)
{
static int is_dra7 = -1;

if (is_dra7 < 0)
is_dra7 = of_machine_is_compatible("ti,dra7");

return !!is_dra7;
}

(it's just an idea, not verified)

arch/arm/mach-omap2/soc.h IS_OMAP_TYPE(3430, 0x3430) · line 401

Quoted 6 lines

arch/arm/mach-omap2/soc.h +2 -0

+#endif
+
   /* Various silicon revisions for omap2 */
   #define OMAP242X_CLASS        0x24200024
   #define OMAP2420_REV_ES1_0    OMAP242X_CLASS

Regards,
-grygorii

Changes in v3:
-1- Dropped some clock/dpll framework builds for dra7 -2- Added all instances of IPs in dtsi file
-3- dtsi does a 'disabled' by default and dts enables as needed -4- soc_is_dra7xx() based on DT compatible instead of using ID code

Changes in v2:
-1- Fixed minor changelog details
-2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c -3- Added DTS update patches to this series which were earlier posted as part of the data series (Since they don't have much objections as against the other in-kernel data files)
-4- Updated the EVM dts file with pin config details for uart/mcspi and i2c

DRA7xx based SoCs' are high-performance, infotainment application devices, based on enhanced OMAP architecture integrated on a 28nm technology.

The DRA7xx family is composed of DRA75x and DRA74x devices. The current device for which the patches add support is the DRA752 SoC.

Most of the core IPs are similar to those found on the OMAP5 devices, including the dual cortex-A15 based MPU subsystem, which has helped quite some reuse from existing OMAP5 support.

This series contains only core support patches and none of the PRCM and hwmod data needed for the device to boot.

The bootloader support for the platform is already available in mainline u-boot.

The patches posted in this series are available at:
git://github.com/rrnayak/linux.git for-3.12/dra-core-v3

The patches (including the ones for in-kernel data) which boot on dra7xx evm are available at:
t://github.com/rrnayak/linux.git out-of-tree/dra-integrated-v3

R Sricharan (8):
ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra
ARM: DRA7: Reuse io tables and add a new .init_early
ARM: DRA7: Resue the clocksource, clockevent support
ARM: DRA7: board-generic: Add basic DT support
ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512
ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board
ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'
ARM: DRA7: Add the build support in omap2plus

Rajendra Nayak (1):
ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5

 .../devicetree/bindings/arm/omap/omap.txt          |    3 +
 arch/arm/Kconfig                                   |    2 +-
 arch/arm/boot/dts/Makefile                         |    3 +-
 arch/arm/boot/dts/dra7-evm.dts                     |  140 +++++
 arch/arm/boot/dts/dra7.dtsi                        |  567 ++++++++++++++++++++
 arch/arm/configs/omap2plus_defconfig               |    1 +
 arch/arm/mach-omap1/include/mach/soc.h             |    1 +
 arch/arm/mach-omap2/Kconfig                        |   12 +-
 arch/arm/mach-omap2/Makefile                       |    6 +
 arch/arm/mach-omap2/board-generic.c                |   18 +
 arch/arm/mach-omap2/common.h                       |    1 +
 arch/arm/mach-omap2/id.c                           |    4 +-
 arch/arm/mach-omap2/io.c                           |   20 +-
 arch/arm/mach-omap2/omap54xx.h                     |    4 +
 arch/arm/mach-omap2/omap_hwmod.c                   |    2 +-
 arch/arm/mach-omap2/soc.h                          |   17 +
 arch/arm/mach-omap2/timer.c                        |    3 +-
 arch/arm/plat-omap/Kconfig                         |    2 +-
 18 files changed, 795 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/boot/dts/dra7-evm.dts
 create mode 100644 arch/arm/boot/dts/dra7.dtsi

Quoted 22 lines · Rajendra Nayak

Changes in v3:
-1- Dropped some clock/dpll framework builds for dra7 -2- Added all instances of IPs in dtsi file
-3- dtsi does a 'disabled' by default and dts enables as needed -4- soc_is_dra7xx() based on DT compatible instead of using ID code

Changes in v2:
-1- Fixed minor changelog details
-2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c -3- Added DTS update patches to this series which were earlier posted as part of the data series (Since they don't have much objections as against the other in-kernel data files)
-4- Updated the EVM dts file with pin config details for uart/mcspi and i2c

DRA7xx based SoCs' are high-performance, infotainment application devices, based on enhanced OMAP architecture integrated on a 28nm technology.

The DRA7xx family is composed of DRA75x and DRA74x devices. The current device for which the patches add support is the DRA752 SoC.

Quoted 6 lines

Most of the core IPs are similar to those found on the OMAP5 devices, including the dual cortex-A15 based MPU subsystem, which has helped quite some reuse from existing OMAP5 support.

This series contains only core support patches and none of the PRCM and hwmod data needed for the device to boot.

Tony, any chance of this series making it to 3.12?

Quoted 27 lines · Rajendra Nayak

Quoted 26 lines · Rajendra Nayak

Changes in v3:
-1- Dropped some clock/dpll framework builds for dra7 -2- Added all instances of IPs in dtsi file
-3- dtsi does a 'disabled' by default and dts enables as needed -4- soc_is_dra7xx() based on DT compatible instead of using ID code

Changes in v2:
-1- Fixed minor changelog details
-2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c -3- Added DTS update patches to this series which were earlier posted as part of the data series (Since they don't have much objections as against the other in-kernel data files)
-4- Updated the EVM dts file with pin config details for uart/mcspi and i2c

DRA7xx based SoCs' are high-performance, infotainment application devices, based on enhanced OMAP architecture integrated on a 28nm technology.

The DRA7xx family is composed of DRA75x and DRA74x devices. The current device for which the patches add support is the DRA752 SoC.

Most of the core IPs are similar to those found on the OMAP5 devices, including the dual cortex-A15 based MPU subsystem, which has helped quite some reuse from existing OMAP5 support.

Quoted 4 lines

Quoted 2 lines

This series contains only core support patches and none of the PRCM and hwmod data needed for the device to boot.

Tony, any chance of this series making it to 3.12?

Looks OK to me, want to do a pull request against -rc5 for me?

Regards,

Tony