trivial: fix a typo in Documentation/00-INDEX
PATCH 1/1 trivial: fix a typo in Documentation/00-INDEX
--- Documentation/00-INDEX | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/00-INDEX +1 -1
@@ -40,7 +40,7 @@ IPMI.txt IRQ-affinity.txt - how to select which CPU(s) handle which interrupt events on SMP. IRQ-domain.txt - - info on inerrupt numbering and setting up IRQ domains. + - info on interrupt numbering and setting up IRQ domains. IRQ.txt - description of what an IRQ is. Intel-IOMMU.txt
Signature · 1 line
1.8.3.1
Quoted 9 lines · Murilo Opsfelder Araujo
--- Documentation/00-INDEX | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)Documentation/00-INDEX +0
-0
Documentation/00-INDEX IPMI.txt · line 46
Quoted 8 lines
Documentation/00-INDEX +1
-1@@ -40,7 +40,7 @@ IPMI.txt IRQ-affinity.txt - how to select which CPU(s) handle which interrupt events on SMP. IRQ-domain.txt - - info on inerrupt numbering and setting up IRQ domains. + - info on interrupt numbering and setting up IRQ domains. IRQ.txt - description of what an IRQ is. Intel-IOMMU.txt
Please resend your patch with proper Signed-off-by: line as documented in Documentation/SubmittingPatches, so that it could be applied.
Thanks,
Signature · 2 lines
Jiri Kosina SUSE Labs
PATCH v2 1/1 trivial: fix a typo in Documentation/00-INDEX
Signed-off-by Murilo Opsfelder Araujo <[email protected]>
--- Documentation/00-INDEX | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/00-INDEX +1 -1
@@ -40,7 +40,7 @@ IPMI.txt IRQ-affinity.txt - how to select which CPU(s) handle which interrupt events on SMP. IRQ-domain.txt - - info on inerrupt numbering and setting up IRQ domains. + - info on interrupt numbering and setting up IRQ domains. IRQ.txt - description of what an IRQ is. Intel-IOMMU.txt
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1.8.3.1