Document msm_serial bindings and support newer uartdms
Subsystems (5)
v2 cover Document msm_serial bindings and support newer uartdms
This patchset aligns the msm_serial driver more with downstream usage and also documents the msm_serial driver's DT binding. Along the way we update the clock names and add support for newer UARTDM hardware that isn't part of a GSBI and make the console layer use the extra registers in UARTDM.
Changes since v1:
* Dropped _clk postfix from {core,iface}_clk
* Split DT binding into two files
* Renamed DT binding files to match compatible strings
* Fixed up DT review comments
* Added new patch 5/5 (more than 1 char for UARTDM)
Stephen Boyd (5):
msm_serial: Switch clock consumer strings and simplify code
devicetree: serial: Document msm_serial bindings
msm_serial: Add support for non-GSBI UARTDM devices
ARM: dts: msm: Update uartdm compatible strings
msm_serial: Send more than 1 character on the console w/ UARTDM
.../devicetree/bindings/serial/qcom,msm-uart.txt | 25 ++++++ .../devicetree/bindings/serial/qcom,msm-uartdm.txt | 52 +++++++++++++ arch/arm/boot/dts/msm8660-surf.dts | 2 +- arch/arm/boot/dts/msm8960-cdp.dts | 2 +- arch/arm/mach-msm/devices-msm7x00.c | 6 +- arch/arm/mach-msm/devices-msm7x30.c | 2 +- arch/arm/mach-msm/devices-qsd8x50.c | 6 +- drivers/tty/serial/msm_serial.c | 88 ++++++++++++++-------- 8 files changed, 144 insertions(+), 39 deletions(-) create mode 100644 Documentation/devicetree/bindings/serial/qcom,msm-uart.txt create mode 100644 Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
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PATCH v2 1/5 msm_serial: Switch clock consumer strings and simplify code
In downstream kernel we've standardized the clock consumer names that MSM device drivers use. Replace the uart specific clock names in this driver with the more standard 'core' and 'iface' names. Also simplify the code by assuming that clk_prepare_enable and clk_disable_unprepare() will properly check for NULL pointers (it will because MSM uses the common clock framework).
--- arch/arm/mach-msm/devices-msm7x00.c | 6 +++--- arch/arm/mach-msm/devices-msm7x30.c | 2 +- arch/arm/mach-msm/devices-qsd8x50.c | 6 +++--- drivers/tty/serial/msm_serial.c | 19 +++++-------------- 4 files changed, 12 insertions(+), 21 deletions(-)
arch/arm/mach-msm/devices-msm7x00.c +3 -3
@@ -456,9 +456,9 @@ static struct clk_pcom_desc msm_clocks_7x01a[] = {CLK_PCOM ("tsif_ref_clk" ,TSIF_REF_CLK ,NULL ,0 ),CLK_PCOM ("tv_dac_clk" ,TV_DAC_CLK ,NULL ,0 ),CLK_PCOM ("tv_enc_clk" ,TV_ENC_CLK ,NULL ,0 ), -CLK_PCOM ("uart_clk" ,UART1_CLK ,"msm_serial.0" ,OFF ), -CLK_PCOM ("uart_clk" ,UART2_CLK ,"msm_serial.1" ,0 ), -CLK_PCOM ("uart_clk" ,UART3_CLK ,"msm_serial.2" ,OFF ), +CLK_PCOM ("core" ,UART1_CLK ,"msm_serial.0" ,OFF ), +CLK_PCOM ("core" ,UART2_CLK ,"msm_serial.1" ,0 ), +CLK_PCOM ("core" ,UART3_CLK ,"msm_serial.2" ,OFF ),CLK_PCOM ("uart1dm_clk" ,UART1DM_CLK ,NULL ,OFF ),CLK_PCOM ("uart2dm_clk" ,UART2DM_CLK ,NULL ,0 ), CLK_PCOM("usb_hs_clk", USB_HS_CLK, "msm_hsusb", OFF),
arch/arm/mach-msm/devices-msm7x30.c +1 -1
@@ -211,7 +211,7 @@ static struct clk_pcom_desc msm_clocks_7x30[] = {CLK_PCOM ("spi_pclk" ,SPI_P_CLK ,NULL ,0 ),CLK_PCOM ("tv_dac_clk" ,TV_DAC_CLK ,NULL ,0 ),CLK_PCOM ("tv_enc_clk" ,TV_ENC_CLK ,NULL ,0 ), -CLK_PCOM ("uart_clk" ,UART2_CLK ,"msm_serial.1" ,0 ), +CLK_PCOM ("core" ,UART2_CLK ,"msm_serial.1" ,0 ),CLK_PCOM ("usb_phy_clk" ,USB_PHY_CLK ,NULL ,0 ),CLK_PCOM ("usb_hs_clk" ,USB_HS_CLK ,NULL ,OFF ), CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
arch/arm/mach-msm/devices-qsd8x50.c +3 -3
@@ -358,9 +358,9 @@ static struct clk_pcom_desc msm_clocks_8x50[] = {CLK_PCOM ("tsif_ref_clk" ,TSIF_REF_CLK ,NULL ,0 ),CLK_PCOM ("tv_dac_clk" ,TV_DAC_CLK ,NULL ,0 ),CLK_PCOM ("tv_enc_clk" ,TV_ENC_CLK ,NULL ,0 ), -CLK_PCOM ("uart_clk" ,UART1_CLK ,NULL ,OFF ), -CLK_PCOM ("uart_clk" ,UART2_CLK ,NULL ,0 ), -CLK_PCOM ("uart_clk" ,UART3_CLK ,"msm_serial.2" ,OFF ), +CLK_PCOM ("core" ,UART1_CLK ,NULL ,OFF ), +CLK_PCOM ("core" ,UART2_CLK ,NULL ,0 ), +CLK_PCOM ("core" ,UART3_CLK ,"msm_serial.2" ,OFF ),CLK_PCOM ("uartdm_clk" ,UART1DM_CLK ,NULL ,OFF ),CLK_PCOM ("uartdm_clk" ,UART2DM_CLK ,NULL ,0 ), CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
drivers/tty/serial/msm_serial.c +5 -14
@@ -416,8 +416,7 @@ static void msm_init_clock(struct uart_port *port)struct msm_port *msm_port =UART_TO_MSM (port);clk_prepare_enable (msm_port->clk); -if (!IS_ERR (msm_port->pclk)) -clk_prepare_enable (msm_port->pclk); +clk_prepare_enable (msm_port->pclk);msm_serial_set_mnd_regs (port); }
@@ -693,13 +692,11 @@ static void msm_power(struct uart_port *port, unsigned int state,switch (state) {case 0 :clk_prepare_enable (msm_port->clk); -if (!IS_ERR (msm_port->pclk)) -clk_prepare_enable (msm_port->pclk); +clk_prepare_enable (msm_port->pclk);break ;case 3 :clk_disable_unprepare (msm_port->clk); -if (!IS_ERR (msm_port->pclk)) -clk_disable_unprepare (msm_port->pclk); +clk_disable_unprepare (msm_port->pclk);break ;default :printk (KERN_ERR "msm_serial: Unknown PM state %d\n" , state);
@@ -887,18 +884,12 @@ static int __init msm_serial_probe(struct platform_device *pdev)else msm_port->is_uartdm =0 ; -if (msm_port->is_uartdm) { - msm_port->clk =devm_clk_get (&pdev->dev,"gsbi_uart_clk" ); - msm_port->pclk =devm_clk_get (&pdev->dev,"gsbi_pclk" ); - }else { - msm_port->clk =devm_clk_get (&pdev->dev,"uart_clk" ); - msm_port->pclk =ERR_PTR (-ENOENT ); - } - + msm_port->clk =devm_clk_get (&pdev->dev,"core" );if (IS_ERR (msm_port->clk))return PTR_ERR (msm_port->clk);if (msm_port->is_uartdm) { + msm_port->pclk =devm_clk_get (&pdev->dev,"iface" );if (IS_ERR (msm_port->pclk))return PTR_ERR (msm_port->pclk);
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PATCH v2 2/5 devicetree: serial: Document msm_serial bindings
In reply to Stephen BoydThe msm serial device bindings were added to the DTS files but never documented. Let's document them now and also fix things up so that it's clearer what hardware is supported. Instead of using hsuart (for high speed uart), let's use uartdm because that matches the actual name of the hardware. Also, let's add the version information in case we need to differentiate between different versions of the hardware in the future.
--- .../devicetree/bindings/serial/qcom,msm-uart.txt | 25 +++++++++++ .../devicetree/bindings/serial/qcom,msm-uartdm.txt | 52 ++++++++++++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/qcom,msm-uart.txt create mode 100644 Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
Documentation/devicetree/bindings/serial/qcom,msm-uart.txt new file +25 -0
@@ -0,0 +1,25 @@ +* MSM Serial UART + +The MSM serial UART hardware is designed for low-speed use cases where a +dma-engine isn't needed. From a software perspective it's mostly compatible +with the MSM serial UARTDM except that it only supports reading and writing one +character at a time. + +Required properties: +- compatible: Should contain "qcom,msm-uart" +- reg: Should contain UART register location and length. +- interrupts: Should contain UART interrupt. +- clocks: Should contain the core clock. +- clock-names: Should be "core". + +Example: + +A uart device at 0xa9c00000 with interrupt 11. + +serial at a9c00000 { + compatible = "qcom,msm-uart"; + reg = <0xa9c00000 0x1000>; + interrupts = <11>; + clocks = <&uart_cxc>; + clock-names = "core"; +};
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +52 -0
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Re: [PATCH v2 2/5] devicetree: serial: Document msm_serial bindings
Quoted 11 lines · Stephen Boyd
The msm serial device bindings were added to the DTS files but never documented. Let's document them now and also fix things up so that it's clearer what hardware is supported. Instead of using hsuart (for high speed uart), let's use uartdm because that matches the actual name of the hardware. Also, let's add the version information in case we need to differentiate between different versions of the hardware in the future.
Cc David Brown <[email protected]>Cc <[email protected]>Signed-off-by Stephen Boyd <[email protected]>
Quoted 6 lines
---
.../devicetree/bindings/serial/qcom,msm-uart.txt| 25 +++++++++++.../devicetree/bindings/serial/qcom,msm-uartdm.txt| 52 ++++++++++++++++++++++2 files changed, 77 insertions(+)create mode 100644
Documentation/devicetree/bindings/serial/qcom,msm-uart.txtcreate mode 100644Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
Should we remove bindings/tty/serial/msm_serial.txt ?
Quoted 45 lines
Documentation/devicetree/bindings/serial/qcom,msm-uart.txt new file +25
-0@@ -0,0 +1,25 @@ +* MSM Serial UART + +The MSM serial UART hardware is designed for low-speed use cases where a +dma-engine isn't needed. From a software perspective it's mostly compatible +with the MSM serial UARTDM except that it only supports reading and writing one +character at a time. + +Required properties: +- compatible: Should contain "qcom,msm-uart" +- reg: Should contain UART register location and length. +- interrupts: Should contain UART interrupt. +- clocks: Should contain the core clock. +- clock-names: Should be "core". + +Example: + +A uart device at 0xa9c00000 with interrupt 11. + +serial@a9c00000 { + compatible = "qcom,msm-uart"; + reg = <0xa9c00000 0x1000>; + interrupts = <11>; + clocks = <&uart_cxc>; + clock-names = "core"; +};Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +8
-0@@ -0,0 +1,52 @@ +* MSM Serial UARTDM + +The MSM serial UARTDM hardware is designed for high-speed use cases where the +transmit and/or receive channels can be offloaded to a dma-engine. From a +software perspective it's mostly compatible with the MSM serial UART except +that it supports reading and writing multiple characters at a time. + +Required properties:
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt line 18
Quoted 10 lines
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +10
-0+- compatible: Should contain at least "qcom,msm-uartdm". + A more specific property should be specified as follows depending + on the version: + "qcom,msm-uartdm-v1.1" + "qcom,msm-uartdm-v1.2" + "qcom,msm-uartdm-v1.3" + "qcom,msm-uartdm-v1.4" +- reg: Should contain UART register locations and lengths. The first + register shall specify the main control registers. An optional second + register location shall specify the GSBI control region.
Can we add something like:
"qcom,msm-uartdm-v1.3" is the only compatible that might optionally need the GSBI control region.
Quoted 25 lines
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +24
-0+- interrupts: Should contain UART interrupt. +- clocks: Should contain the core clock and the AHB clock. +- clock-names: Should be "core" for the core clock and "iface" for the + AHB clock. + +Optional properties: +- dmas: Should contain dma specifiers for transmit and receive channels +- dma-names: Should contain "tx" for transmit and "rx" for receive channels + +Examples: + +A uartdm v1.4 device with dma capabilities. + +serial@f991e000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0xf991e000 0x1000>; + interrupts = <0 108 0x0>; + clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>; + clock-names = "core", "iface"; + dmas = <&dma0 0>, <&dma0 1>; + dma-names = "tx", "rx"; +}; + +A uartdm v1.3 device without dma capabilities and part of a GSBI complex. Note
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt line 52
Quoted 10 lines
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +10
-0+that not all v1.3 hardware is part of a GSBI. + +serial@19c40000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x19c40000 0x1000>, + <0x19c00000 0x1000>; + interrupts = <0 195 0x0>; + clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>; + clock-names = "core", "iface"; +};
- k
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Re: [PATCH v2 2/5] devicetree: serial: Document msm_serial bindings
Quoted 21 lines · Kumar Gala
Quoted 11 lines · Stephen Boyd
The msm serial device bindings were added to the DTS files but never documented. Let's document them now and also fix things up so that it's clearer what hardware is supported. Instead of using hsuart (for high speed uart), let's use uartdm because that matches the actual name of the hardware. Also, let's add the version information in case we need to differentiate between different versions of the hardware in the future.
Cc David Brown <[email protected]>Cc <[email protected]>Signed-off-by Stephen Boyd <[email protected]>Quoted 6 lines
---
.../devicetree/bindings/serial/qcom,msm-uart.txt| 25 +++++++++++.../devicetree/bindings/serial/qcom,msm-uartdm.txt| 52 ++++++++++++++++++++++2 files changed, 77 insertions(+)create mode 100644
Documentation/devicetree/bindings/serial/qcom,msm-uart.txtcreate mode 100644Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
Quoted 1 line
Should we remove
bindings/tty/serial/msm_serial.txt?
Yes, although I'm confused why there is a tty/serial/ and a serial/ binding directory.
Quoted 59 lines
Quoted 46 lines
Documentation/devicetree/bindings/serial/qcom,msm-uart.txt new file +25
-0@@ -0,0 +1,25 @@ +* MSM Serial UART + +The MSM serial UART hardware is designed for low-speed use cases where a +dma-engine isn't needed. From a software perspective it's mostly compatible +with the MSM serial UARTDM except that it only supports reading and writing one +character at a time. + +Required properties: +- compatible: Should contain "qcom,msm-uart" +- reg: Should contain UART register location and length. +- interrupts: Should contain UART interrupt. +- clocks: Should contain the core clock. +- clock-names: Should be "core". + +Example: + +A uart device at 0xa9c00000 with interrupt 11. + +serial at a9c00000 { + compatible = "qcom,msm-uart"; + reg = <0xa9c00000 0x1000>; + interrupts = <11>; + clocks = <&uart_cxc>; + clock-names = "core"; +};Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +8
-0@@ -0,0 +1,52 @@ +* MSM Serial UARTDM + +The MSM serial UARTDM hardware is designed for high-speed use cases where the +transmit and/or receive channels can be offloaded to a dma-engine. From a +software perspective it's mostly compatible with the MSM serial UART except +that it supports reading and writing multiple characters at a time. + +Required properties:Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt line 18
Quoted 10 lines
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt new file +10
-0+- compatible: Should contain at least "qcom,msm-uartdm". + A more specific property should be specified as follows depending + on the version: + "qcom,msm-uartdm-v1.1" + "qcom,msm-uartdm-v1.2" + "qcom,msm-uartdm-v1.3" + "qcom,msm-uartdm-v1.4" +- reg: Should contain UART register locations and lengths. The first + register shall specify the main control registers. An optional second + register location shall specify the GSBI control region.Can we add something like:
Quoted 1 line
"qcom,msm-uartdm-v1.3" is the only compatible that might optionally need the GSBI control region.
Ok. I will remove the part from the example.
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PATCH v2 3/5 msm_serial: Add support for non-GSBI UARTDM devices
In reply to Stephen BoydNot all UARTDM hardware is part of a GSBI complex. Add support for these devices and fix a bug where we assumed uartdm meant the hardware was part of a GSBI complex.
--- drivers/tty/serial/msm_serial.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/tty/serial/msm_serial.c +8 -2
@@ -670,7 +670,7 @@ static void msm_config_port(struct uart_port *port, int flags)if (ret)return ; } -if (msm_port->is_uartdm) +if (msm_port->gsbi_base)writel_relaxed (GSBI_PROTOCOL_UART , msm_port->gsbi_base +GSBI_CONTROL ); }
@@ -860,6 +860,11 @@ static struct uart_driver msm_uart_driver = {static atomic_t msm_uart_next_id =ATOMIC_INIT (0 ); +static const struct of_device_id msm_uartdm_table[] = { + { .compatible ="qcom,msm-uartdm" }, + { } +}; +static int __init msm_serial_probe (struct platform_device *pdev) {struct msm_port *msm_port;
@@ -879,7 +884,7 @@ static int __init msm_serial_probe(struct platform_device *pdev) port->dev = &pdev->dev; msm_port =UART_TO_MSM (port); -if (platform_get_resource (pdev,IORESOURCE_MEM ,1 )) +if (of_match_device (msm_uartdm_table, &pdev->dev)) msm_port->is_uartdm =1 ;else msm_port->is_uartdm =0 ;
@@ -926,6 +931,7 @@ static int msm_serial_remove(struct platform_device *pdev)static struct of_device_id msm_match_table[] = { { .compatible ="qcom,msm-uart" }, + { .compatible ="qcom,msm-uartdm" }, {} };
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PATCH v2 4/5 ARM: dts: msm: Update uartdm compatible strings
In reply to Stephen BoydLet's follow the ratified DT binding and use uartdm instead of hsuart. This does break backwards compatibility but this shouldn't be a problem because the uart driver isn't probing on these devices without adding clock support (which isn't merged so far).
--- arch/arm/boot/dts/msm8660-surf.dts | 2 +- arch/arm/boot/dts/msm8960-cdp.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/msm8660-surf.dts +1 -1
@@ -38,7 +38,7 @@ }; serial at 19c40000 { - compatible = "qcom,msm-hsuart", "qcom,msm-uart"; + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x19c40000 0x1000>, <0x19c00000 0x1000>; interrupts = <0 195 0x0>;
arch/arm/boot/dts/msm8960-cdp.dts +1 -1
@@ -38,7 +38,7 @@ }; serial at 16440000 { - compatible = "qcom,msm-hsuart", "qcom,msm-uart"; + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x16440000 0x1000>, <0x16400000 0x1000>; interrupts = <0 154 0x0>;
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PATCH v2 5/5 msm_serial: Send more than 1 character on the console w/ UARTDM
In reply to Stephen BoydWe recently added support to send more than one character at a time for UARTDM hardware but we didn't add the same support in the console code path. Add support here to speed up console messages on UARTDM hardware.
--- drivers/tty/serial/msm_serial.c | 59 +++++++++++++++++++++++++++++++---------- 1 file changed, 45 insertions(+), 14 deletions(-)
drivers/tty/serial/msm_serial.c +45 -14
@@ -761,32 +761,63 @@ static inline struct uart_port *get_port_from_line(unsigned int line) }#ifdef CONFIG_SERIAL_MSM_CONSOLE - -static void msm_console_putchar (struct uart_port *port,int c) -{ -struct msm_port *msm_port =UART_TO_MSM (port); - -if (msm_port->is_uartdm) -reset_dm_count (port,1 ); - -while (!(msm_read (port,UART_SR ) &UART_SR_TX_READY )) - ; -msm_write (port, c, msm_port->is_uartdm ?UARTDM_TF :UART_TF ); -} -static void msm_console_write (struct console *co,const char *s,unsigned int count) { +int i;struct uart_port *port;struct msm_port *msm_port; +int num_newlines =0 ; +bool replaced = false;BUG_ON (co->index <0 || co->index >=UART_NR ); port =get_port_from_line (co->index); msm_port =UART_TO_MSM (port); +/* Account for newlines that will get a carriage return added */ +for (i =0 ; i < count; i++) +if (s[i] =='\n' ) + num_newlines++; + count += num_newlines; +spin_lock (&port->lock); -uart_console_write (port, s, count, msm_console_putchar); +if (msm_port->is_uartdm) +reset_dm_count (port, count); + + i =0 ; +while (i < count) { +int j; +unsigned int num_chars; +char buf[4 ] = {0 }; +unsigned int *bf = (unsigned int *)&buf; + +if (msm_port->is_uartdm) + num_chars =min (count - i, (unsigned int )sizeof (buf)); +else + num_chars =1 ; + +for (j =0 ; j < num_chars; j++) { +char c = *s; + +if (c =='\n' && !replaced) { + buf[j] ='\r' ; + j++; + replaced = true; + } +if (j < num_chars) { + buf[j] = c; + s++; + replaced = false; + } + } + +while (!(msm_read (port,UART_SR ) &UART_SR_TX_READY )) +cpu_relax (); + +msm_write (port, *bf, msm_port->is_uartdm ?UARTDM_TF :UART_TF ); + i += num_chars; + }spin_unlock (&port->lock); }
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Greg Kroah-Hartman
maintainerQuoted 6 lines · Stephen Boyd
This patchset aligns the
msm_serialdriver more with downstream usage and also documents themsm_serialdriver's DT binding. Along the way we update the clock names and add support for newer UARTDM hardware that isn't part of a GSBI and make the console layer use the extra registers in UARTDM.
Quoted 6 lines
Changes since v1:
* Dropped_clkpostfix from {core,iface}_clk
* Split DT binding into two files
* Renamed DT binding files to match compatible strings
* Fixed up DT review comments
* Added new patch 5/5 (more than 1 char for UARTDM)
I took patches 1, 3, and 5 from this series, as it seems that the dt bindings are still being discussed.
thanks,
greg k-h
Quoted 7 lines · Greg Kroah-Hartman
Quoted 6 lines · Stephen Boyd
This patchset aligns the
msm_serialdriver more with downstream usage and also documents themsm_serialdriver's DT binding. Along the way we update the clock names and add support for newer UARTDM hardware that isn't part of a GSBI and make the console layer use the extra registers in UARTDM.
Quoted 8 lines
Quoted 6 lines
Changes since v1:
* Dropped_clkpostfix from {core,iface}_clk
* Split DT binding into two files
* Renamed DT binding files to match compatible strings
* Fixed up DT review comments
* Added new patch 5/5 (more than 1 char for UARTDM)I took patches 1, 3, and 5 from this series, as it seems that the dt bindings are still being discussed.
Thanks Greg. I'll resend the patches right now. I got sidetracked on other things.
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