x86: remove X86_INTEL_USERCOPY code
PATCH 1/2 x86: remove X86_INTEL_USERCOPY code
Nothing defines CONFIG_X86_INTEL_USERCOPY, and as far as I can tell it was never used even when Xen supported 32-bit x86.
Signed-off-by Matt Wilson <[email protected]>
--- xen/arch/x86/cpu/intel.c | 21 --------------------- 1 files changed, 0 insertions(+), 21 deletions(-)
xen/arch/x86/cpu/intel.c +0 -21
@@ -18,13 +18,6 @@#define select_idle_routine (x) ((void)0) -#ifdef CONFIG_X86_INTEL_USERCOPY -/* -* Alignment at which movsl is preferred for bulk memory copies. -*/ -struct movsl_mask movsl_mask__read_mostly ; -#endif -static unsigned int probe_intel_cpuid_faulting (void ) {uint64_t x;
@@ -229,20 +222,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)/* Work around errata */ Intel_errata_workarounds (c); -#ifdef CONFIG_X86_INTEL_USERCOPY -/* -* Set up the preferred alignment for movsl bulk memory moves -*/ -switch (c->x86) { -case 6 :/* PII/PIII only like movsl with 8-byte alignment */ - movsl_mask.mask =7 ; -break ; -case 15 :/* P4 is OK down to 8-byte alignment */ - movsl_mask.mask =7 ; -break ; - } -#endif -if ((c->x86 ==0xf && c->x86_model >=0x03 ) || (c->x86 ==0x6 && c->x86_model >=0x0e ))set_bit (X86_FEATURE_CONSTANT_TSC , c->x86_capability);
Signature · 1 line
1.7.4.5
PATCH 2/2 x86: remove Pentium Pro check
... as it's not a supported processor
Signed-off-by Matt Wilson <[email protected]>
Cc Keir Fraser <[email protected]>
Cc Jan Beulich <[email protected]>
Cc Andrew Cooper <[email protected]>
--- xen/arch/x86/cpu/intel.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)
xen/arch/x86/cpu/intel.c +0 -4
@@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)set_bit (X86_FEATURE_ARCH_PERFMON , c->x86_capability); } -/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */ -if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) <0x633 ) -clear_bit (X86_FEATURE_SEP , c->x86_capability); -if ( !cpu_has (c,X86_FEATURE_XTOPOLOGY ) ) { c->x86_max_cores =num_cpu_cores (c);
Signature · 1 line
1.7.4.5
Re: [PATCH 2/2] x86: remove Pentium Pro check
Quoted 6 lines · Matt Wilson
... as it's not a supported processor
Signed-off-by Matt Wilson <[email protected]>Cc Keir Fraser <[email protected]>Cc Jan Beulich <[email protected]>Cc Andrew Cooper <[email protected]>
Acked-by Keir Fraser <[email protected]>
Quoted 20 lines
--- xen/arch/x86/cpu/intel.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)xen/arch/x86/cpu/intel.c +0
-1@@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)set_bit (X86_FEATURE_ARCH_PERFMON , c->x86_capability); } -/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */
- if ((c->x86<<8 | c->x86_model<<4 |c->x86_mask) <0x633)xen/arch/x86/cpu/intel.c +0
-2-clear_bit (X86_FEATURE_SEP , c->x86_capability); -if ( !cpu_has(c,
X86_FEATURE_XTOPOLOGY) ) {c->x86_max_cores=num_cpu_cores(c);
Re: [PATCH 2/2] x86: remove Pentium Pro check
In reply to Matt WilsonQuoted 6 lines · Matt Wilson
... as it's not a supported processor
Signed-off-by Matt Wilson <[email protected]>Cc Keir Fraser <[email protected]>Cc Jan Beulich <[email protected]>Cc Andrew Cooper <[email protected]>
Reviewed-by Andrew Cooper <[email protected]>
Quoted 19 lines
--- xen/arch/x86/cpu/intel.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)xen/arch/x86/cpu/intel.c +0
-4@@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)set_bit (X86_FEATURE_ARCH_PERFMON , c->x86_capability); } -/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */ -if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) <0x633 ) -clear_bit (X86_FEATURE_SEP , c->x86_capability); -if ( !cpu_has (c,X86_FEATURE_XTOPOLOGY ) ) { c->x86_max_cores =num_cpu_cores (c);
Quoted 4 lines · Matt Wilson
Nothing defines
CONFIG_X86_INTEL_USERCOPY, and as far as I can tell it was never used even when Xen supported 32-bit x86.Signed-off-by Matt Wilson <[email protected]>
And furthermore, turning it on would appear to result in a compile error as movsl_mask doesn't appear to exist anywhere, certainly nowhere I can find in the current tree.
Reviewed-by Andrew Cooper <[email protected]>
Quoted 43 lines
--- xen/arch/x86/cpu/intel.c | 21 --------------------- 1 files changed, 0 insertions(+), 21 deletions(-)xen/arch/x86/cpu/intel.c +0
-21@@ -18,13 +18,6 @@#define select_idle_routine (x) ((void)0) -#ifdef CONFIG_X86_INTEL_USERCOPY -/* -* Alignment at which movsl is preferred for bulk memory copies. -*/ -struct movsl_mask movsl_mask__read_mostly ; -#endif -static unsigned int probe_intel_cpuid_faulting (void ) {uint64_t x;@@ -229,20 +222,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)/* Work around errata */ Intel_errata_workarounds (c); -#ifdef CONFIG_X86_INTEL_USERCOPY -/* -* Set up the preferred alignment for movsl bulk memory moves -*/ -switch (c->x86) { -case 6 :/* PII/PIII only like movsl with 8-byte alignment */ - movsl_mask.mask =7 ; -break ; -case 15 :/* P4 is OK down to 8-byte alignment */ - movsl_mask.mask =7 ; -break ; - } -#endif -if ((c->x86 ==0xf && c->x86_model >=0x03 ) || (c->x86 ==0x6 && c->x86_model >=0x0e ))set_bit (X86_FEATURE_CONSTANT_TSC , c->x86_capability);