X86 platform: New BayTrail IOSF-SB MBI driver

From: "David E. Box" <[email protected]>

Current Intel SOC cores use a MailBox Interface (MBI) to provide access to unit devices connected to the system fabric. This driver implements access to this interface on BayTrail platforms. This is a requirement for drivers that need access to unit registers on the platform (e.g. accessing the PUNIT for power management features such as RAPL). Serialized access is handled by all exported routines with spinlocks.

The API includes 3 functions for access to unit registers:

int bt_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) int bt_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) int bt_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)

port: indicating the unit being accessed
opcode: the read or write port specific opcode
offset: the register offset within the port
mdr: the register data to be read, written, or modified
mask: bit locations in mdr to change

Returns nonzero on error

Note: GPU code handles access to the GFX unit. Therefore access to that unit with this driver is disallowed to avoid conflicts.

---
v5: Converted from pnpacpi/mmio driver to pci/config_space driver as
necessitated by firmware change.

v4: Define driver as platform specific to BayTrail as some platforms cannot
enumerate the MBI using ACPI as noted by Bin Gao <[email protected]> Renamed register macros and API funcitons to platform specific names. Changed dependency to PNPACPI as sugessted by Rafael Wysocki <[email protected]>

v3: Converted to PNP ACPI driver as sugessted by Rafael Wysocki <[email protected]>
Removed config visibility to user as suggested by Andi Kleen <[email protected]>

v2: Made modular since there was no longer a reason not to
Moved to x86 platform as suggested by Mathhew Garrett <[email protected]> Added probe to init to cause driver load to fail if device not detected.

 drivers/platform/x86/Kconfig          |    8 ++
 drivers/platform/x86/Makefile         |    1 +
 drivers/platform/x86/intel_baytrail.c |  224 +++++++++++++++++++++++++++++++++
 drivers/platform/x86/intel_baytrail.h |   90 +++++++++++++
 4 files changed, 323 insertions(+)
 create mode 100644 drivers/platform/x86/intel_baytrail.c
 create mode 100644 drivers/platform/x86/intel_baytrail.h

index b51a746..b482e22 100644
@@ -819,4 +819,12 @@ config PVPANIC
 	  a paravirtualized device provided by QEMU; it lets a virtual machine
 	  (guest) communicate panic events to the host.
 
+config INTEL_BAYTRAIL_MBI
+	tristate
+	depends on PCI
+	---help---
+	  Needed on Baytrail platforms for access to the IOSF Sideband Mailbox
+	  Interface. This is a requirement for systems that need to configure
+	  the PUNIT for power management features such as RAPL.
+
 endif # X86_PLATFORM_DEVICES

index 5dbe193..b3d4cfd 100644
@@ -55,3 +55,4 @@ obj-$(CONFIG_INTEL_RST)		+= intel-rst.o
 obj-$(CONFIG_INTEL_SMARTCONNECT)	+= intel-smartconnect.o
 
 obj-$(CONFIG_PVPANIC)           += pvpanic.o
+obj-$(CONFIG_INTEL_BAYTRAIL_MBI)	+= intel_baytrail.o

1.7.10.4