blackfin: update default config for bf609

index 1a43e1b..d97f063 100644
@@ -39,7 +39,7 @@
 #define CONFIG_CCLK_DIV			(1)
 /* SCLK_DIV controls the system clock divider				*/
 /* Values can range from 0-31 (where 0 means 32)			*/
-#define CONFIG_SCLK_DIV		(4)
+#define CONFIG_SCLK_DIV			(4)
 /* Values can range from 0-7 (where 0 means 8)				*/
 #define CONFIG_SCLK0_DIV		(1)
 #define CONFIG_SCLK1_DIV		(1)

@@ -56,7 +56,11 @@
 #define CONFIG_MEM_SIZE		128
 
 #define CONFIG_SMC_GCTL_VAL	0x00000010
+#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
 #define CONFIG_SMC_B0CTL_VAL	0x01007011
+#else
+#define CONFIG_SMC_B0CTL_VAL	0x01005011
+#endif
 #define CONFIG_SMC_B0TIM_VAL	0x08170977
 #define CONFIG_SMC_B0ETIM_VAL	0x00092231
 

@@ -64,6 +68,7 @@
 #define CONFIG_SYS_MALLOC_LEN	(512 * 1024)
 
 #define CONFIG_HW_WATCHDOG
+
 /*
  * Network Settings
  */

@@ -78,6 +83,7 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_MII
 #define CONFIG_MII
+#define CONFIG_ETHADDR	02:80:ad:20:31:e8
 
 /* i2c Settings */
 #define CONFIG_BFIN_TWI_I2C

@@ -126,6 +132,10 @@
 #define CONFIG_ENV_SIZE         0x8000
 #define CONFIG_ENV_SECT_SIZE    0x8000
 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+#define UBOOT_ENV_UPDATE \
+                "protect off 0xB0000000 +$(filesize);" \
+                "erase 0xB0000000 +$(filesize);" \
+                "cp.b $(loadaddr) 0xB0000000 $(filesize)"
 #endif
 
 #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0xB0100000\0"

@@ -146,11 +156,17 @@
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_SOFTSWITCH
 
-#define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 20*1024*1024 + 4)
+#define CONFIG_MISC_INIT_R
 #define CONFIG_BFIN_SOFT_SWITCH
 
 #define CONFIG_ADI_GPIO2
 
+/* linkport switch, uncomment to enable, conflict with nor flash
+#define CONFIG_BFIN_LINKPORT
+*/
+
+#define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 20*1024*1024 + 4)
+
 #if 0
 #define CONFIG_UART_MEM 1024
 #undef CONFIG_UART_CONSOLE