ARM: add omap3 INCOstartec board support
Subsystems (5)
v3 cover ARM: add omap3 INCOstartec board support
This set of patches adds board support for an omap3 system from INCOstartec. It's based on next-20140124.
Due to a regression since next-20140115 the following errors are present:
- pin sys_clkout2, which gets configured to 24 Mhz by the fourth patch in this set, erroneously outputs only 12 Mhz.
Just out of curiosity, configuring it to 48 Mhz puts out desired 24 Mhz.
- omap_dss, which gets configured by the third patch in this set, fails to do 'dss_set_fck_rate(fck);' in drivers/video/omap2/dss/dss.c:dss_setup_default_clock() which leads to:
| omapdss_dss: probe of omapdss_dss failed with error -22
| omapdss CORE error: Failed to initialize DSS platform driver
| panel-dpi panel-dpi.0: failed to find video source 'dpi.0Both regressions seem to have something to do with the clock framework. Could this be related to the DT clock conversion patches?
Changes compared to previous version (v3):
- rebased on next-20140124
- use pinctrl macros OMAP3_WKUP_IOPAD, OMAP3_CORE1_IOPAD and OMAP3630_CORE2_IOPAD
- use same convention for all comments
- dss-quirk: name twl4030 VPLL2 regulator as vdds_dsi
- fix style
Changes compared to previous version (v2):
- rebased on next-20140122 from next-20140115
- using omap36xx.dtsi instead of unsupported 1ghz omap37xx100
Initial version (v1):
- based on next-20140115
Christoph Fritz (4):
ARM: dts: omap3: Add support for INCOstartec a83x module
ARM: dts: omap3: Add support for INCOstartec DBB056 baseboard
ARM: OMAP2+: add legacy display for omap3 DBB056
ARM: OMAP2+: Add pdata quirk for sys_clkout2 for omap3 DBB056
arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 459 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap3-lilly-dbb056.dts | 165 +++++++++++ arch/arm/mach-omap2/dss-common.c | 49 ++++ arch/arm/mach-omap2/dss-common.h | 1 + arch/arm/mach-omap2/pdata-quirks.c | 45 ++- 6 files changed, 719 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/omap3-lilly-a83x.dtsi create mode 100644 arch/arm/boot/dts/omap3-lilly-dbb056.dts
Signature · 1 line
1.7.10.4
PATCH v3 1/4 ARM: dts: omap3: Add support for INCOstartec a83x module
INCOstartec LILLY-A83X module is a TI DM3730xx100 (OMAP3) SoC computer-on-module.
This patch adds device tree support for most of its features.
Signed-off-by Christoph Fritz <[email protected]>
--- arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 459 +++++++++++++++++++++++++++++++ 1 file changed, 459 insertions(+) create mode 100644 arch/arm/boot/dts/omap3-lilly-a83x.dtsi
arch/arm/boot/dts/omap3-lilly-a83x.dtsi new file +459 -0
@@ -0,0 +1,459 @@ +/* + * Copyright (C) 2014 Christoph Fritz <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include "omap36xx.dtsi" + +/ { + model = "INCOstartec LILLY-A83X module (DM3730)"; + compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3"; + + chosen { + bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x8000000>; /* 128 MB */ + }; + + leds { + compatible = "gpio-leds"; + + led1 { + label = "lilly-a83x::led1"; + gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + }; + + sound { + compatible = "ti,omap-twl4030"; + ti,model = "lilly-a83x"; + + ti,mcbsp = <&mcbsp2>; + ti,codec = <&twl_audio>; + }; + + reg_vcc3: vcc3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_vcc3>; + }; +}; + +&omap3_pmx_wkup { + pinctrl-names = "default"; + + lan9221_pins: pinmux_lan9221_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */ + >; + }; + + tsc2048_pins: pinmux_tsc2048_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */ + >; + }; + + mmc1cd_pins: pinmux_mmc1cd_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */ + >; + }; +}; + +&omap3_pmx_core { + pinctrl-names = "default"; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ + OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ + OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ + OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */ + OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ + OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */ + OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ + >; + }; + + hsusb1_pins: pinmux_hsusb1_pins { + pinctrl-single,pins = < + + /* GPIO 182 controls USB-Hub reset. But USB-Phy its + * reset can't be controlled. So we clamp this GPIO to + * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub. + */ + + OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */ + >; + }; + + hsusb_otg_pins: pinmux_hsusb_otg_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ + OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ + OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ + OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ + OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ + OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ + OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ + OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ + OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ + OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ + OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ + OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ + OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ + OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ + OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ + OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ + OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ + >; + }; + + spi2_pins: pinmux_spi2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */ + OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */ + OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */ + OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */ + >; + }; +}; + +&omap3_pmx_core2 { + pinctrl-names = "default"; + pinctrl-0 = < + &hsusb1_2_pins + >; + + hsusb1_2_pins: pinmux_hsusb1_2_pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ + OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ + OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */ + OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */ + OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */ + OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */ + OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */ + OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */ + OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */ + OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */ + OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */ + OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */ + >; + }; + + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */ + >; + }; + +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; + +&gpio6 { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb1_pins>; +}; + +&i2c1 { + clock-frequency = <2600000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + twl: twl at 48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; + }; + }; +}; + +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" + +&twl { + vmmc1: regulator-vmmc1 { + regulator-always-on; + }; + + vdd1: regulator-vdd1 { + regulator-always-on; + }; + + vdd2: regulator-vdd2 { + regulator-always-on; + }; +}; + +&i2c2 { + clock-frequency = <2600000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&i2c3 { + clock-frequency = <2600000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + gpiom1: gpio at 20 { + compatible = "mcp,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&uart4 { + status = "disabled"; +}; + +&mmc1 { + cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>; + cd-inverted; + vmmc-supply = <&vmmc1>; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins &mmc1cd_pins>; + cap-sdio-irq; + cap-sd-highspeed; + cap-mmc-highspeed; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&mcspi2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; + + tsc2046 at 0 { + reg = <0>; /* CS0 */ + compatible = "ti,tsc2046"; + interrupt-parent = <&gpio1>; + interrupts = <8 0>; /* boot6 / gpio_8 */ + spi-max-frequency = <1000000>; + pendown-gpio = <&gpio1 8 0>; + vcc-supply = <®_vcc3>; + pinctrl-names = "default"; + pinctrl-0 = <&tsc2048_pins>; + + ti,x-min = <300>; + ti,x-max = <3000>; + ti,y-min = <600>; + ti,y-max = <3600>; + ti,x-plate-ohms = <80>; + ti,pressure-max = <255>; + ti,swap-xy; + + linux,wakeup; + }; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; + +&usbhshost { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb1_2_pins>; + num-ports = <2>; + port1-mode = "ehci-phy"; +}; + +&usb_otg_hs { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb_otg_pins>; + interface-type = <0>; + usb-phy = <&usb2_phy>; + phys = <&usb2_phy>; + phy-names = "usb2-phy"; + mode = <3>; + power = <50>; +}; + +&gpmc { + ranges = <0 0 0x30000000 0x1000000>, + <7 0 0x15000000 0x01000000>; + + nand at 0,0 { + reg = <0 0 0x1000000>; + nand-bus-width = <16>; + ti,nand-ecc-opt = "bch8"; + /* no elm on omap3 */ + + gpmc,mux-add-data = <0>; + gpmc,device-nand; + gpmc,device-width = <2>; + gpmc,wait-pin = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,burst-length= <4>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <100>; + gpmc,cs-wr-off-ns = <100>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <100>; + gpmc,adv-wr-off-ns = <100>; + gpmc,oe-on-ns = <5>; + gpmc,oe-off-ns = <75>; + gpmc,we-on-ns = <5>; + gpmc,we-off-ns = <75>; + gpmc,rd-cycle-ns = <100>; + gpmc,wr-cycle-ns = <100>; + gpmc,access-ns = <60>; + gpmc,page-burst-access-ns = <5>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-delay-ns = <50>; + gpmc,wr-data-mux-bus-ns = <75>; + gpmc,wr-access-ns = <155>; + + #address-cells = <1>; + #size-cells = <1>; + + partition at 0 { + label = "MLO"; + reg = <0 0x80000>; + }; + + partition at 0x80000 { + label = "u-boot"; + reg = <0x80000 0x1e0000>; + }; + + partition at 0x260000 { + label = "u-boot-environment"; + reg = <0x260000 0x20000>; + }; + + partition at 0x280000 { + label = "kernel"; + reg = <0x280000 0x500000>; + }; + + partition at 0x780000 { + label = "filesystem"; + reg = <0x780000 0xf880000>; + }; + }; + + ethernet at 7,0 { + compatible = "smsc,lan9221", "smsc,lan9115"; + bank-width = <2>; + gpmc,mux-add-data = <2>; + gpmc,cs-on-ns = <10>; + gpmc,cs-rd-off-ns = <60>; + gpmc,cs-wr-off-ns = <60>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <10>; + gpmc,adv-wr-off-ns = <10>; + gpmc,oe-on-ns = <10>; + gpmc,oe-off-ns = <60>; + gpmc,we-on-ns = <10>; + gpmc,we-off-ns = <60>; + gpmc,rd-cycle-ns = <100>; + gpmc,wr-cycle-ns = <100>; + gpmc,access-ns = <50>; + gpmc,page-burst-access-ns = <5>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <75>; + gpmc,wr-data-mux-bus-ns = <15>; + gpmc,wr-access-ns = <75>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + vddvario-supply = <®_vcc3>; + vdd33a-supply = <®_vcc3>; + reg-io-width = <4>; + interrupt-parent = <&gpio5>; + interrupts = <1 0x2>; + reg = <7 0 0xff>; + pinctrl-names = "default"; + pinctrl-0 = <&lan9221_pins>; + phy-mode = "mii"; + }; +};
Signature · 1 line
1.7.10.4
PATCH v3 2/4 ARM: dts: omap3: Add support for INCOstartec DBB056 baseboard
In reply to Christoph FritzINCOstartec LILLY-DBB056 is a carrier board (baseboard) for computer-on-module LILLY-A83X.
This patch adds device-tree support for most of its features.
Signed-off-by Christoph Fritz <[email protected]>
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/omap3-lilly-dbb056.dts | 165 ++++++++++++++++++++++++++++++ 2 files changed, 166 insertions(+) create mode 100644 arch/arm/boot/dts/omap3-lilly-dbb056.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -215,6 +215,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-gta04.dtb \ omap3-igep0020.dtb \ omap3-igep0030.dtb \ + omap3-lilly-dbb056.dtb \ omap3-zoom3.dtb \ omap4-panda.dtb \ omap4-panda-a4.dtb \
arch/arm/boot/dts/omap3-lilly-dbb056.dts new file +165 -0
165 lines not on this page · raw message
Signature · 1 line
1.7.10.4
PATCH v3 3/4 ARM: OMAP2+: add legacy display for omap3 DBB056
In reply to Christoph FritzFull device tree support for omapdss is not yet accomplished. Until then, init display by legacy platform code.
Signed-off-by Christoph Fritz <[email protected]>
--- arch/arm/mach-omap2/dss-common.c | 49 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/dss-common.h | 1 + arch/arm/mach-omap2/pdata-quirks.c | 8 +++++- 3 files changed, 57 insertions(+), 1 deletion(-)
arch/arm/mach-omap2/dss-common.c +49 -0
@@ -257,3 +257,52 @@ void __init omap3_igep2_display_init_of(void)platform_device_register (&omap3_igep2_tfp410_device);platform_device_register (&omap3_igep2_dvi_connector_device); } + +/* OMAP3 dbb056 data */ + +#define DBB056_DISPLAY_ENABLE_GPIO 156 + +static const struct display_timing dbb056_lcd_videomode = { + .pixelclock = {0 ,19200000 ,0 }, + + .hactive = {0 ,640 ,0 }, + .hfront_porch = {0 ,104 ,0 }, + .hback_porch = {0 ,8 ,0 }, + .hsync_len = {0 ,8 ,0 }, + + .vactive = {0 ,480 ,0 }, + .vfront_porch = {0 ,104 ,0 }, + .vback_porch = {0 ,8 ,0 }, + .vsync_len = {0 ,8 ,0 }, + + .flags =DISPLAY_FLAGS_HSYNC_LOW |DISPLAY_FLAGS_VSYNC_LOW | +DISPLAY_FLAGS_DE_HIGH |DISPLAY_FLAGS_PIXDATA_NEGEDGE , +}; + +static struct panel_dpi_platform_data dbb056_lcd_pdata = { + .name ="lcd" , + .source ="dpi.0" , + + .data_lines =18 , + + .display_timing = &dbb056_lcd_videomode, + + .enable_gpio =DBB056_DISPLAY_ENABLE_GPIO , + .backlight_gpio =-1 , +}; + +static struct platform_device dbb056_lcd_device = { + .name ="panel-dpi" , + .id =0 , + .dev.platform_data = &dbb056_lcd_pdata, +}; + +static struct omap_dss_board_info omap_dbb056_dss_data = { + .default_display_name ="lcd" , +}; + +void __init omap3_dbb056_display_init_of (void ) +{ +platform_device_register (&dbb056_lcd_device); +omap_display_init (&omap_dbb056_dss_data); +}
arch/arm/mach-omap2/dss-common.h +1 -0
@@ -9,5 +9,6 @@void __init omap4_panda_display_init_of (void );void __init omap_4430sdp_display_init_of (void );void __init omap3_igep2_display_init_of (void ); +void __init omap3_dbb056_display_init_of (void );#endif
arch/arm/mach-omap2/pdata-quirks.c +7 -1
@@ -169,6 +169,11 @@ static void __init am3517_evm_legacy_init(void)omap_ctrl_writel (v,AM35XX_CONTROL_IP_SW_RESET ); omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ } + +static void __init omap3_dbb056_legacy_init (void ) +{ +omap3_dbb056_display_init_of (); +}#endif /* CONFIG_ARCH_OMAP3 */ #ifdef CONFIG_ARCH_OMAP4
@@ -259,10 +264,11 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { static struct pdata_init pdata_quirks[] __initdata = {#ifdef CONFIG_ARCH_OMAP3 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, }, + { "incostartec,omap3-lilly-dbb056", omap3_dbb056_legacy_init, }, + { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, { "nokia,omap3-n900", hsmmc2_internal_input_clk, }, { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, - { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, { "ti,omap3-zoom3", omap3_zoom_legacy_init, }, { "ti,am3517-evm", am3517_evm_legacy_init, },
Signature · 1 line
1.7.10.4
PATCH v3 4/4 ARM: OMAP2+: Add pdata quirk for sys_clkout2 for omap3 DBB056
In reply to Christoph FritzFull device tree support for clock control, especially to set frequencies, is not yet accomplished. Until then, configure the 24Mhz of sys_clkout2 to feed an USB-Hub here.
Signed-off-by Christoph Fritz <[email protected]>
--- arch/arm/mach-omap2/pdata-quirks.c | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+)
arch/arm/mach-omap2/pdata-quirks.c +37 -0
@@ -172,6 +172,43 @@ static void __init am3517_evm_legacy_init(void)static void __init omap3_dbb056_legacy_init (void ) { +struct clk *clkout2; +struct clk *cm96fck; + +/* Reparent clkout2 to 96M_FCK */ +pr_info ("%s: Late Reparent clkout2 to 96M_FCK\n" , __func__); + clkout2 =clk_get (NULL ,"clkout2_src_ck" ); +if (clkout2 <0 ) { +pr_err ("a83x-quirk: couldn't get clkout2_src_ck\n" ); +return ; + } + cm96fck =clk_get (NULL ,"cm_96m_fck" ); +if (cm96fck <0 ) { +pr_err ("a83x-quirk: couldn't get cm_96m_fck\n" ); +return ; + } +if (clk_set_parent (clkout2, cm96fck) <0 ) { +pr_err ("a83x-quirk: couldn't reparent clkout2_src_ck\n" ); +return ; + } + +/* Set clkout2 to 24MHz for internal usb hub*/ +pr_info ("%s: Set clkout2 to 24MHz for internal usb hub\n" , __func__); + clkout2 =clk_get (NULL ,"sys_clkout2" ); +if (clkout2 <0 ) { +pr_err ("%s: couldn't get sys_clkout2\n" , __func__); +return ; + } +if (clk_set_rate (clkout2,24000000 ) <0 ) { +pr_err ("%s: couldn't set sys_clkout2 rate\n" , __func__); +return ; + } +if (clk_prepare_enable (clkout2) <0 ) { +pr_err ("%s: couldn't enable sys_clkout2\n" , __func__); +return ; + } + +/* Initialize display */ omap3_dbb056_display_init_of (); }#endif /* CONFIG_ARCH_OMAP3 */
Signature · 1 line
1.7.10.4
v3 cover ARM: add omap3 INCOstartec board support
In reply to Christoph FritzQuoted 13 lines · Christoph Fritz
This set of patches adds board support for an omap3 system from INCOstartec. It's based on next-20140124.
Due to a regression since next-20140115 the following errors are present:
- pin
sys_clkout2, which gets configured to 24 Mhz by the fourth patch in this set, erroneously outputs only 12 Mhz.
Just out of curiosity, configuring it to 48 Mhz puts out desired 24 Mhz.-
omap_dss, which gets configured by the third patch in this set, fails to do 'dss_set_fck_rate(fck);' in drivers/video/omap2/dss/dss.c:dss_setup_default_clock() which leads to:
Quoted 6 lines
| omapdss_dss: probe of omapdss_dss failed with error -22 | omapdss CORE error: Failed to initialize DSS platform driver | panel-dpi panel-dpi.0: failed to find video source 'dpi.0Both regressions seem to have something to do with the clock framework. Could this be related to the DT clock conversion patches?
Now with dt clock conversion fixes on its way, any chance to get this upstream?