sata-imx: i.MX53, use the internal 120MHz clock by default
Subsystems (3)
PATCH 1/7 sata-imx: i.MX53, use the internal 120MHz clock by default
this allows SATA to work on i.MX53 QSB-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
before this fix the log was :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link timeout set parameter: Connection timed out
--- drivers/ata/sata-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/ata/sata-imx.c +1 -1
@@ -59,7 +59,7 @@ static int imx53_sata_init(struct imx_ahci *imx_ahci)*/ val =readl (base +0x180c ); val &= (0x3 <<1 ); - val |= (0x1 <<1 ); + val |= (0x2 <<1 );writel (val, base +0x180c );return 0 ;
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PATCH 2/7 ARM: i.MX53: Add sata to devicetree
--- arch/arm/dts/imx53.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/dts/imx53.dtsi +9 -0
@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges; + sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + }; + ipu: ipu@18000000 { #crtc-cells = <1>; compatible = "fsl,imx53-ipu";
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Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 11 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>;
arch/arm/dts/imx53.dtsi line 85
Quoted 10 lines
arch/arm/dts/imx53.dtsi +8
-0ranges; + sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };
Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
---
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Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 14 lines · Alexander Shiyan
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;
Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
What do you suggest for the case above? A imx53-bb.dtsi included from imx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 27 lines · Sascha Hauer
Quoted 14 lines · Alexander Shiyan
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 4 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.
it's in linux-next :
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts/imx53.dtsi#n94
Eric
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Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
In reply to Sascha HauerПонедельник, 10 февраля 2014, 9:33 +01:00 от Sascha Hauer <[email protected]>:
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 3 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.
I suggest just sync imx53.dtsi from the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makes imx53.dtsi different for kernel and barebox. This is part of sata node from the kernel:
sata: sata@10000000 {
compatible = "fsl,imx53-ahci";
reg = <0x10000000 0x1000>;
interrupts = <28>;
clocks = <&clks IMX5_CLK_SATA_GATE>,
<&clks IMX5_CLK_SATA_REF>,
<&clks IMX5_CLK_AHB>;
clock-names = "sata_gate", "sata_ref", "ahb";
status = "disabled";
};---
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Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 36 lines · Alexander Shiyan
Понедельник, 10 февраля 2014, 9:33 +01:00 от Sascha Hauer <[email protected]>:
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 3 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.I suggest just sync
imx53.dtsifrom the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makesimx53.dtsidifferent for kernel and barebox. This is part of sata node from the kernel:
Quoted 11 lines
sata: sata@10000000 {
compatible = "fsl,imx53-ahci";
reg = <0x10000000 0x1000>;
interrupts = <28>;
clocks = <&clks IMX5_CLK_SATA_GATE>,
<&clks IMX5_CLK_SATA_REF>,
<&clks IMX5_CLK_AHB>;
clock-names = "sata_gate", "sata_ref", "ahb";
status = "disabled";
};that's possible, I don't know why the clock are changed in barebox vs linux and don't know if that's needed (I got inspiration from other nodes)
Eric
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Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 50 lines · Eric Bénard
Quoted 36 lines · Alexander Shiyan
Понедельник, 10 февраля 2014, 9:33 +01:00 от Sascha Hauer <[email protected]>:
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 3 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.I suggest just sync
imx53.dtsifrom the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makesimx53.dtsidifferent for kernel and barebox. This is part of sata node from the kernel:Quoted 11 lines
sata: sata@10000000 { compatible = "fsl,imx53-ahci"; reg = <0x10000000 0x1000>; interrupts = <28>; clocks = <&clks IMX5_CLK_SATA_GATE>, <&clks IMX5_CLK_SATA_REF>, <&clks IMX5_CLK_AHB>; clock-names = "sata_gate", "sata_ref", "ahb"; status = "disabled"; };
Quoted 3 lines
that's possible, I don't know why the clock are changed in barebox vs linux and don't know if that's needed (I got inspiration from other nodes)
They are identical, it's only that Alexander introduced defines for the clocks in Linux whereas in barebox we have the older versions with plain numbers.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 51 lines · Sascha Hauer
Quoted 50 lines · Eric Bénard
Quoted 47 lines · Alexander Shiyan
Понедельник, 10 февраля 2014, 9:33 +01:00 от Sascha Hauer <[email protected]>:
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 3 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.I suggest just sync
imx53.dtsifrom the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makesimx53.dtsidifferent for kernel and barebox. This is part of sata node from the kernel:sata: sata@10000000 { compatible = "fsl,imx53-ahci"; reg = <0x10000000 0x1000>; interrupts = <28>; clocks = <&clks IMX5_CLK_SATA_GATE>, <&clks IMX5_CLK_SATA_REF>, <&clks IMX5_CLK_AHB>; clock-names = "sata_gate", "sata_ref", "ahb"; status = "disabled"; };
Quoted 8 lines
Quoted 3 lines
that's possible, I don't know why the clock are changed in barebox vs linux and don't know if that's needed (I got inspiration from other nodes)
They are identical, it's only that Alexander introduced defines for the clocks in Linux whereas in barebox we have the older versions with plain numbers.
clock-names are also changed as well as the order (taken from other nodes).
if that's not a problem in barebox, we can use linux-next's dtsi.
Eric (very little background with dts ATM)
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Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 58 lines · Eric Bénard
Quoted 55 lines · Sascha Hauer
Quoted 53 lines · Eric Bénard
Quoted 36 lines · Alexander Shiyan
Понедельник, 10 февраля 2014, 9:33 +01:00 от Sascha Hauer <[email protected]>:
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 3 lines
What do you suggest for the case above? A
imx53-bb.dtsiincluded fromimx53.dtsi? I think disallowing ahci support for barebox if it's not upstream in Linux is not a good option.I suggest just sync
imx53.dtsifrom the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makesimx53.dtsidifferent for kernel and barebox. This is part of sata node from the kernel:Quoted 11 lines
sata: sata@10000000 { compatible = "fsl,imx53-ahci"; reg = <0x10000000 0x1000>; interrupts = <28>; clocks = <&clks IMX5_CLK_SATA_GATE>, <&clks IMX5_CLK_SATA_REF>, <&clks IMX5_CLK_AHB>; clock-names = "sata_gate", "sata_ref", "ahb"; status = "disabled"; };that's possible, I don't know why the clock are changed in barebox vs linux and don't know if that's needed (I got inspiration from other nodes)
Quoted 6 lines
Quoted 4 lines
They are identical, it's only that Alexander introduced defines for the clocks in Linux whereas in barebox we have the older versions with plain numbers.
clock-names are also changed as well as the order (taken from other nodes).
Oh, you are right. The order doesn't matter, but the names should be identical. We should use the same names in barebox as in the kernel, be it with defines or with numbers.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 23 lines · Sascha Hauer
Quoted 23 lines
Quoted 23 lines
Quoted 15 lines
Quoted 4 lines
I suggest just sync
imx53.dtsifrom the linux-next, as a result we will have non-modified version of kernel templates.
Change as above, makesimx53.dtsidifferent for kernel and barebox. This is part of sata node from the kernel:Quoted 11 lines
sata: sata@10000000 { compatible = "fsl,imx53-ahci"; reg = <0x10000000 0x1000>; interrupts = <28>; clocks = <&clks IMX5_CLK_SATA_GATE>, <&clks IMX5_CLK_SATA_REF>, <&clks IMX5_CLK_AHB>; clock-names = "sata_gate", "sata_ref", "ahb"; status = "disabled"; };Quoted 3 lines
that's possible, I don't know why the clock are changed in barebox vs linux and don't know if that's needed (I got inspiration from other nodes)
They are identical, it's only that Alexander introduced defines for the clocks in Linux whereas in barebox we have the older versions with plain numbers.
Quoted 6 lines
Quoted 2 lines
clock-names are also changed as well as the order (taken from other nodes).
Oh, you are right. The order doesn't matter, but the names should be identical. We should use the same names in barebox as in the kernel, be it with defines or with numbers.
So, Eric, to sort that out for now:
- Please update the SATA entry to be compatible with the kernel, but do not use the Linux-next dts. This means use plain numbers, but the correct clock names.
- Remove the dr_mode = "host" line
With these changes this series should be fine for merging.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
PATCH v2 1/7 sata-imx: i.MX53, use the internal 120MHz clock by default
this allows SATA to work on i.MX53 QSB-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
before this fix the log was :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link timeout set parameter: Connection timed out
--- drivers/ata/sata-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/ata/sata-imx.c +1 -1
@@ -59,7 +59,7 @@ static int imx53_sata_init(struct imx_ahci *imx_ahci)*/ val =readl (base +0x180c ); val &= (0x3 <<1 ); - val |= (0x1 <<1 ); + val |= (0x2 <<1 );writel (val, base +0x180c );return 0 ;
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PATCH v2 2/7 ARM: i.MX53: Add sata to devicetree
---
v2: update the SATA entry to be compatible with the kernel, but do
not use the Linux-next dts. This means use plain numbers, but the correct clock names.
arch/arm/dts/imx53.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/dts/imx53.dtsi +9 -0
@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges; + sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 188>, <&clks 5>; + clock-names = "sata_gate", "sata_ref", "ahb"; + status = "disabled"; + }; + ipu: ipu@18000000 { #crtc-cells = <1>; compatible = "fsl,imx53-ipu";
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Sascha Hauer
maintainerRe: [PATCH v2 2/7] ARM: i.MX53: Add sata to devicetree
Hi Eric,
Quoted 5 lines · Eric Bénard
Signed-off-by Eric Bénard <[email protected]>---
v2: update the SATA entry to be compatible with the kernel, but do
not use the Linux-next dts. This means use plain numbers, but the correct clock names.
It seems I already accidently applied v1 of this patch. Instead of this one I merged a fixup patch. Please check the result in the -next branch.
Sascha
Quoted 32 lines
arch/arm/dts/imx53.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +9
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges; + sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 188>, <&clks 5>; + clock-names = "sata_gate", "sata_ref", "ahb"; + status = "disabled"; + }; + ipu: ipu@18000000 { #crtc-cells = <1>; compatible = "fsl,imx53-ipu";Signature · 7 lines
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Signature · 9 lines
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PATCH v2 3/7 ARM: mx53-qsrb: fix USB
In reply to Eric Bénard- configure the MC34708 properly so that USB can work (the sequence is taken from u-boot)
- add the required defines to the mc13xxx include file
--- arch/arm/boards/freescale-mx53-qsb/board.c | 45 ++++++++++++++++++++++++++++++ include/mfd/mc13xxx.h | 11 ++++++++ 2 files changed, 56 insertions(+)
arch/arm/boards/freescale-mx53-qsb/board.c +45 -0
@@ -93,11 +93,56 @@ static int loco_late_init(void) mc34708 =mc13xxx_get ();if (mc34708) { +unsigned int val; +int ret;/* get the board revision from fuse */ rev =readl (MX53_IIM_BASE_ADDR +0x878 );set_board_rev (rev);printf ("MCIMX53-START-R board 1.0 rev %c\n" , (rev ==1 ) ?'A' :'B' );armlinux_set_revision (loco_system_rev); +/* Set VDDGP to 1.25V for 1GHz on SW1 */ +mc13xxx_reg_read (mc34708,MC13892_REG_SW_0 , &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_SW_0 , val); +if (ret) { +printf ("Writing to REG_SW_0 failed: %d\n" , ret); +return ret; + } + +/* Set VCC as 1.30V on SW2 */ +mc13xxx_reg_read (mc34708,MC13892_REG_SW_1 , &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_SW_1 , val); +if (ret) { +printf ("Writing to REG_SW_1 failed: %d\n" , ret); +return ret; + } + +/* Set global reset timer to 4s */ +mc13xxx_reg_read (mc34708,MC13892_REG_POWER_CTL2 , &val); + val = (val & ~TIMER_MASK_MC34708 ) |TIMER_4S_MC34708 ; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_POWER_CTL2 , val); +if (ret) { +printf ("Writing to REG_POWER_CTL2 failed: %d\n" , ret); +return ret; + } + +/* Set VUSBSEL and VUSBEN for USB PHY supply*/ +mc13xxx_reg_read (mc34708,MC13892_REG_MODE_0 , &val); + val |= (VUSBSEL_MC34708 |VUSBEN_MC34708 ); + ret =mc13xxx_reg_write (mc34708,MC13892_REG_MODE_0 , val); +if (ret) { +printf ("Writing to REG_MODE_0 failed: %d\n" , ret); +return ret; + } + +/* Set SWBST to 5V in auto mode */ + val =SWBST_AUTO ; + ret =mc13xxx_reg_write (mc34708,SWBST_CTRL , val); +if (ret) { +printf ("Writing to SWBST_CTRL failed: %d\n" , ret); +return ret; + } }else {/* so we have a DA9053 based board */ printf ("MCIMX53-START board 1.0\n" );
include/mfd/mc13xxx.h +11 -0
@@ -152,6 +152,17 @@#define MC13783_SW1B_SOFTSTART (1 << 17)#define MC13783_SW_PLL_FACTOR (x) (((x) - 28) << 19) +/* MC34708 Definitions */ +#define SWx_VOLT_MASK_MC34708 0x3F +#define SWx_1_250V_MC34708 0x30 +#define SWx_1_300V_MC34708 0x34 +#define TIMER_MASK_MC34708 0x300 +#define TIMER_4S_MC34708 0x100 +#define VUSBSEL_MC34708 (1 << 2) +#define VUSBEN_MC34708 (1 << 3) +#define SWBST_CTRL 31 +#define SWBST_AUTO 0x8 +struct mc13xxx ;#ifdef CONFIG_MFD_MC13XXX
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PATCH v2 4/7 ARM: mx53-qsrb: enable USB host
In reply to Eric Bénard- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller 3 USB Device(s) found
--- arch/arm/dts/imx53-qsb-common.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/dts/imx53-qsb-common.dtsi +5 -1
@@ -158,6 +158,7 @@ MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 MX53_PAD_GPIO_16__GPIO7_11 0x80000000 + MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 >; };
@@ -216,9 +217,12 @@ }; &usbh1 { - status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; }; &usbotg { status = "okay"; }; +
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PATCH v2 5/7 ARM: mx53-qsrb: enable USB OTG in host mode
In reply to Eric Bénardtested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Using index 0 for the new disk
Bus 001 Device 002: ID 0951:1654 DT R500
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller Bus 002 Device 003: ID 0000:0000 EHCI Host Controller 3 USB Device(s) found
---
v2 : Remove the dr_mode = "host" line
arch/arm/dts/imx53-qsb-common.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/dts/imx53-qsb-common.dtsi +2 -1
@@ -223,6 +223,7 @@ }; &usbotg { - status = "okay"; + phy_type = "utmi"; + status = "okay"; };
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PATCH v2 6/7 ARM: mx53-qsrb: enable sata
In reply to Eric Bénardtested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
--- arch/arm/dts/imx53-qsb-common.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/dts/imx53-qsb-common.dtsi +3 -0
@@ -227,3 +227,6 @@ status = "okay"; }; +&sata { + status = "okay"; +};
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PATCH v2 7/7 ARM: mx53-qsb: update defconfig
In reply to Eric Bénard- enable more commands :
(menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support
--- arch/arm/configs/freescale-mx53-qsb_defconfig | 31 +++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-)
arch/arm/configs/freescale-mx53-qsb_defconfig +29 -2
@@ -16,6 +16,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_BLSPEC=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx53-qsb/env/"
@@ -25,31 +26,44 @@ CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_MSLEEP=y CONFIG_CMD_SAVEENV=y +CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y +CONFIG_CMD_LET=y CONFIG_CMD_MENU=y CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_PASSWD=y +CONFIG_PASSWD_MODE_STAR=y CONFIG_CMD_TIME=y CONFIG_CMD_LN=y CONFIG_CMD_TFTP=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_IOMEM=y +CONFIG_CMD_MM=y CONFIG_CMD_CRC=y CONFIG_CMD_CRC_CMP=y CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA256SUM=y +CONFIG_CMD_SHA224SUM=y CONFIG_CMD_BOOTM_SHOW_TYPE=y CONFIG_CMD_BOOTM_VERBOSE=y CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_BOOTM_OFTREE=y CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_BOOTM_AIMAGE=y CONFIG_CMD_UIMAGE=y -# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_BOOTZ=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_OFTREE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y
@@ -64,23 +78,36 @@ CONFIG_CMD_DETECT=y CONFIG_CMD_WD=y CONFIG_NET=y CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_NETCONSOLE=y +CONFIG_NET_RESOLV=y CONFIG_OFDEVICE=y CONFIG_SMSC_PHY=y CONFIG_DRIVER_NET_FEC_IMX=y +CONFIG_NET_USB=y +CONFIG_NET_USB_ASIX=y +CONFIG_NET_USB_SMSC95XX=y # CONFIG_SPI is not set CONFIG_I2C=y CONFIG_I2C_IMX=y -CONFIG_DISK_ATA=y +CONFIG_DISK_AHCI=y +CONFIG_DISK_AHCI_IMX=y CONFIG_USB=y +CONFIG_USB_IMX_CHIPIDEA=y CONFIG_USB_EHCI=y +CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_MCI=y CONFIG_MCI_IMX_ESDHC=y CONFIG_MFD_MC13XXX=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y +CONFIG_LED_TRIGGERS=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_IMX=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y
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Sascha Hauer
maintainerQuoted 22 lines · Eric Bénard
this allows SATA to work on i.MX53 QSB-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered/dev/ata0before this fix the log was :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link timeout set parameter: Connection timed outSigned-off-by Eric Bénard <[email protected]>--- drivers/ata/sata-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/ata/sata-imx.c +0
-0
drivers/ata/sata-imx.c static int imx53_sata_init(struct imx_ahci *imx_ahci) · line 63
Quoted 6 lines
drivers/ata/sata-imx.c +1
-1@@ -59,7 +59,7 @@ static int imx53_sata_init(struct imx_ahci *imx_ahci)*/ val =readl (base +0x180c ); val &= (0x3 <<1 ); - val |= (0x1 <<1 ); + val |= (0x2 <<1 );writel (val, base +0x180c );
I haven't applied this yet. Have you tested this on the regular (not -R) variant of the board? If not I'd like to do that before applying.
Sascha
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Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Hi Sascha,
Quoted 18 lines · Sascha Hauer
Quoted 17 lines · Eric Bénard
this allows SATA to work on i.MX53 QSB-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered/dev/ata0before this fix the log was :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link timeout set parameter: Connection timed outSigned-off-by Eric Bénard <[email protected]>--- drivers/ata/sata-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Quoted 14 lines
drivers/ata/sata-imx.c static int imx53_sata_init(struct imx_ahci *imx_ahci) · line 63
Quoted 11 lines
drivers/ata/sata-imx.c +1
-1@@ -59,7 +59,7 @@ static int imx53_sata_init(struct imx_ahci *imx_ahci)*/ val =readl (base +0x180c ); val &= (0x3 <<1 ); - val |= (0x1 <<1 ); + val |= (0x2 <<1 );writel (val, base +0x180c );I haven't applied this yet. Have you tested this on the regular (not -R) variant of the board? If not I'd like to do that before applying.
I can try to test on an original QSB (with Dialog PMIC) but I don't see why that would change as the difference between QSB and QSB-R is the PMIC (Dialog to Freescale) and here we only change the clock source of the SATA which has nothing to see with the PMIC.
Eric
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Sascha Hauer
maintainerQuoted 38 lines · Eric Bénard
Hi Sascha,
Quoted 18 lines · Sascha Hauer
Quoted 17 lines · Eric Bénard
this allows SATA to work on i.MX53 QSB-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered/dev/ata0before this fix the log was :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link timeout set parameter: Connection timed outSigned-off-by Eric Bénard <[email protected]>--- drivers/ata/sata-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)Quoted 14 lines
drivers/ata/sata-imx.c static int imx53_sata_init(struct imx_ahci *imx_ahci) · line 63
Quoted 11 lines
drivers/ata/sata-imx.c +1
-1@@ -59,7 +59,7 @@ static int imx53_sata_init(struct imx_ahci *imx_ahci)*/ val =readl (base +0x180c ); val &= (0x3 <<1 ); - val |= (0x1 <<1 ); + val |= (0x2 <<1 );writel (val, base +0x180c );I haven't applied this yet. Have you tested this on the regular (not -R) variant of the board? If not I'd like to do that before applying.
Quoted 4 lines
I can try to test on an original QSB (with Dialog PMIC) but I don't see why that would change as the difference between QSB and QSB-R is the PMIC (Dialog to Freescale) and here we only change the clock source of the SATA which has nothing to see with the PMIC.
Yeah, you're probably right. I just wonder why we explicitly used the external clock in the first place and if there's a reason to make this configurable.
Sascha
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Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
In reply to Alexander ShiyanQuoted 14 lines · Alexander Shiyan
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;
Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
I don't want to give out the rule "Only use unmodified dts in barebox" and then use dts files from Linux-next. If we only want to use unmodified dts files we have to use the ones from Linux mainline. Otherwise we are doomed when a pull request doesn't make it in the Kernel and then the dts files are changed significantly before the next merge window, as just happens with Shawns dts changes for 3.14.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Sascha Hauer
maintainerRe: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Quoted 27 lines · Sascha Hauer
Quoted 14 lines · Alexander Shiyan
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 6 lines
I don't want to give out the rule "Only use unmodified dts in barebox" and then use dts files from Linux-next. If we only want to use unmodified dts files we have to use the ones from Linux mainline. Otherwise we are doomed when a pull request doesn't make it in the Kernel and then the dts files are changed significantly before the next merge window, as just happens with Shawns dts changes for 3.14.
So what I suggest for now is:
- I welcome all patches moving the clearly barebox specific stuff to separate files, like Sebastian already started.
- Use plain Linux Kernel dts files where possible. I will try and deny all changes to these files except "sync to Linux-x.y"
- Leave the i.MX dts files how they are until the changes currently queued in Linux-next hit mainline.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 2/7] ARM: i.MX53: Add sata to devicetree
Понедельник, 10 февраля 2014, 10:15 +01:00 от Sascha Hauer <[email protected]>:
Quoted 35 lines · Sascha Hauer
Quoted 27 lines · Alexander Shiyan
Quoted 14 lines
Суббота, 8 февраля 2014, 15:16 +01:00 от Eric Bénard <[email protected]>:
Quoted 13 lines
Signed-off-by Eric Bénard <[email protected]>---
arch/arm/dts/imx53.dtsi| 9 +++++++++1 file changed, 9 insertions(+)arch/arm/dts/imx53.dtsi +0
-0@@ -75,6 +75,15 @@ interrupt-parent = <&tzic>; ranges;Quoted 11 lines
arch/arm/dts/imx53.dtsi line 85
Quoted 8 lines
arch/arm/dts/imx53.dtsi +8
-0+ sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks 173>, <&clks 5>, <&clks 188>; + clock-names = "sata", "ahb", "per"; + status = "disabled"; + };Sascha, we stop changing DTS of the kernel or not? What is the ultimate solution?
Quoted 6 lines
I don't want to give out the rule "Only use unmodified dts in barebox" and then use dts files from Linux-next. If we only want to use unmodified dts files we have to use the ones from Linux mainline. Otherwise we are doomed when a pull request doesn't make it in the Kernel and then the dts files are changed significantly before the next merge window, as just happens with Shawns dts changes for 3.14.
Quoted 8 lines
So what I suggest for now is:
- I welcome all patches moving the clearly barebox specific stuff to separate files, like Sebastian already started.
- Use plain Linux Kernel dts files where possible. I will try and deny all changes to these files except "sync to Linux-x.y"
- Leave the i.MX dts files how they are until the changes currently queued in Linux-next hit mainline.
Nice.
Something I already updated back into the kernel (imx27-phycard series).
---
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PATCH 3/7 ARM: mx53-qsrb: fix USB
In reply to Eric Bénard- configure the MC34708 properly so that USB can work (the sequence is taken from u-boot)
- add the required defines to the mc13xxx include file
--- arch/arm/boards/freescale-mx53-qsb/board.c | 45 ++++++++++++++++++++++++++++++ include/mfd/mc13xxx.h | 11 ++++++++ 2 files changed, 56 insertions(+)
arch/arm/boards/freescale-mx53-qsb/board.c +45 -0
@@ -93,11 +93,56 @@ static int loco_late_init(void) mc34708 =mc13xxx_get ();if (mc34708) { +unsigned int val; +int ret;/* get the board revision from fuse */ rev =readl (MX53_IIM_BASE_ADDR +0x878 );set_board_rev (rev);printf ("MCIMX53-START-R board 1.0 rev %c\n" , (rev ==1 ) ?'A' :'B' );armlinux_set_revision (loco_system_rev); +/* Set VDDGP to 1.25V for 1GHz on SW1 */ +mc13xxx_reg_read (mc34708,MC13892_REG_SW_0 , &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_SW_0 , val); +if (ret) { +printf ("Writing to REG_SW_0 failed: %d\n" , ret); +return ret; + } + +/* Set VCC as 1.30V on SW2 */ +mc13xxx_reg_read (mc34708,MC13892_REG_SW_1 , &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_SW_1 , val); +if (ret) { +printf ("Writing to REG_SW_1 failed: %d\n" , ret); +return ret; + } + +/* Set global reset timer to 4s */ +mc13xxx_reg_read (mc34708,MC13892_REG_POWER_CTL2 , &val); + val = (val & ~TIMER_MASK_MC34708 ) |TIMER_4S_MC34708 ; + ret =mc13xxx_reg_write (mc34708,MC13892_REG_POWER_CTL2 , val); +if (ret) { +printf ("Writing to REG_POWER_CTL2 failed: %d\n" , ret); +return ret; + } + +/* Set VUSBSEL and VUSBEN for USB PHY supply*/ +mc13xxx_reg_read (mc34708,MC13892_REG_MODE_0 , &val); + val |= (VUSBSEL_MC34708 |VUSBEN_MC34708 ); + ret =mc13xxx_reg_write (mc34708,MC13892_REG_MODE_0 , val); +if (ret) { +printf ("Writing to REG_MODE_0 failed: %d\n" , ret); +return ret; + } + +/* Set SWBST to 5V in auto mode */ + val =SWBST_AUTO ; + ret =mc13xxx_reg_write (mc34708,SWBST_CTRL , val); +if (ret) { +printf ("Writing to SWBST_CTRL failed: %d\n" , ret); +return ret; + } }else {/* so we have a DA9053 based board */ printf ("MCIMX53-START board 1.0\n" );
include/mfd/mc13xxx.h +11 -0
@@ -152,6 +152,17 @@#define MC13783_SW1B_SOFTSTART (1 << 17)#define MC13783_SW_PLL_FACTOR (x) (((x) - 28) << 19) +/* MC34708 Definitions */ +#define SWx_VOLT_MASK_MC34708 0x3F +#define SWx_1_250V_MC34708 0x30 +#define SWx_1_300V_MC34708 0x34 +#define TIMER_MASK_MC34708 0x300 +#define TIMER_4S_MC34708 0x100 +#define VUSBSEL_MC34708 (1 << 2) +#define VUSBEN_MC34708 (1 << 3) +#define SWBST_CTRL 31 +#define SWBST_AUTO 0x8 +struct mc13xxx ;#ifdef CONFIG_MFD_MC13XXX
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PATCH 4/7 ARM: mx53-qsrb: enable USB host
In reply to Eric Bénard- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller 3 USB Device(s) found
--- arch/arm/dts/imx53-qsb-common.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/dts/imx53-qsb-common.dtsi +5 -1
@@ -158,6 +158,7 @@ MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 MX53_PAD_GPIO_16__GPIO7_11 0x80000000 + MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 >; };
@@ -216,9 +217,12 @@ }; &usbh1 { - status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; }; &usbotg { status = "okay"; }; +
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PATCH 5/7 ARM: mx53-qsrb: enable USB OTG in host mode
In reply to Eric Bénardtested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Using index 0 for the new disk
Bus 001 Device 002: ID 0951:1654 DT R500
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller Bus 002 Device 003: ID 0000:0000 EHCI Host Controller 3 USB Device(s) found
--- arch/arm/dts/imx53-qsb-common.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
arch/arm/dts/imx53-qsb-common.dtsi +3 -1
@@ -223,6 +223,8 @@ }; &usbotg { - status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; };
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Sascha Hauer
maintainerRe: [PATCH 5/7] ARM: mx53-qsrb: enable USB OTG in host mode
Quoted 19 lines · Eric Bénard
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Using index 0 for the new disk
Bus 001 Device 002: ID 0951:1654 DT R500
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller Bus 002 Device 003: ID 0000:0000 EHCI Host Controller 3 USB Device(s) foundSigned-off-by Eric Bénard <[email protected]>--- arch/arm/dts/imx53-qsb-common.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)arch/arm/dts/imx53-qsb-common.dtsi +0
-0
arch/arm/dts/imx53-qsb-common.dtsi line 229
Quoted 8 lines
arch/arm/dts/imx53-qsb-common.dtsi +3
-1@@ -223,6 +223,8 @@ }; &usbotg { - status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; };
Do we need a barebox specific option to specify dr_mode? I mean barebox cannot do otg, so we need to specify dr_mode to host or device, but with the above change Linux is limited to host mode aswell.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 5/7] ARM: mx53-qsrb: enable USB OTG in host mode
Hi Sascha,
Quoted 12 lines · Sascha Hauer
arch/arm/dts/imx53-qsb-common.dtsi line 229
Quoted 6 lines · Eric Bénard
&usbotg {
arch/arm/dts/imx53-qsb-common.dtsi +3
-1- status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; };Do we need a barebox specific option to specify
dr_mode? I mean barebox cannot do otg, so we need to specifydr_modeto host or device, but with the above change Linux is limited to host mode aswell.
in chipidea-imx.c there is :
mode = of_usb_get_dr_mode(ci->dev->device_node, NULL);
switch (mode) {
case USB_DR_MODE_HOST:
default:
ci->mode = IMX_USB_MODE_HOST;
break;
case USB_DR_MODE_PERIPHERAL:
ci->mode = IMX_USB_MODE_DEVICE;
break;
}so we could omit the dr_mode=host as it will default to host.
Eric
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Sascha Hauer
maintainerRe: [PATCH 5/7] ARM: mx53-qsrb: enable USB OTG in host mode
Quoted 30 lines · Eric Bénard
Hi Sascha,
Quoted 12 lines · Sascha Hauer
arch/arm/dts/imx53-qsb-common.dtsi line 229
Quoted 6 lines · Eric Bénard
&usbotg {
arch/arm/dts/imx53-qsb-common.dtsi +3
-1- status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; };Do we need a barebox specific option to specify
dr_mode? I mean barebox cannot do otg, so we need to specifydr_modeto host or device, but with the above change Linux is limited to host mode aswell.in
chipidea-imx.cthere is :mode = of_usb_get_dr_mode(ci->dev->device_node, NULL); switch (mode) { case USB_DR_MODE_HOST: default: ci->mode = IMX_USB_MODE_HOST; break; case USB_DR_MODE_PERIPHERAL: ci->mode = IMX_USB_MODE_DEVICE; break; }
Quoted 1 line
so we could omit the dr_mode=host as it will default to host.
Then let's do this. The default-to-host beahaviour in barebox may not be desirable in all cases, but at least we do not propagate this behaviour to the kernel.
Sascha
Signature · 9 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 5/7] ARM: mx53-qsrb: enable USB OTG in host mode
Quoted 31 lines · Sascha Hauer
Quoted 30 lines · Eric Bénard
Hi Sascha,
Quoted 12 lines · Sascha Hauer
arch/arm/dts/imx53-qsb-common.dtsi line 229
Quoted 6 lines · Eric Bénard
&usbotg {
arch/arm/dts/imx53-qsb-common.dtsi +3
-1- status = "okay"; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; };Do we need a barebox specific option to specify
dr_mode? I mean barebox cannot do otg, so we need to specifydr_modeto host or device, but with the above change Linux is limited to host mode aswell.in
chipidea-imx.cthere is :mode = of_usb_get_dr_mode(ci->dev->device_node, NULL); switch (mode) { case USB_DR_MODE_HOST: default: ci->mode = IMX_USB_MODE_HOST; break; case USB_DR_MODE_PERIPHERAL: ci->mode = IMX_USB_MODE_DEVICE; break; }
Quoted 6 lines
Quoted 1 line
so we could omit the dr_mode=host as it will default to host.
Then let's do this. The default-to-host beahaviour in barebox may not be desirable in all cases, but at least we do not propagate this behaviour to the kernel.
do you want a v2 or will you remove the line when applying ?
Eric
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PATCH 6/7 ARM: mx53-qsrb: enable sata
In reply to Eric Bénardtested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1 imx-sata 10000000.sata: port 0: SATA link ok imx-sata 10000000.sata: port 0: Spinning up device... imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
--- arch/arm/dts/imx53-qsb-common.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/dts/imx53-qsb-common.dtsi +3 -0
@@ -228,3 +228,6 @@ status = "okay"; }; +&sata { + status = "okay"; +};
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PATCH 7/7 ARM: mx53-qsb: update defconfig
In reply to Eric Bénard- enable more commands :
(menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support
--- arch/arm/configs/freescale-mx53-qsb_defconfig | 31 +++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-)
arch/arm/configs/freescale-mx53-qsb_defconfig +29 -2
@@ -16,6 +16,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_BLSPEC=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx53-qsb/env/"
@@ -25,31 +26,44 @@ CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_MSLEEP=y CONFIG_CMD_SAVEENV=y +CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y +CONFIG_CMD_LET=y CONFIG_CMD_MENU=y CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_PASSWD=y +CONFIG_PASSWD_MODE_STAR=y CONFIG_CMD_TIME=y CONFIG_CMD_LN=y CONFIG_CMD_TFTP=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_IOMEM=y +CONFIG_CMD_MM=y CONFIG_CMD_CRC=y CONFIG_CMD_CRC_CMP=y CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA256SUM=y +CONFIG_CMD_SHA224SUM=y CONFIG_CMD_BOOTM_SHOW_TYPE=y CONFIG_CMD_BOOTM_VERBOSE=y CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_BOOTM_OFTREE=y CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_BOOTM_AIMAGE=y CONFIG_CMD_UIMAGE=y -# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_BOOTZ=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_OFTREE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y
@@ -64,23 +78,36 @@ CONFIG_CMD_DETECT=y CONFIG_CMD_WD=y CONFIG_NET=y CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_NETCONSOLE=y +CONFIG_NET_RESOLV=y CONFIG_OFDEVICE=y CONFIG_SMSC_PHY=y CONFIG_DRIVER_NET_FEC_IMX=y +CONFIG_NET_USB=y +CONFIG_NET_USB_ASIX=y +CONFIG_NET_USB_SMSC95XX=y # CONFIG_SPI is not set CONFIG_I2C=y CONFIG_I2C_IMX=y -CONFIG_DISK_ATA=y +CONFIG_DISK_AHCI=y +CONFIG_DISK_AHCI_IMX=y CONFIG_USB=y +CONFIG_USB_IMX_CHIPIDEA=y CONFIG_USB_EHCI=y +CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_MCI=y CONFIG_MCI_IMX_ESDHC=y CONFIG_MFD_MC13XXX=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y +CONFIG_LED_TRIGGERS=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_IMX=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y
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