socfpga: Adding Denali NAND driver support
PATCH v2 2/2 socfpga: Adding Denali NAND driver support
To add the Denali NAND driver support into SOCFPGA. But it would not enabled by default as Altera Cyclone V dev kit doesn't have a NAND device on it.
Signed-off-by Chin Liang See <[email protected]>
Cc Artem Bityutskiy <[email protected]>
Cc David Woodhouse <[email protected]>
Cc Brian Norris <[email protected]>
Cc Scott Wood <[email protected]>
---
Changes for v2
- Enable this driver support for SOCFPGA
--- .../include/asm/arch-socfpga/socfpga_base_addrs.h | 2 ++ include/configs/socfpga_cyclone5.h | 16 ++++++++++++++++ 2 files changed, 18 insertions(+)
arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +2 -0
@@ -8,6 +8,8 @@#define _SOCFPGA_BASE_ADDRS_H_#define SOCFPGA_L3REGS_ADDRESS 0xff800000 +#define SOCFPGA_NAND_DATA_ADDRESS 0xff900000 +#define SOCFPGA_NAND_REGS_ADDRESS 0xffb80000#define SOCFPGA_UART0_ADDRESS 0xffc02000#define SOCFPGA_UART1_ADDRESS 0xffc03000#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
include/configs/socfpga_cyclone5.h +16 -0
@@ -216,6 +216,22 @@/* Clocks source frequency to watchdog timer */ #define CONFIG_DW_WDT_CLOCK_KHZ 25000 +/* NAND */ +#undef CONFIG_NAND_DENALI +#ifdef CONFIG_NAND_DENALI +#define CONFIG_CMD_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NAND_REGS_ADDRESS +#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NAND_DATA_ADDRESS +#define CONFIG_SYS_NAND_BASE CONFIG_SYS_NAND_REGS_BASE +#define CONFIG_SYS_NAND_ONFI_DETECTION +/* How many bytes need to be skipped at the start of spare area */ +#define CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES (2) +/* The ECC size which either 512 or 1024 */ +#define CONFIG_NAND_DENALI_ECC_SIZE (512) +#endif /* CONFIG_NAND_DENALI */ +/* * SPL "Second Program Loader" aka Initial Software */
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1.7.9.5